1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright IBM Corp. 2012
4 *
5 * Author(s):
6 * Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8
9 #define KMSG_COMPONENT "zpci"
10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12 #include <linux/compat.h>
13 #include <linux/kernel.h>
14 #include <linux/miscdevice.h>
15 #include <linux/slab.h>
16 #include <linux/err.h>
17 #include <linux/delay.h>
18 #include <linux/pci.h>
19 #include <linux/uaccess.h>
20 #include <asm/pci_debug.h>
21 #include <asm/pci_clp.h>
22 #include <asm/clp.h>
23 #include <uapi/asm/clp.h>
24
25 #include "pci_bus.h"
26
27 bool zpci_unique_uid;
28
update_uid_checking(bool new)29 void update_uid_checking(bool new)
30 {
31 if (zpci_unique_uid != new)
32 zpci_dbg(1, "uid checking:%d\n", new);
33
34 zpci_unique_uid = new;
35 }
36
zpci_err_clp(unsigned int rsp,int rc)37 static inline void zpci_err_clp(unsigned int rsp, int rc)
38 {
39 struct {
40 unsigned int rsp;
41 int rc;
42 } __packed data = {rsp, rc};
43
44 zpci_err_hex(&data, sizeof(data));
45 }
46
47 /*
48 * Call Logical Processor with c=1, lps=0 and command 1
49 * to get the bit mask of installed logical processors
50 */
clp_get_ilp(unsigned long * ilp)51 static inline int clp_get_ilp(unsigned long *ilp)
52 {
53 unsigned long mask;
54 int cc = 3;
55
56 asm volatile (
57 " .insn rrf,0xb9a00000,%[mask],%[cmd],8,0\n"
58 "0: ipm %[cc]\n"
59 " srl %[cc],28\n"
60 "1:\n"
61 EX_TABLE(0b, 1b)
62 : [cc] "+d" (cc), [mask] "=d" (mask) : [cmd] "a" (1)
63 : "cc");
64 *ilp = mask;
65 return cc;
66 }
67
68 /*
69 * Call Logical Processor with c=0, the give constant lps and an lpcb request.
70 */
clp_req(void * data,unsigned int lps)71 static __always_inline int clp_req(void *data, unsigned int lps)
72 {
73 struct { u8 _[CLP_BLK_SIZE]; } *req = data;
74 u64 ignored;
75 int cc = 3;
76
77 asm volatile (
78 " .insn rrf,0xb9a00000,%[ign],%[req],0,%[lps]\n"
79 "0: ipm %[cc]\n"
80 " srl %[cc],28\n"
81 "1:\n"
82 EX_TABLE(0b, 1b)
83 : [cc] "+d" (cc), [ign] "=d" (ignored), "+m" (*req)
84 : [req] "a" (req), [lps] "i" (lps)
85 : "cc");
86 return cc;
87 }
88
clp_alloc_block(gfp_t gfp_mask)89 static void *clp_alloc_block(gfp_t gfp_mask)
90 {
91 return (void *) __get_free_pages(gfp_mask, get_order(CLP_BLK_SIZE));
92 }
93
clp_free_block(void * ptr)94 static void clp_free_block(void *ptr)
95 {
96 free_pages((unsigned long) ptr, get_order(CLP_BLK_SIZE));
97 }
98
clp_store_query_pci_fngrp(struct zpci_dev * zdev,struct clp_rsp_query_pci_grp * response)99 static void clp_store_query_pci_fngrp(struct zpci_dev *zdev,
100 struct clp_rsp_query_pci_grp *response)
101 {
102 zdev->tlb_refresh = response->refresh;
103 zdev->dma_mask = response->dasm;
104 zdev->msi_addr = response->msia;
105 zdev->max_msi = response->noi;
106 zdev->fmb_update = response->mui;
107 zdev->version = response->version;
108
109 switch (response->version) {
110 case 1:
111 zdev->max_bus_speed = PCIE_SPEED_5_0GT;
112 break;
113 default:
114 zdev->max_bus_speed = PCI_SPEED_UNKNOWN;
115 break;
116 }
117 }
118
clp_query_pci_fngrp(struct zpci_dev * zdev,u8 pfgid)119 static int clp_query_pci_fngrp(struct zpci_dev *zdev, u8 pfgid)
120 {
121 struct clp_req_rsp_query_pci_grp *rrb;
122 int rc;
123
124 rrb = clp_alloc_block(GFP_KERNEL);
125 if (!rrb)
126 return -ENOMEM;
127
128 memset(rrb, 0, sizeof(*rrb));
129 rrb->request.hdr.len = sizeof(rrb->request);
130 rrb->request.hdr.cmd = CLP_QUERY_PCI_FNGRP;
131 rrb->response.hdr.len = sizeof(rrb->response);
132 rrb->request.pfgid = pfgid;
133
134 rc = clp_req(rrb, CLP_LPS_PCI);
135 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK)
136 clp_store_query_pci_fngrp(zdev, &rrb->response);
137 else {
138 zpci_err("Q PCI FGRP:\n");
139 zpci_err_clp(rrb->response.hdr.rsp, rc);
140 rc = -EIO;
141 }
142 clp_free_block(rrb);
143 return rc;
144 }
145
clp_store_query_pci_fn(struct zpci_dev * zdev,struct clp_rsp_query_pci * response)146 static int clp_store_query_pci_fn(struct zpci_dev *zdev,
147 struct clp_rsp_query_pci *response)
148 {
149 int i;
150
151 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
152 zdev->bars[i].val = le32_to_cpu(response->bar[i]);
153 zdev->bars[i].size = response->bar_size[i];
154 }
155 zdev->start_dma = response->sdma;
156 zdev->end_dma = response->edma;
157 zdev->pchid = response->pchid;
158 zdev->pfgid = response->pfgid;
159 zdev->pft = response->pft;
160 zdev->vfn = response->vfn;
161 zdev->port = response->port;
162 zdev->uid = response->uid;
163 zdev->fmb_length = sizeof(u32) * response->fmb_len;
164 zdev->rid_available = response->rid_avail;
165 zdev->is_physfn = response->is_physfn;
166 if (!s390_pci_no_rid && zdev->rid_available)
167 zdev->devfn = response->rid & ZPCI_RID_MASK_DEVFN;
168
169 memcpy(zdev->pfip, response->pfip, sizeof(zdev->pfip));
170 if (response->util_str_avail) {
171 memcpy(zdev->util_str, response->util_str,
172 sizeof(zdev->util_str));
173 zdev->util_str_avail = 1;
174 }
175 zdev->mio_capable = response->mio_addr_avail;
176 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
177 if (!(response->mio.valid & (1 << (PCI_STD_NUM_BARS - i - 1))))
178 continue;
179
180 zdev->bars[i].mio_wb = (void __iomem *) response->mio.addr[i].wb;
181 zdev->bars[i].mio_wt = (void __iomem *) response->mio.addr[i].wt;
182 }
183 return 0;
184 }
185
clp_query_pci_fn(struct zpci_dev * zdev)186 int clp_query_pci_fn(struct zpci_dev *zdev)
187 {
188 struct clp_req_rsp_query_pci *rrb;
189 int rc;
190
191 rrb = clp_alloc_block(GFP_KERNEL);
192 if (!rrb)
193 return -ENOMEM;
194
195 memset(rrb, 0, sizeof(*rrb));
196 rrb->request.hdr.len = sizeof(rrb->request);
197 rrb->request.hdr.cmd = CLP_QUERY_PCI_FN;
198 rrb->response.hdr.len = sizeof(rrb->response);
199 rrb->request.fh = zdev->fh;
200
201 rc = clp_req(rrb, CLP_LPS_PCI);
202 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
203 rc = clp_store_query_pci_fn(zdev, &rrb->response);
204 if (rc)
205 goto out;
206 rc = clp_query_pci_fngrp(zdev, rrb->response.pfgid);
207 } else {
208 zpci_err("Q PCI FN:\n");
209 zpci_err_clp(rrb->response.hdr.rsp, rc);
210 rc = -EIO;
211 }
212 out:
213 clp_free_block(rrb);
214 return rc;
215 }
216
217 /**
218 * clp_set_pci_fn() - Execute a command on a PCI function
219 * @zdev: Function that will be affected
220 * @fh: Out parameter for updated function handle
221 * @nr_dma_as: DMA address space number
222 * @command: The command code to execute
223 *
224 * Returns: 0 on success, < 0 for Linux errors (e.g. -ENOMEM), and
225 * > 0 for non-success platform responses
226 */
clp_set_pci_fn(struct zpci_dev * zdev,u32 * fh,u8 nr_dma_as,u8 command)227 static int clp_set_pci_fn(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as, u8 command)
228 {
229 struct clp_req_rsp_set_pci *rrb;
230 int rc, retries = 100;
231
232 *fh = 0;
233 rrb = clp_alloc_block(GFP_KERNEL);
234 if (!rrb)
235 return -ENOMEM;
236
237 do {
238 memset(rrb, 0, sizeof(*rrb));
239 rrb->request.hdr.len = sizeof(rrb->request);
240 rrb->request.hdr.cmd = CLP_SET_PCI_FN;
241 rrb->response.hdr.len = sizeof(rrb->response);
242 rrb->request.fh = zdev->fh;
243 rrb->request.oc = command;
244 rrb->request.ndas = nr_dma_as;
245
246 rc = clp_req(rrb, CLP_LPS_PCI);
247 if (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY) {
248 retries--;
249 if (retries < 0)
250 break;
251 msleep(20);
252 }
253 } while (rrb->response.hdr.rsp == CLP_RC_SETPCIFN_BUSY);
254
255 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
256 *fh = rrb->response.fh;
257 } else {
258 zpci_err("Set PCI FN:\n");
259 zpci_err_clp(rrb->response.hdr.rsp, rc);
260 if (!rc)
261 rc = rrb->response.hdr.rsp;
262 }
263 clp_free_block(rrb);
264 return rc;
265 }
266
clp_setup_writeback_mio(void)267 int clp_setup_writeback_mio(void)
268 {
269 struct clp_req_rsp_slpc_pci *rrb;
270 u8 wb_bit_pos;
271 int rc;
272
273 rrb = clp_alloc_block(GFP_KERNEL);
274 if (!rrb)
275 return -ENOMEM;
276
277 memset(rrb, 0, sizeof(*rrb));
278 rrb->request.hdr.len = sizeof(rrb->request);
279 rrb->request.hdr.cmd = CLP_SLPC;
280 rrb->response.hdr.len = sizeof(rrb->response);
281
282 rc = clp_req(rrb, CLP_LPS_PCI);
283 if (!rc && rrb->response.hdr.rsp == CLP_RC_OK) {
284 if (rrb->response.vwb) {
285 wb_bit_pos = rrb->response.mio_wb;
286 set_bit_inv(wb_bit_pos, &mio_wb_bit_mask);
287 zpci_dbg(3, "wb bit: %d\n", wb_bit_pos);
288 } else {
289 zpci_dbg(3, "wb bit: n.a.\n");
290 }
291
292 } else {
293 zpci_err("SLPC PCI:\n");
294 zpci_err_clp(rrb->response.hdr.rsp, rc);
295 rc = -EIO;
296 }
297 clp_free_block(rrb);
298 return rc;
299 }
300
clp_enable_fh(struct zpci_dev * zdev,u32 * fh,u8 nr_dma_as)301 int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as)
302 {
303 int rc;
304
305 rc = clp_set_pci_fn(zdev, fh, nr_dma_as, CLP_SET_ENABLE_PCI_FN);
306 zpci_dbg(3, "ena fid:%x, fh:%x, rc:%d\n", zdev->fid, *fh, rc);
307 if (!rc && zpci_use_mio(zdev)) {
308 rc = clp_set_pci_fn(zdev, fh, nr_dma_as, CLP_SET_ENABLE_MIO);
309 zpci_dbg(3, "ena mio fid:%x, fh:%x, rc:%d\n",
310 zdev->fid, *fh, rc);
311 if (rc)
312 clp_disable_fh(zdev, fh);
313 }
314 return rc;
315 }
316
clp_disable_fh(struct zpci_dev * zdev,u32 * fh)317 int clp_disable_fh(struct zpci_dev *zdev, u32 *fh)
318 {
319 int rc;
320
321 if (!zdev_enabled(zdev))
322 return 0;
323
324 rc = clp_set_pci_fn(zdev, fh, 0, CLP_SET_DISABLE_PCI_FN);
325 zpci_dbg(3, "dis fid:%x, fh:%x, rc:%d\n", zdev->fid, *fh, rc);
326 return rc;
327 }
328
clp_list_pci_req(struct clp_req_rsp_list_pci * rrb,u64 * resume_token,int * nentries)329 static int clp_list_pci_req(struct clp_req_rsp_list_pci *rrb,
330 u64 *resume_token, int *nentries)
331 {
332 int rc;
333
334 memset(rrb, 0, sizeof(*rrb));
335 rrb->request.hdr.len = sizeof(rrb->request);
336 rrb->request.hdr.cmd = CLP_LIST_PCI;
337 /* store as many entries as possible */
338 rrb->response.hdr.len = CLP_BLK_SIZE - LIST_PCI_HDR_LEN;
339 rrb->request.resume_token = *resume_token;
340
341 /* Get PCI function handle list */
342 rc = clp_req(rrb, CLP_LPS_PCI);
343 if (rc || rrb->response.hdr.rsp != CLP_RC_OK) {
344 zpci_err("List PCI FN:\n");
345 zpci_err_clp(rrb->response.hdr.rsp, rc);
346 return -EIO;
347 }
348
349 update_uid_checking(rrb->response.uid_checking);
350 WARN_ON_ONCE(rrb->response.entry_size !=
351 sizeof(struct clp_fh_list_entry));
352
353 *nentries = (rrb->response.hdr.len - LIST_PCI_HDR_LEN) /
354 rrb->response.entry_size;
355 *resume_token = rrb->response.resume_token;
356
357 return rc;
358 }
359
clp_list_pci(struct clp_req_rsp_list_pci * rrb,void * data,void (* cb)(struct clp_fh_list_entry *,void *))360 static int clp_list_pci(struct clp_req_rsp_list_pci *rrb, void *data,
361 void (*cb)(struct clp_fh_list_entry *, void *))
362 {
363 u64 resume_token = 0;
364 int nentries, i, rc;
365
366 do {
367 rc = clp_list_pci_req(rrb, &resume_token, &nentries);
368 if (rc)
369 return rc;
370 for (i = 0; i < nentries; i++)
371 cb(&rrb->response.fh_list[i], data);
372 } while (resume_token);
373
374 return rc;
375 }
376
clp_find_pci(struct clp_req_rsp_list_pci * rrb,u32 fid,struct clp_fh_list_entry * entry)377 static int clp_find_pci(struct clp_req_rsp_list_pci *rrb, u32 fid,
378 struct clp_fh_list_entry *entry)
379 {
380 struct clp_fh_list_entry *fh_list;
381 u64 resume_token = 0;
382 int nentries, i, rc;
383
384 do {
385 rc = clp_list_pci_req(rrb, &resume_token, &nentries);
386 if (rc)
387 return rc;
388 fh_list = rrb->response.fh_list;
389 for (i = 0; i < nentries; i++) {
390 if (fh_list[i].fid == fid) {
391 *entry = fh_list[i];
392 return 0;
393 }
394 }
395 } while (resume_token);
396
397 return -ENODEV;
398 }
399
__clp_add(struct clp_fh_list_entry * entry,void * data)400 static void __clp_add(struct clp_fh_list_entry *entry, void *data)
401 {
402 struct zpci_dev *zdev;
403
404 if (!entry->vendor_id)
405 return;
406
407 zdev = get_zdev_by_fid(entry->fid);
408 if (zdev) {
409 zpci_zdev_put(zdev);
410 return;
411 }
412 zpci_create_device(entry->fid, entry->fh, entry->config_state);
413 }
414
clp_scan_pci_devices(void)415 int clp_scan_pci_devices(void)
416 {
417 struct clp_req_rsp_list_pci *rrb;
418 int rc;
419
420 rrb = clp_alloc_block(GFP_KERNEL);
421 if (!rrb)
422 return -ENOMEM;
423
424 rc = clp_list_pci(rrb, NULL, __clp_add);
425
426 clp_free_block(rrb);
427 return rc;
428 }
429
430 /*
431 * Get the current function handle of the function matching @fid
432 */
clp_refresh_fh(u32 fid,u32 * fh)433 int clp_refresh_fh(u32 fid, u32 *fh)
434 {
435 struct clp_req_rsp_list_pci *rrb;
436 struct clp_fh_list_entry entry;
437 int rc;
438
439 rrb = clp_alloc_block(GFP_NOWAIT);
440 if (!rrb)
441 return -ENOMEM;
442
443 rc = clp_find_pci(rrb, fid, &entry);
444 if (!rc)
445 *fh = entry.fh;
446
447 clp_free_block(rrb);
448 return rc;
449 }
450
clp_get_state(u32 fid,enum zpci_state * state)451 int clp_get_state(u32 fid, enum zpci_state *state)
452 {
453 struct clp_req_rsp_list_pci *rrb;
454 struct clp_fh_list_entry entry;
455 int rc;
456
457 rrb = clp_alloc_block(GFP_ATOMIC);
458 if (!rrb)
459 return -ENOMEM;
460
461 rc = clp_find_pci(rrb, fid, &entry);
462 if (!rc) {
463 *state = entry.config_state;
464 } else if (rc == -ENODEV) {
465 *state = ZPCI_FN_STATE_RESERVED;
466 rc = 0;
467 }
468
469 clp_free_block(rrb);
470 return rc;
471 }
472
clp_base_slpc(struct clp_req * req,struct clp_req_rsp_slpc * lpcb)473 static int clp_base_slpc(struct clp_req *req, struct clp_req_rsp_slpc *lpcb)
474 {
475 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
476
477 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
478 lpcb->response.hdr.len > limit)
479 return -EINVAL;
480 return clp_req(lpcb, CLP_LPS_BASE) ? -EOPNOTSUPP : 0;
481 }
482
clp_base_command(struct clp_req * req,struct clp_req_hdr * lpcb)483 static int clp_base_command(struct clp_req *req, struct clp_req_hdr *lpcb)
484 {
485 switch (lpcb->cmd) {
486 case 0x0001: /* store logical-processor characteristics */
487 return clp_base_slpc(req, (void *) lpcb);
488 default:
489 return -EINVAL;
490 }
491 }
492
clp_pci_slpc(struct clp_req * req,struct clp_req_rsp_slpc_pci * lpcb)493 static int clp_pci_slpc(struct clp_req *req, struct clp_req_rsp_slpc_pci *lpcb)
494 {
495 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
496
497 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
498 lpcb->response.hdr.len > limit)
499 return -EINVAL;
500 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
501 }
502
clp_pci_list(struct clp_req * req,struct clp_req_rsp_list_pci * lpcb)503 static int clp_pci_list(struct clp_req *req, struct clp_req_rsp_list_pci *lpcb)
504 {
505 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
506
507 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
508 lpcb->response.hdr.len > limit)
509 return -EINVAL;
510 if (lpcb->request.reserved2 != 0)
511 return -EINVAL;
512 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
513 }
514
clp_pci_query(struct clp_req * req,struct clp_req_rsp_query_pci * lpcb)515 static int clp_pci_query(struct clp_req *req,
516 struct clp_req_rsp_query_pci *lpcb)
517 {
518 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
519
520 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
521 lpcb->response.hdr.len > limit)
522 return -EINVAL;
523 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0)
524 return -EINVAL;
525 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
526 }
527
clp_pci_query_grp(struct clp_req * req,struct clp_req_rsp_query_pci_grp * lpcb)528 static int clp_pci_query_grp(struct clp_req *req,
529 struct clp_req_rsp_query_pci_grp *lpcb)
530 {
531 unsigned long limit = PAGE_SIZE - sizeof(lpcb->request);
532
533 if (lpcb->request.hdr.len != sizeof(lpcb->request) ||
534 lpcb->response.hdr.len > limit)
535 return -EINVAL;
536 if (lpcb->request.reserved2 != 0 || lpcb->request.reserved3 != 0 ||
537 lpcb->request.reserved4 != 0)
538 return -EINVAL;
539 return clp_req(lpcb, CLP_LPS_PCI) ? -EOPNOTSUPP : 0;
540 }
541
clp_pci_command(struct clp_req * req,struct clp_req_hdr * lpcb)542 static int clp_pci_command(struct clp_req *req, struct clp_req_hdr *lpcb)
543 {
544 switch (lpcb->cmd) {
545 case 0x0001: /* store logical-processor characteristics */
546 return clp_pci_slpc(req, (void *) lpcb);
547 case 0x0002: /* list PCI functions */
548 return clp_pci_list(req, (void *) lpcb);
549 case 0x0003: /* query PCI function */
550 return clp_pci_query(req, (void *) lpcb);
551 case 0x0004: /* query PCI function group */
552 return clp_pci_query_grp(req, (void *) lpcb);
553 default:
554 return -EINVAL;
555 }
556 }
557
clp_normal_command(struct clp_req * req)558 static int clp_normal_command(struct clp_req *req)
559 {
560 struct clp_req_hdr *lpcb;
561 void __user *uptr;
562 int rc;
563
564 rc = -EINVAL;
565 if (req->lps != 0 && req->lps != 2)
566 goto out;
567
568 rc = -ENOMEM;
569 lpcb = clp_alloc_block(GFP_KERNEL);
570 if (!lpcb)
571 goto out;
572
573 rc = -EFAULT;
574 uptr = (void __force __user *)(unsigned long) req->data_p;
575 if (copy_from_user(lpcb, uptr, PAGE_SIZE) != 0)
576 goto out_free;
577
578 rc = -EINVAL;
579 if (lpcb->fmt != 0 || lpcb->reserved1 != 0 || lpcb->reserved2 != 0)
580 goto out_free;
581
582 switch (req->lps) {
583 case 0:
584 rc = clp_base_command(req, lpcb);
585 break;
586 case 2:
587 rc = clp_pci_command(req, lpcb);
588 break;
589 }
590 if (rc)
591 goto out_free;
592
593 rc = -EFAULT;
594 if (copy_to_user(uptr, lpcb, PAGE_SIZE) != 0)
595 goto out_free;
596
597 rc = 0;
598
599 out_free:
600 clp_free_block(lpcb);
601 out:
602 return rc;
603 }
604
clp_immediate_command(struct clp_req * req)605 static int clp_immediate_command(struct clp_req *req)
606 {
607 void __user *uptr;
608 unsigned long ilp;
609 int exists;
610
611 if (req->cmd > 1 || clp_get_ilp(&ilp) != 0)
612 return -EINVAL;
613
614 uptr = (void __force __user *)(unsigned long) req->data_p;
615 if (req->cmd == 0) {
616 /* Command code 0: test for a specific processor */
617 exists = test_bit_inv(req->lps, &ilp);
618 return put_user(exists, (int __user *) uptr);
619 }
620 /* Command code 1: return bit mask of installed processors */
621 return put_user(ilp, (unsigned long __user *) uptr);
622 }
623
clp_misc_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)624 static long clp_misc_ioctl(struct file *filp, unsigned int cmd,
625 unsigned long arg)
626 {
627 struct clp_req req;
628 void __user *argp;
629
630 if (cmd != CLP_SYNC)
631 return -EINVAL;
632
633 argp = is_compat_task() ? compat_ptr(arg) : (void __user *) arg;
634 if (copy_from_user(&req, argp, sizeof(req)))
635 return -EFAULT;
636 if (req.r != 0)
637 return -EINVAL;
638 return req.c ? clp_immediate_command(&req) : clp_normal_command(&req);
639 }
640
clp_misc_release(struct inode * inode,struct file * filp)641 static int clp_misc_release(struct inode *inode, struct file *filp)
642 {
643 return 0;
644 }
645
646 static const struct file_operations clp_misc_fops = {
647 .owner = THIS_MODULE,
648 .open = nonseekable_open,
649 .release = clp_misc_release,
650 .unlocked_ioctl = clp_misc_ioctl,
651 .compat_ioctl = clp_misc_ioctl,
652 .llseek = no_llseek,
653 };
654
655 static struct miscdevice clp_misc_device = {
656 .minor = MISC_DYNAMIC_MINOR,
657 .name = "clp",
658 .fops = &clp_misc_fops,
659 };
660
clp_misc_init(void)661 static int __init clp_misc_init(void)
662 {
663 return misc_register(&clp_misc_device);
664 }
665
666 device_initcall(clp_misc_init);
667