1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __ASM_CPU_SH3_DAC_H 3 #define __ASM_CPU_SH3_DAC_H 4 5 /* 6 * Copyright (C) 2003 Andriy Skulysh 7 */ 8 9 10 #define DADR0 0xa40000a0 11 #define DADR1 0xa40000a2 12 #define DACR 0xa40000a4 13 #define DACR_DAOE1 0x80 14 #define DACR_DAOE0 0x40 15 #define DACR_DAE 0x20 16 17 sh_dac_enable(int channel)18static __inline__ void sh_dac_enable(int channel) 19 { 20 unsigned char v; 21 v = __raw_readb(DACR); 22 if(channel) v |= DACR_DAOE1; 23 else v |= DACR_DAOE0; 24 __raw_writeb(v,DACR); 25 } 26 sh_dac_disable(int channel)27static __inline__ void sh_dac_disable(int channel) 28 { 29 unsigned char v; 30 v = __raw_readb(DACR); 31 if(channel) v &= ~DACR_DAOE1; 32 else v &= ~DACR_DAOE0; 33 __raw_writeb(v,DACR); 34 } 35 sh_dac_output(u8 value,int channel)36static __inline__ void sh_dac_output(u8 value, int channel) 37 { 38 if(channel) __raw_writeb(value,DADR1); 39 else __raw_writeb(value,DADR0); 40 } 41 42 #endif /* __ASM_CPU_SH3_DAC_H */ 43