1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* CPU virtualization extensions handling
3 *
4 * This should carry the code for handling CPU virtualization extensions
5 * that needs to live in the kernel core.
6 *
7 * Author: Eduardo Habkost <ehabkost@redhat.com>
8 *
9 * Copyright (C) 2008, Red Hat Inc.
10 *
11 * Contains code from KVM, Copyright (C) 2006 Qumranet, Inc.
12 */
13 #ifndef _ASM_X86_VIRTEX_H
14 #define _ASM_X86_VIRTEX_H
15
16 #include <asm/processor.h>
17
18 #include <asm/vmx.h>
19 #include <asm/svm.h>
20 #include <asm/tlbflush.h>
21
22 /*
23 * VMX functions:
24 */
25
cpu_has_vmx(void)26 static inline int cpu_has_vmx(void)
27 {
28 unsigned long ecx = cpuid_ecx(1);
29 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
30 }
31
32
33 /**
34 * cpu_vmxoff() - Disable VMX on the current CPU
35 *
36 * Disable VMX and clear CR4.VMXE (even if VMXOFF faults)
37 *
38 * Note, VMXOFF causes a #UD if the CPU is !post-VMXON, but it's impossible to
39 * atomically track post-VMXON state, e.g. this may be called in NMI context.
40 * Eat all faults as all other faults on VMXOFF faults are mode related, i.e.
41 * faults are guaranteed to be due to the !post-VMXON check unless the CPU is
42 * magically in RM, VM86, compat mode, or at CPL>0.
43 */
cpu_vmxoff(void)44 static inline int cpu_vmxoff(void)
45 {
46 asm_volatile_goto("1: vmxoff\n\t"
47 _ASM_EXTABLE(1b, %l[fault])
48 ::: "cc", "memory" : fault);
49
50 cr4_clear_bits(X86_CR4_VMXE);
51 return 0;
52
53 fault:
54 cr4_clear_bits(X86_CR4_VMXE);
55 return -EIO;
56 }
57
cpu_vmx_enabled(void)58 static inline int cpu_vmx_enabled(void)
59 {
60 return __read_cr4() & X86_CR4_VMXE;
61 }
62
63 /** Disable VMX if it is enabled on the current CPU
64 *
65 * You shouldn't call this if cpu_has_vmx() returns 0.
66 */
__cpu_emergency_vmxoff(void)67 static inline void __cpu_emergency_vmxoff(void)
68 {
69 if (cpu_vmx_enabled())
70 cpu_vmxoff();
71 }
72
73 /** Disable VMX if it is supported and enabled on the current CPU
74 */
cpu_emergency_vmxoff(void)75 static inline void cpu_emergency_vmxoff(void)
76 {
77 if (cpu_has_vmx())
78 __cpu_emergency_vmxoff();
79 }
80
81
82
83
84 /*
85 * SVM functions:
86 */
87
88 /** Check if the CPU has SVM support
89 *
90 * You can use the 'msg' arg to get a message describing the problem,
91 * if the function returns zero. Simply pass NULL if you are not interested
92 * on the messages; gcc should take care of not generating code for
93 * the messages on this case.
94 */
cpu_has_svm(const char ** msg)95 static inline int cpu_has_svm(const char **msg)
96 {
97 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD &&
98 boot_cpu_data.x86_vendor != X86_VENDOR_HYGON) {
99 if (msg)
100 *msg = "not amd or hygon";
101 return 0;
102 }
103
104 if (!boot_cpu_has(X86_FEATURE_SVM)) {
105 if (msg)
106 *msg = "svm not available";
107 return 0;
108 }
109 return 1;
110 }
111
112
113 /** Disable SVM on the current CPU
114 *
115 * You should call this only if cpu_has_svm() returned true.
116 */
cpu_svm_disable(void)117 static inline void cpu_svm_disable(void)
118 {
119 uint64_t efer;
120
121 wrmsrl(MSR_VM_HSAVE_PA, 0);
122 rdmsrl(MSR_EFER, efer);
123 if (efer & EFER_SVME) {
124 /*
125 * Force GIF=1 prior to disabling SVM to ensure INIT and NMI
126 * aren't blocked, e.g. if a fatal error occurred between CLGI
127 * and STGI. Note, STGI may #UD if SVM is disabled from NMI
128 * context between reading EFER and executing STGI. In that
129 * case, GIF must already be set, otherwise the NMI would have
130 * been blocked, so just eat the fault.
131 */
132 asm_volatile_goto("1: stgi\n\t"
133 _ASM_EXTABLE(1b, %l[fault])
134 ::: "memory" : fault);
135 fault:
136 wrmsrl(MSR_EFER, efer & ~EFER_SVME);
137 }
138 }
139
140 /** Makes sure SVM is disabled, if it is supported on the CPU
141 */
cpu_emergency_svm_disable(void)142 static inline void cpu_emergency_svm_disable(void)
143 {
144 if (cpu_has_svm(NULL))
145 cpu_svm_disable();
146 }
147
148 #endif /* _ASM_X86_VIRTEX_H */
149