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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * AMD Encrypted Register State Support
4  *
5  * Author: Joerg Roedel <jroedel@suse.de>
6  *
7  * This file is not compiled stand-alone. It contains code shared
8  * between the pre-decompression boot code and the running Linux kernel
9  * and is included directly into both code-bases.
10  */
11 
12 #ifndef __BOOT_COMPRESSED
13 #define error(v)	pr_err(v)
14 #define has_cpuflag(f)	boot_cpu_has(f)
15 #endif
16 
sev_es_check_cpu_features(void)17 static bool __init sev_es_check_cpu_features(void)
18 {
19 	if (!has_cpuflag(X86_FEATURE_RDRAND)) {
20 		error("RDRAND instruction not supported - no trusted source of randomness available\n");
21 		return false;
22 	}
23 
24 	return true;
25 }
26 
sev_es_terminate(unsigned int reason)27 static void __noreturn sev_es_terminate(unsigned int reason)
28 {
29 	u64 val = GHCB_MSR_TERM_REQ;
30 
31 	/*
32 	 * Tell the hypervisor what went wrong - only reason-set 0 is
33 	 * currently supported.
34 	 */
35 	val |= GHCB_SEV_TERM_REASON(0, reason);
36 
37 	/* Request Guest Termination from Hypvervisor */
38 	sev_es_wr_ghcb_msr(val);
39 	VMGEXIT();
40 
41 	while (true)
42 		asm volatile("hlt\n" : : : "memory");
43 }
44 
sev_es_negotiate_protocol(void)45 static bool sev_es_negotiate_protocol(void)
46 {
47 	u64 val;
48 
49 	/* Do the GHCB protocol version negotiation */
50 	sev_es_wr_ghcb_msr(GHCB_MSR_SEV_INFO_REQ);
51 	VMGEXIT();
52 	val = sev_es_rd_ghcb_msr();
53 
54 	if (GHCB_MSR_INFO(val) != GHCB_MSR_SEV_INFO_RESP)
55 		return false;
56 
57 	if (GHCB_MSR_PROTO_MAX(val) < GHCB_PROTO_OUR ||
58 	    GHCB_MSR_PROTO_MIN(val) > GHCB_PROTO_OUR)
59 		return false;
60 
61 	return true;
62 }
63 
vc_ghcb_invalidate(struct ghcb * ghcb)64 static __always_inline void vc_ghcb_invalidate(struct ghcb *ghcb)
65 {
66 	ghcb->save.sw_exit_code = 0;
67 	memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
68 }
69 
vc_decoding_needed(unsigned long exit_code)70 static bool vc_decoding_needed(unsigned long exit_code)
71 {
72 	/* Exceptions don't require to decode the instruction */
73 	return !(exit_code >= SVM_EXIT_EXCP_BASE &&
74 		 exit_code <= SVM_EXIT_LAST_EXCP);
75 }
76 
vc_init_em_ctxt(struct es_em_ctxt * ctxt,struct pt_regs * regs,unsigned long exit_code)77 static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,
78 				      struct pt_regs *regs,
79 				      unsigned long exit_code)
80 {
81 	enum es_result ret = ES_OK;
82 
83 	memset(ctxt, 0, sizeof(*ctxt));
84 	ctxt->regs = regs;
85 
86 	if (vc_decoding_needed(exit_code))
87 		ret = vc_decode_insn(ctxt);
88 
89 	return ret;
90 }
91 
vc_finish_insn(struct es_em_ctxt * ctxt)92 static void vc_finish_insn(struct es_em_ctxt *ctxt)
93 {
94 	ctxt->regs->ip += ctxt->insn.length;
95 }
96 
sev_es_ghcb_hv_call(struct ghcb * ghcb,struct es_em_ctxt * ctxt,u64 exit_code,u64 exit_info_1,u64 exit_info_2)97 static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb,
98 					  struct es_em_ctxt *ctxt,
99 					  u64 exit_code, u64 exit_info_1,
100 					  u64 exit_info_2)
101 {
102 	enum es_result ret;
103 
104 	/* Fill in protocol and format specifiers */
105 	ghcb->protocol_version = GHCB_PROTOCOL_MAX;
106 	ghcb->ghcb_usage       = GHCB_DEFAULT_USAGE;
107 
108 	ghcb_set_sw_exit_code(ghcb, exit_code);
109 	ghcb_set_sw_exit_info_1(ghcb, exit_info_1);
110 	ghcb_set_sw_exit_info_2(ghcb, exit_info_2);
111 
112 	sev_es_wr_ghcb_msr(__pa(ghcb));
113 	VMGEXIT();
114 
115 	if ((ghcb->save.sw_exit_info_1 & 0xffffffff) == 1) {
116 		u64 info = ghcb->save.sw_exit_info_2;
117 		unsigned long v;
118 
119 		info = ghcb->save.sw_exit_info_2;
120 		v = info & SVM_EVTINJ_VEC_MASK;
121 
122 		/* Check if exception information from hypervisor is sane. */
123 		if ((info & SVM_EVTINJ_VALID) &&
124 		    ((v == X86_TRAP_GP) || (v == X86_TRAP_UD)) &&
125 		    ((info & SVM_EVTINJ_TYPE_MASK) == SVM_EVTINJ_TYPE_EXEPT)) {
126 			ctxt->fi.vector = v;
127 			if (info & SVM_EVTINJ_VALID_ERR)
128 				ctxt->fi.error_code = info >> 32;
129 			ret = ES_EXCEPTION;
130 		} else {
131 			ret = ES_VMM_ERROR;
132 		}
133 	} else if (ghcb->save.sw_exit_info_1 & 0xffffffff) {
134 		ret = ES_VMM_ERROR;
135 	} else {
136 		ret = ES_OK;
137 	}
138 
139 	return ret;
140 }
141 
142 /*
143  * Boot VC Handler - This is the first VC handler during boot, there is no GHCB
144  * page yet, so it only supports the MSR based communication with the
145  * hypervisor and only the CPUID exit-code.
146  */
do_vc_no_ghcb(struct pt_regs * regs,unsigned long exit_code)147 void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
148 {
149 	unsigned int fn = lower_bits(regs->ax, 32);
150 	unsigned long val;
151 
152 	/* Only CPUID is supported via MSR protocol */
153 	if (exit_code != SVM_EXIT_CPUID)
154 		goto fail;
155 
156 	sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EAX));
157 	VMGEXIT();
158 	val = sev_es_rd_ghcb_msr();
159 	if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
160 		goto fail;
161 	regs->ax = val >> 32;
162 
163 	sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EBX));
164 	VMGEXIT();
165 	val = sev_es_rd_ghcb_msr();
166 	if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
167 		goto fail;
168 	regs->bx = val >> 32;
169 
170 	sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_ECX));
171 	VMGEXIT();
172 	val = sev_es_rd_ghcb_msr();
173 	if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
174 		goto fail;
175 	regs->cx = val >> 32;
176 
177 	sev_es_wr_ghcb_msr(GHCB_CPUID_REQ(fn, GHCB_CPUID_REQ_EDX));
178 	VMGEXIT();
179 	val = sev_es_rd_ghcb_msr();
180 	if (GHCB_RESP_CODE(val) != GHCB_MSR_CPUID_RESP)
181 		goto fail;
182 	regs->dx = val >> 32;
183 
184 	/*
185 	 * This is a VC handler and the #VC is only raised when SEV-ES is
186 	 * active, which means SEV must be active too. Do sanity checks on the
187 	 * CPUID results to make sure the hypervisor does not trick the kernel
188 	 * into the no-sev path. This could map sensitive data unencrypted and
189 	 * make it accessible to the hypervisor.
190 	 *
191 	 * In particular, check for:
192 	 *	- Availability of CPUID leaf 0x8000001f
193 	 *	- SEV CPUID bit.
194 	 *
195 	 * The hypervisor might still report the wrong C-bit position, but this
196 	 * can't be checked here.
197 	 */
198 
199 	if (fn == 0x80000000 && (regs->ax < 0x8000001f))
200 		/* SEV leaf check */
201 		goto fail;
202 	else if ((fn == 0x8000001f && !(regs->ax & BIT(1))))
203 		/* SEV bit */
204 		goto fail;
205 
206 	/* Skip over the CPUID two-byte opcode */
207 	regs->ip += 2;
208 
209 	return;
210 
211 fail:
212 	/* Terminate the guest */
213 	sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
214 }
215 
vc_insn_string_check(struct es_em_ctxt * ctxt,unsigned long address,bool write)216 static enum es_result vc_insn_string_check(struct es_em_ctxt *ctxt,
217 					   unsigned long address,
218 					   bool write)
219 {
220 	if (user_mode(ctxt->regs) && fault_in_kernel_space(address)) {
221 		ctxt->fi.vector     = X86_TRAP_PF;
222 		ctxt->fi.error_code = X86_PF_USER;
223 		ctxt->fi.cr2        = address;
224 		if (write)
225 			ctxt->fi.error_code |= X86_PF_WRITE;
226 
227 		return ES_EXCEPTION;
228 	}
229 
230 	return ES_OK;
231 }
232 
vc_insn_string_read(struct es_em_ctxt * ctxt,void * src,char * buf,unsigned int data_size,unsigned int count,bool backwards)233 static enum es_result vc_insn_string_read(struct es_em_ctxt *ctxt,
234 					  void *src, char *buf,
235 					  unsigned int data_size,
236 					  unsigned int count,
237 					  bool backwards)
238 {
239 	int i, b = backwards ? -1 : 1;
240 	unsigned long address = (unsigned long)src;
241 	enum es_result ret;
242 
243 	ret = vc_insn_string_check(ctxt, address, false);
244 	if (ret != ES_OK)
245 		return ret;
246 
247 	for (i = 0; i < count; i++) {
248 		void *s = src + (i * data_size * b);
249 		char *d = buf + (i * data_size);
250 
251 		ret = vc_read_mem(ctxt, s, d, data_size);
252 		if (ret != ES_OK)
253 			break;
254 	}
255 
256 	return ret;
257 }
258 
vc_insn_string_write(struct es_em_ctxt * ctxt,void * dst,char * buf,unsigned int data_size,unsigned int count,bool backwards)259 static enum es_result vc_insn_string_write(struct es_em_ctxt *ctxt,
260 					   void *dst, char *buf,
261 					   unsigned int data_size,
262 					   unsigned int count,
263 					   bool backwards)
264 {
265 	int i, s = backwards ? -1 : 1;
266 	unsigned long address = (unsigned long)dst;
267 	enum es_result ret;
268 
269 	ret = vc_insn_string_check(ctxt, address, true);
270 	if (ret != ES_OK)
271 		return ret;
272 
273 	for (i = 0; i < count; i++) {
274 		void *d = dst + (i * data_size * s);
275 		char *b = buf + (i * data_size);
276 
277 		ret = vc_write_mem(ctxt, d, b, data_size);
278 		if (ret != ES_OK)
279 			break;
280 	}
281 
282 	return ret;
283 }
284 
285 #define IOIO_TYPE_STR  BIT(2)
286 #define IOIO_TYPE_IN   1
287 #define IOIO_TYPE_INS  (IOIO_TYPE_IN | IOIO_TYPE_STR)
288 #define IOIO_TYPE_OUT  0
289 #define IOIO_TYPE_OUTS (IOIO_TYPE_OUT | IOIO_TYPE_STR)
290 
291 #define IOIO_REP       BIT(3)
292 
293 #define IOIO_ADDR_64   BIT(9)
294 #define IOIO_ADDR_32   BIT(8)
295 #define IOIO_ADDR_16   BIT(7)
296 
297 #define IOIO_DATA_32   BIT(6)
298 #define IOIO_DATA_16   BIT(5)
299 #define IOIO_DATA_8    BIT(4)
300 
301 #define IOIO_SEG_ES    (0 << 10)
302 #define IOIO_SEG_DS    (3 << 10)
303 
vc_ioio_exitinfo(struct es_em_ctxt * ctxt,u64 * exitinfo)304 static enum es_result vc_ioio_exitinfo(struct es_em_ctxt *ctxt, u64 *exitinfo)
305 {
306 	struct insn *insn = &ctxt->insn;
307 	size_t size;
308 	u64 port;
309 
310 	*exitinfo = 0;
311 
312 	switch (insn->opcode.bytes[0]) {
313 	/* INS opcodes */
314 	case 0x6c:
315 	case 0x6d:
316 		*exitinfo |= IOIO_TYPE_INS;
317 		*exitinfo |= IOIO_SEG_ES;
318 		port	   = ctxt->regs->dx & 0xffff;
319 		break;
320 
321 	/* OUTS opcodes */
322 	case 0x6e:
323 	case 0x6f:
324 		*exitinfo |= IOIO_TYPE_OUTS;
325 		*exitinfo |= IOIO_SEG_DS;
326 		port	   = ctxt->regs->dx & 0xffff;
327 		break;
328 
329 	/* IN immediate opcodes */
330 	case 0xe4:
331 	case 0xe5:
332 		*exitinfo |= IOIO_TYPE_IN;
333 		port	   = (u8)insn->immediate.value & 0xffff;
334 		break;
335 
336 	/* OUT immediate opcodes */
337 	case 0xe6:
338 	case 0xe7:
339 		*exitinfo |= IOIO_TYPE_OUT;
340 		port	   = (u8)insn->immediate.value & 0xffff;
341 		break;
342 
343 	/* IN register opcodes */
344 	case 0xec:
345 	case 0xed:
346 		*exitinfo |= IOIO_TYPE_IN;
347 		port	   = ctxt->regs->dx & 0xffff;
348 		break;
349 
350 	/* OUT register opcodes */
351 	case 0xee:
352 	case 0xef:
353 		*exitinfo |= IOIO_TYPE_OUT;
354 		port	   = ctxt->regs->dx & 0xffff;
355 		break;
356 
357 	default:
358 		return ES_DECODE_FAILED;
359 	}
360 
361 	*exitinfo |= port << 16;
362 
363 	switch (insn->opcode.bytes[0]) {
364 	case 0x6c:
365 	case 0x6e:
366 	case 0xe4:
367 	case 0xe6:
368 	case 0xec:
369 	case 0xee:
370 		/* Single byte opcodes */
371 		*exitinfo |= IOIO_DATA_8;
372 		size       = 1;
373 		break;
374 	default:
375 		/* Length determined by instruction parsing */
376 		*exitinfo |= (insn->opnd_bytes == 2) ? IOIO_DATA_16
377 						     : IOIO_DATA_32;
378 		size       = (insn->opnd_bytes == 2) ? 2 : 4;
379 	}
380 
381 	switch (insn->addr_bytes) {
382 	case 2:
383 		*exitinfo |= IOIO_ADDR_16;
384 		break;
385 	case 4:
386 		*exitinfo |= IOIO_ADDR_32;
387 		break;
388 	case 8:
389 		*exitinfo |= IOIO_ADDR_64;
390 		break;
391 	}
392 
393 	if (insn_has_rep_prefix(insn))
394 		*exitinfo |= IOIO_REP;
395 
396 	return vc_ioio_check(ctxt, (u16)port, size);
397 }
398 
vc_handle_ioio(struct ghcb * ghcb,struct es_em_ctxt * ctxt)399 static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
400 {
401 	struct pt_regs *regs = ctxt->regs;
402 	u64 exit_info_1, exit_info_2;
403 	enum es_result ret;
404 
405 	ret = vc_ioio_exitinfo(ctxt, &exit_info_1);
406 	if (ret != ES_OK)
407 		return ret;
408 
409 	if (exit_info_1 & IOIO_TYPE_STR) {
410 
411 		/* (REP) INS/OUTS */
412 
413 		bool df = ((regs->flags & X86_EFLAGS_DF) == X86_EFLAGS_DF);
414 		unsigned int io_bytes, exit_bytes;
415 		unsigned int ghcb_count, op_count;
416 		unsigned long es_base;
417 		u64 sw_scratch;
418 
419 		/*
420 		 * For the string variants with rep prefix the amount of in/out
421 		 * operations per #VC exception is limited so that the kernel
422 		 * has a chance to take interrupts and re-schedule while the
423 		 * instruction is emulated.
424 		 */
425 		io_bytes   = (exit_info_1 >> 4) & 0x7;
426 		ghcb_count = sizeof(ghcb->shared_buffer) / io_bytes;
427 
428 		op_count    = (exit_info_1 & IOIO_REP) ? regs->cx : 1;
429 		exit_info_2 = min(op_count, ghcb_count);
430 		exit_bytes  = exit_info_2 * io_bytes;
431 
432 		es_base = insn_get_seg_base(ctxt->regs, INAT_SEG_REG_ES);
433 
434 		/* Read bytes of OUTS into the shared buffer */
435 		if (!(exit_info_1 & IOIO_TYPE_IN)) {
436 			ret = vc_insn_string_read(ctxt,
437 					       (void *)(es_base + regs->si),
438 					       ghcb->shared_buffer, io_bytes,
439 					       exit_info_2, df);
440 			if (ret)
441 				return ret;
442 		}
443 
444 		/*
445 		 * Issue an VMGEXIT to the HV to consume the bytes from the
446 		 * shared buffer or to have it write them into the shared buffer
447 		 * depending on the instruction: OUTS or INS.
448 		 */
449 		sw_scratch = __pa(ghcb) + offsetof(struct ghcb, shared_buffer);
450 		ghcb_set_sw_scratch(ghcb, sw_scratch);
451 		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO,
452 					  exit_info_1, exit_info_2);
453 		if (ret != ES_OK)
454 			return ret;
455 
456 		/* Read bytes from shared buffer into the guest's destination. */
457 		if (exit_info_1 & IOIO_TYPE_IN) {
458 			ret = vc_insn_string_write(ctxt,
459 						   (void *)(es_base + regs->di),
460 						   ghcb->shared_buffer, io_bytes,
461 						   exit_info_2, df);
462 			if (ret)
463 				return ret;
464 
465 			if (df)
466 				regs->di -= exit_bytes;
467 			else
468 				regs->di += exit_bytes;
469 		} else {
470 			if (df)
471 				regs->si -= exit_bytes;
472 			else
473 				regs->si += exit_bytes;
474 		}
475 
476 		if (exit_info_1 & IOIO_REP)
477 			regs->cx -= exit_info_2;
478 
479 		ret = regs->cx ? ES_RETRY : ES_OK;
480 
481 	} else {
482 
483 		/* IN/OUT into/from rAX */
484 
485 		int bits = (exit_info_1 & 0x70) >> 1;
486 		u64 rax = 0;
487 
488 		if (!(exit_info_1 & IOIO_TYPE_IN))
489 			rax = lower_bits(regs->ax, bits);
490 
491 		ghcb_set_rax(ghcb, rax);
492 
493 		ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_IOIO, exit_info_1, 0);
494 		if (ret != ES_OK)
495 			return ret;
496 
497 		if (exit_info_1 & IOIO_TYPE_IN) {
498 			if (!ghcb_rax_is_valid(ghcb))
499 				return ES_VMM_ERROR;
500 			regs->ax = lower_bits(ghcb->save.rax, bits);
501 		}
502 	}
503 
504 	return ret;
505 }
506 
vc_handle_cpuid(struct ghcb * ghcb,struct es_em_ctxt * ctxt)507 static enum es_result vc_handle_cpuid(struct ghcb *ghcb,
508 				      struct es_em_ctxt *ctxt)
509 {
510 	struct pt_regs *regs = ctxt->regs;
511 	u32 cr4 = native_read_cr4();
512 	enum es_result ret;
513 
514 	ghcb_set_rax(ghcb, regs->ax);
515 	ghcb_set_rcx(ghcb, regs->cx);
516 
517 	if (cr4 & X86_CR4_OSXSAVE)
518 		/* Safe to read xcr0 */
519 		ghcb_set_xcr0(ghcb, xgetbv(XCR_XFEATURE_ENABLED_MASK));
520 	else
521 		/* xgetbv will cause #GP - use reset value for xcr0 */
522 		ghcb_set_xcr0(ghcb, 1);
523 
524 	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_CPUID, 0, 0);
525 	if (ret != ES_OK)
526 		return ret;
527 
528 	if (!(ghcb_rax_is_valid(ghcb) &&
529 	      ghcb_rbx_is_valid(ghcb) &&
530 	      ghcb_rcx_is_valid(ghcb) &&
531 	      ghcb_rdx_is_valid(ghcb)))
532 		return ES_VMM_ERROR;
533 
534 	regs->ax = ghcb->save.rax;
535 	regs->bx = ghcb->save.rbx;
536 	regs->cx = ghcb->save.rcx;
537 	regs->dx = ghcb->save.rdx;
538 
539 	return ES_OK;
540 }
541 
vc_handle_rdtsc(struct ghcb * ghcb,struct es_em_ctxt * ctxt,unsigned long exit_code)542 static enum es_result vc_handle_rdtsc(struct ghcb *ghcb,
543 				      struct es_em_ctxt *ctxt,
544 				      unsigned long exit_code)
545 {
546 	bool rdtscp = (exit_code == SVM_EXIT_RDTSCP);
547 	enum es_result ret;
548 
549 	ret = sev_es_ghcb_hv_call(ghcb, ctxt, exit_code, 0, 0);
550 	if (ret != ES_OK)
551 		return ret;
552 
553 	if (!(ghcb_rax_is_valid(ghcb) && ghcb_rdx_is_valid(ghcb) &&
554 	     (!rdtscp || ghcb_rcx_is_valid(ghcb))))
555 		return ES_VMM_ERROR;
556 
557 	ctxt->regs->ax = ghcb->save.rax;
558 	ctxt->regs->dx = ghcb->save.rdx;
559 	if (rdtscp)
560 		ctxt->regs->cx = ghcb->save.rcx;
561 
562 	return ES_OK;
563 }
564