1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Bluetooth Software UART Qualcomm protocol
4 *
5 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
6 * protocol extension to H4.
7 *
8 * Copyright (C) 2007 Texas Instruments, Inc.
9 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
10 *
11 * Acknowledgements:
12 * This file is based on hci_ll.c, which was...
13 * Written by Ohad Ben-Cohen <ohad@bencohen.org>
14 * which was in turn based on hci_h4.c, which was written
15 * by Maxim Krasnyansky and Marcel Holtmann.
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/clk.h>
20 #include <linux/completion.h>
21 #include <linux/debugfs.h>
22 #include <linux/delay.h>
23 #include <linux/devcoredump.h>
24 #include <linux/device.h>
25 #include <linux/gpio/consumer.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/acpi.h>
30 #include <linux/platform_device.h>
31 #include <linux/regulator/consumer.h>
32 #include <linux/serdev.h>
33 #include <linux/mutex.h>
34 #include <asm/unaligned.h>
35
36 #include <net/bluetooth/bluetooth.h>
37 #include <net/bluetooth/hci_core.h>
38
39 #include "hci_uart.h"
40 #include "btqca.h"
41
42 /* HCI_IBS protocol messages */
43 #define HCI_IBS_SLEEP_IND 0xFE
44 #define HCI_IBS_WAKE_IND 0xFD
45 #define HCI_IBS_WAKE_ACK 0xFC
46 #define HCI_MAX_IBS_SIZE 10
47
48 #define IBS_WAKE_RETRANS_TIMEOUT_MS 100
49 #define IBS_BTSOC_TX_IDLE_TIMEOUT_MS 200
50 #define IBS_HOST_TX_IDLE_TIMEOUT_MS 2000
51 #define CMD_TRANS_TIMEOUT_MS 100
52 #define MEMDUMP_TIMEOUT_MS 8000
53 #define IBS_DISABLE_SSR_TIMEOUT_MS \
54 (MEMDUMP_TIMEOUT_MS + FW_DOWNLOAD_TIMEOUT_MS)
55 #define FW_DOWNLOAD_TIMEOUT_MS 3000
56
57 /* susclk rate */
58 #define SUSCLK_RATE_32KHZ 32768
59
60 /* Controller debug log header */
61 #define QCA_DEBUG_HANDLE 0x2EDC
62
63 /* max retry count when init fails */
64 #define MAX_INIT_RETRIES 3
65
66 /* Controller dump header */
67 #define QCA_SSR_DUMP_HANDLE 0x0108
68 #define QCA_DUMP_PACKET_SIZE 255
69 #define QCA_LAST_SEQUENCE_NUM 0xFFFF
70 #define QCA_CRASHBYTE_PACKET_LEN 1096
71 #define QCA_MEMDUMP_BYTE 0xFB
72
73 enum qca_flags {
74 QCA_IBS_DISABLED,
75 QCA_DROP_VENDOR_EVENT,
76 QCA_SUSPENDING,
77 QCA_MEMDUMP_COLLECTION,
78 QCA_HW_ERROR_EVENT,
79 QCA_SSR_TRIGGERED,
80 QCA_BT_OFF,
81 QCA_ROM_FW,
82 QCA_DEBUGFS_CREATED,
83 };
84
85 enum qca_capabilities {
86 QCA_CAP_WIDEBAND_SPEECH = BIT(0),
87 QCA_CAP_VALID_LE_STATES = BIT(1),
88 };
89
90 /* HCI_IBS transmit side sleep protocol states */
91 enum tx_ibs_states {
92 HCI_IBS_TX_ASLEEP,
93 HCI_IBS_TX_WAKING,
94 HCI_IBS_TX_AWAKE,
95 };
96
97 /* HCI_IBS receive side sleep protocol states */
98 enum rx_states {
99 HCI_IBS_RX_ASLEEP,
100 HCI_IBS_RX_AWAKE,
101 };
102
103 /* HCI_IBS transmit and receive side clock state vote */
104 enum hci_ibs_clock_state_vote {
105 HCI_IBS_VOTE_STATS_UPDATE,
106 HCI_IBS_TX_VOTE_CLOCK_ON,
107 HCI_IBS_TX_VOTE_CLOCK_OFF,
108 HCI_IBS_RX_VOTE_CLOCK_ON,
109 HCI_IBS_RX_VOTE_CLOCK_OFF,
110 };
111
112 /* Controller memory dump states */
113 enum qca_memdump_states {
114 QCA_MEMDUMP_IDLE,
115 QCA_MEMDUMP_COLLECTING,
116 QCA_MEMDUMP_COLLECTED,
117 QCA_MEMDUMP_TIMEOUT,
118 };
119
120 struct qca_memdump_data {
121 char *memdump_buf_head;
122 char *memdump_buf_tail;
123 u32 current_seq_no;
124 u32 received_dump;
125 u32 ram_dump_size;
126 };
127
128 struct qca_memdump_event_hdr {
129 __u8 evt;
130 __u8 plen;
131 __u16 opcode;
132 __u16 seq_no;
133 __u8 reserved;
134 } __packed;
135
136
137 struct qca_dump_size {
138 u32 dump_size;
139 } __packed;
140
141 struct qca_data {
142 struct hci_uart *hu;
143 struct sk_buff *rx_skb;
144 struct sk_buff_head txq;
145 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
146 struct sk_buff_head rx_memdump_q; /* Memdump wait queue */
147 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
148 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
149 u8 rx_ibs_state; /* HCI_IBS receive side power state */
150 bool tx_vote; /* Clock must be on for TX */
151 bool rx_vote; /* Clock must be on for RX */
152 struct timer_list tx_idle_timer;
153 u32 tx_idle_delay;
154 struct timer_list wake_retrans_timer;
155 u32 wake_retrans;
156 struct workqueue_struct *workqueue;
157 struct work_struct ws_awake_rx;
158 struct work_struct ws_awake_device;
159 struct work_struct ws_rx_vote_off;
160 struct work_struct ws_tx_vote_off;
161 struct work_struct ctrl_memdump_evt;
162 struct delayed_work ctrl_memdump_timeout;
163 struct qca_memdump_data *qca_memdump;
164 unsigned long flags;
165 struct completion drop_ev_comp;
166 wait_queue_head_t suspend_wait_q;
167 enum qca_memdump_states memdump_state;
168 struct mutex hci_memdump_lock;
169
170 /* For debugging purpose */
171 u64 ibs_sent_wacks;
172 u64 ibs_sent_slps;
173 u64 ibs_sent_wakes;
174 u64 ibs_recv_wacks;
175 u64 ibs_recv_slps;
176 u64 ibs_recv_wakes;
177 u64 vote_last_jif;
178 u32 vote_on_ms;
179 u32 vote_off_ms;
180 u64 tx_votes_on;
181 u64 rx_votes_on;
182 u64 tx_votes_off;
183 u64 rx_votes_off;
184 u64 votes_on;
185 u64 votes_off;
186 };
187
188 enum qca_speed_type {
189 QCA_INIT_SPEED = 1,
190 QCA_OPER_SPEED
191 };
192
193 /*
194 * Voltage regulator information required for configuring the
195 * QCA Bluetooth chipset
196 */
197 struct qca_vreg {
198 const char *name;
199 unsigned int load_uA;
200 };
201
202 struct qca_device_data {
203 enum qca_btsoc_type soc_type;
204 struct qca_vreg *vregs;
205 size_t num_vregs;
206 uint32_t capabilities;
207 };
208
209 /*
210 * Platform data for the QCA Bluetooth power driver.
211 */
212 struct qca_power {
213 struct device *dev;
214 struct regulator_bulk_data *vreg_bulk;
215 int num_vregs;
216 bool vregs_on;
217 };
218
219 struct qca_serdev {
220 struct hci_uart serdev_hu;
221 struct gpio_desc *bt_en;
222 struct gpio_desc *sw_ctrl;
223 struct clk *susclk;
224 enum qca_btsoc_type btsoc_type;
225 struct qca_power *bt_power;
226 u32 init_speed;
227 u32 oper_speed;
228 const char *firmware_name;
229 };
230
231 static int qca_regulator_enable(struct qca_serdev *qcadev);
232 static void qca_regulator_disable(struct qca_serdev *qcadev);
233 static void qca_power_shutdown(struct hci_uart *hu);
234 static int qca_power_off(struct hci_dev *hdev);
235 static void qca_controller_memdump(struct work_struct *work);
236
qca_soc_type(struct hci_uart * hu)237 static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
238 {
239 enum qca_btsoc_type soc_type;
240
241 if (hu->serdev) {
242 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
243
244 soc_type = qsd->btsoc_type;
245 } else {
246 soc_type = QCA_ROME;
247 }
248
249 return soc_type;
250 }
251
qca_get_firmware_name(struct hci_uart * hu)252 static const char *qca_get_firmware_name(struct hci_uart *hu)
253 {
254 if (hu->serdev) {
255 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
256
257 return qsd->firmware_name;
258 } else {
259 return NULL;
260 }
261 }
262
__serial_clock_on(struct tty_struct * tty)263 static void __serial_clock_on(struct tty_struct *tty)
264 {
265 /* TODO: Some chipset requires to enable UART clock on client
266 * side to save power consumption or manual work is required.
267 * Please put your code to control UART clock here if needed
268 */
269 }
270
__serial_clock_off(struct tty_struct * tty)271 static void __serial_clock_off(struct tty_struct *tty)
272 {
273 /* TODO: Some chipset requires to disable UART clock on client
274 * side to save power consumption or manual work is required.
275 * Please put your code to control UART clock off here if needed
276 */
277 }
278
279 /* serial_clock_vote needs to be called with the ibs lock held */
serial_clock_vote(unsigned long vote,struct hci_uart * hu)280 static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
281 {
282 struct qca_data *qca = hu->priv;
283 unsigned int diff;
284
285 bool old_vote = (qca->tx_vote | qca->rx_vote);
286 bool new_vote;
287
288 switch (vote) {
289 case HCI_IBS_VOTE_STATS_UPDATE:
290 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
291
292 if (old_vote)
293 qca->vote_off_ms += diff;
294 else
295 qca->vote_on_ms += diff;
296 return;
297
298 case HCI_IBS_TX_VOTE_CLOCK_ON:
299 qca->tx_vote = true;
300 qca->tx_votes_on++;
301 break;
302
303 case HCI_IBS_RX_VOTE_CLOCK_ON:
304 qca->rx_vote = true;
305 qca->rx_votes_on++;
306 break;
307
308 case HCI_IBS_TX_VOTE_CLOCK_OFF:
309 qca->tx_vote = false;
310 qca->tx_votes_off++;
311 break;
312
313 case HCI_IBS_RX_VOTE_CLOCK_OFF:
314 qca->rx_vote = false;
315 qca->rx_votes_off++;
316 break;
317
318 default:
319 BT_ERR("Voting irregularity");
320 return;
321 }
322
323 new_vote = qca->rx_vote | qca->tx_vote;
324
325 if (new_vote != old_vote) {
326 if (new_vote)
327 __serial_clock_on(hu->tty);
328 else
329 __serial_clock_off(hu->tty);
330
331 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
332 vote ? "true" : "false");
333
334 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
335
336 if (new_vote) {
337 qca->votes_on++;
338 qca->vote_off_ms += diff;
339 } else {
340 qca->votes_off++;
341 qca->vote_on_ms += diff;
342 }
343 qca->vote_last_jif = jiffies;
344 }
345 }
346
347 /* Builds and sends an HCI_IBS command packet.
348 * These are very simple packets with only 1 cmd byte.
349 */
send_hci_ibs_cmd(u8 cmd,struct hci_uart * hu)350 static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
351 {
352 int err = 0;
353 struct sk_buff *skb = NULL;
354 struct qca_data *qca = hu->priv;
355
356 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
357
358 skb = bt_skb_alloc(1, GFP_ATOMIC);
359 if (!skb) {
360 BT_ERR("Failed to allocate memory for HCI_IBS packet");
361 return -ENOMEM;
362 }
363
364 /* Assign HCI_IBS type */
365 skb_put_u8(skb, cmd);
366
367 skb_queue_tail(&qca->txq, skb);
368
369 return err;
370 }
371
qca_wq_awake_device(struct work_struct * work)372 static void qca_wq_awake_device(struct work_struct *work)
373 {
374 struct qca_data *qca = container_of(work, struct qca_data,
375 ws_awake_device);
376 struct hci_uart *hu = qca->hu;
377 unsigned long retrans_delay;
378 unsigned long flags;
379
380 BT_DBG("hu %p wq awake device", hu);
381
382 /* Vote for serial clock */
383 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
384
385 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
386
387 /* Send wake indication to device */
388 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
389 BT_ERR("Failed to send WAKE to device");
390
391 qca->ibs_sent_wakes++;
392
393 /* Start retransmit timer */
394 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
395 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
396
397 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
398
399 /* Actually send the packets */
400 hci_uart_tx_wakeup(hu);
401 }
402
qca_wq_awake_rx(struct work_struct * work)403 static void qca_wq_awake_rx(struct work_struct *work)
404 {
405 struct qca_data *qca = container_of(work, struct qca_data,
406 ws_awake_rx);
407 struct hci_uart *hu = qca->hu;
408 unsigned long flags;
409
410 BT_DBG("hu %p wq awake rx", hu);
411
412 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
413
414 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
415 qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
416
417 /* Always acknowledge device wake up,
418 * sending IBS message doesn't count as TX ON.
419 */
420 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
421 BT_ERR("Failed to acknowledge device wake up");
422
423 qca->ibs_sent_wacks++;
424
425 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
426
427 /* Actually send the packets */
428 hci_uart_tx_wakeup(hu);
429 }
430
qca_wq_serial_rx_clock_vote_off(struct work_struct * work)431 static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
432 {
433 struct qca_data *qca = container_of(work, struct qca_data,
434 ws_rx_vote_off);
435 struct hci_uart *hu = qca->hu;
436
437 BT_DBG("hu %p rx clock vote off", hu);
438
439 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
440 }
441
qca_wq_serial_tx_clock_vote_off(struct work_struct * work)442 static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
443 {
444 struct qca_data *qca = container_of(work, struct qca_data,
445 ws_tx_vote_off);
446 struct hci_uart *hu = qca->hu;
447
448 BT_DBG("hu %p tx clock vote off", hu);
449
450 /* Run HCI tx handling unlocked */
451 hci_uart_tx_wakeup(hu);
452
453 /* Now that message queued to tty driver, vote for tty clocks off.
454 * It is up to the tty driver to pend the clocks off until tx done.
455 */
456 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
457 }
458
hci_ibs_tx_idle_timeout(struct timer_list * t)459 static void hci_ibs_tx_idle_timeout(struct timer_list *t)
460 {
461 struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
462 struct hci_uart *hu = qca->hu;
463 unsigned long flags;
464
465 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
466
467 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
468 flags, SINGLE_DEPTH_NESTING);
469
470 switch (qca->tx_ibs_state) {
471 case HCI_IBS_TX_AWAKE:
472 /* TX_IDLE, go to SLEEP */
473 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
474 BT_ERR("Failed to send SLEEP to device");
475 break;
476 }
477 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
478 qca->ibs_sent_slps++;
479 queue_work(qca->workqueue, &qca->ws_tx_vote_off);
480 break;
481
482 case HCI_IBS_TX_ASLEEP:
483 case HCI_IBS_TX_WAKING:
484 default:
485 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
486 break;
487 }
488
489 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
490 }
491
hci_ibs_wake_retrans_timeout(struct timer_list * t)492 static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
493 {
494 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
495 struct hci_uart *hu = qca->hu;
496 unsigned long flags, retrans_delay;
497 bool retransmit = false;
498
499 BT_DBG("hu %p wake retransmit timeout in %d state",
500 hu, qca->tx_ibs_state);
501
502 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
503 flags, SINGLE_DEPTH_NESTING);
504
505 /* Don't retransmit the HCI_IBS_WAKE_IND when suspending. */
506 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
507 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
508 return;
509 }
510
511 switch (qca->tx_ibs_state) {
512 case HCI_IBS_TX_WAKING:
513 /* No WAKE_ACK, retransmit WAKE */
514 retransmit = true;
515 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
516 BT_ERR("Failed to acknowledge device wake up");
517 break;
518 }
519 qca->ibs_sent_wakes++;
520 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
521 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
522 break;
523
524 case HCI_IBS_TX_ASLEEP:
525 case HCI_IBS_TX_AWAKE:
526 default:
527 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
528 break;
529 }
530
531 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
532
533 if (retransmit)
534 hci_uart_tx_wakeup(hu);
535 }
536
537
qca_controller_memdump_timeout(struct work_struct * work)538 static void qca_controller_memdump_timeout(struct work_struct *work)
539 {
540 struct qca_data *qca = container_of(work, struct qca_data,
541 ctrl_memdump_timeout.work);
542 struct hci_uart *hu = qca->hu;
543
544 mutex_lock(&qca->hci_memdump_lock);
545 if (test_bit(QCA_MEMDUMP_COLLECTION, &qca->flags)) {
546 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
547 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
548 /* Inject hw error event to reset the device
549 * and driver.
550 */
551 hci_reset_dev(hu->hdev);
552 }
553 }
554
555 mutex_unlock(&qca->hci_memdump_lock);
556 }
557
558
559 /* Initialize protocol */
qca_open(struct hci_uart * hu)560 static int qca_open(struct hci_uart *hu)
561 {
562 struct qca_serdev *qcadev;
563 struct qca_data *qca;
564
565 BT_DBG("hu %p qca_open", hu);
566
567 if (!hci_uart_has_flow_control(hu))
568 return -EOPNOTSUPP;
569
570 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
571 if (!qca)
572 return -ENOMEM;
573
574 skb_queue_head_init(&qca->txq);
575 skb_queue_head_init(&qca->tx_wait_q);
576 skb_queue_head_init(&qca->rx_memdump_q);
577 spin_lock_init(&qca->hci_ibs_lock);
578 mutex_init(&qca->hci_memdump_lock);
579 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
580 if (!qca->workqueue) {
581 BT_ERR("QCA Workqueue not initialized properly");
582 kfree(qca);
583 return -ENOMEM;
584 }
585
586 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
587 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
588 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
589 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
590 INIT_WORK(&qca->ctrl_memdump_evt, qca_controller_memdump);
591 INIT_DELAYED_WORK(&qca->ctrl_memdump_timeout,
592 qca_controller_memdump_timeout);
593 init_waitqueue_head(&qca->suspend_wait_q);
594
595 qca->hu = hu;
596 init_completion(&qca->drop_ev_comp);
597
598 /* Assume we start with both sides asleep -- extra wakes OK */
599 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
600 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
601
602 qca->vote_last_jif = jiffies;
603
604 hu->priv = qca;
605
606 if (hu->serdev) {
607 qcadev = serdev_device_get_drvdata(hu->serdev);
608
609 if (qca_is_wcn399x(qcadev->btsoc_type) ||
610 qca_is_wcn6750(qcadev->btsoc_type))
611 hu->init_speed = qcadev->init_speed;
612
613 if (qcadev->oper_speed)
614 hu->oper_speed = qcadev->oper_speed;
615 }
616
617 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
618 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
619
620 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
621 qca->tx_idle_delay = IBS_HOST_TX_IDLE_TIMEOUT_MS;
622
623 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
624 qca->tx_idle_delay, qca->wake_retrans);
625
626 return 0;
627 }
628
qca_debugfs_init(struct hci_dev * hdev)629 static void qca_debugfs_init(struct hci_dev *hdev)
630 {
631 struct hci_uart *hu = hci_get_drvdata(hdev);
632 struct qca_data *qca = hu->priv;
633 struct dentry *ibs_dir;
634 umode_t mode;
635
636 if (!hdev->debugfs)
637 return;
638
639 if (test_and_set_bit(QCA_DEBUGFS_CREATED, &qca->flags))
640 return;
641
642 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
643
644 /* read only */
645 mode = 0444;
646 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
647 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
648 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
649 &qca->ibs_sent_slps);
650 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
651 &qca->ibs_sent_wakes);
652 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
653 &qca->ibs_sent_wacks);
654 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
655 &qca->ibs_recv_slps);
656 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
657 &qca->ibs_recv_wakes);
658 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
659 &qca->ibs_recv_wacks);
660 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
661 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
662 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
663 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
664 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
665 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
666 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
667 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
668 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
669 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
670
671 /* read/write */
672 mode = 0644;
673 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
674 debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
675 &qca->tx_idle_delay);
676 }
677
678 /* Flush protocol data */
qca_flush(struct hci_uart * hu)679 static int qca_flush(struct hci_uart *hu)
680 {
681 struct qca_data *qca = hu->priv;
682
683 BT_DBG("hu %p qca flush", hu);
684
685 skb_queue_purge(&qca->tx_wait_q);
686 skb_queue_purge(&qca->txq);
687
688 return 0;
689 }
690
691 /* Close protocol */
qca_close(struct hci_uart * hu)692 static int qca_close(struct hci_uart *hu)
693 {
694 struct qca_data *qca = hu->priv;
695
696 BT_DBG("hu %p qca close", hu);
697
698 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
699
700 skb_queue_purge(&qca->tx_wait_q);
701 skb_queue_purge(&qca->txq);
702 skb_queue_purge(&qca->rx_memdump_q);
703 destroy_workqueue(qca->workqueue);
704 del_timer_sync(&qca->tx_idle_timer);
705 del_timer_sync(&qca->wake_retrans_timer);
706 qca->hu = NULL;
707
708 kfree_skb(qca->rx_skb);
709
710 hu->priv = NULL;
711
712 kfree(qca);
713
714 return 0;
715 }
716
717 /* Called upon a wake-up-indication from the device.
718 */
device_want_to_wakeup(struct hci_uart * hu)719 static void device_want_to_wakeup(struct hci_uart *hu)
720 {
721 unsigned long flags;
722 struct qca_data *qca = hu->priv;
723
724 BT_DBG("hu %p want to wake up", hu);
725
726 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
727
728 qca->ibs_recv_wakes++;
729
730 /* Don't wake the rx up when suspending. */
731 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
732 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
733 return;
734 }
735
736 switch (qca->rx_ibs_state) {
737 case HCI_IBS_RX_ASLEEP:
738 /* Make sure clock is on - we may have turned clock off since
739 * receiving the wake up indicator awake rx clock.
740 */
741 queue_work(qca->workqueue, &qca->ws_awake_rx);
742 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
743 return;
744
745 case HCI_IBS_RX_AWAKE:
746 /* Always acknowledge device wake up,
747 * sending IBS message doesn't count as TX ON.
748 */
749 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
750 BT_ERR("Failed to acknowledge device wake up");
751 break;
752 }
753 qca->ibs_sent_wacks++;
754 break;
755
756 default:
757 /* Any other state is illegal */
758 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
759 qca->rx_ibs_state);
760 break;
761 }
762
763 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
764
765 /* Actually send the packets */
766 hci_uart_tx_wakeup(hu);
767 }
768
769 /* Called upon a sleep-indication from the device.
770 */
device_want_to_sleep(struct hci_uart * hu)771 static void device_want_to_sleep(struct hci_uart *hu)
772 {
773 unsigned long flags;
774 struct qca_data *qca = hu->priv;
775
776 BT_DBG("hu %p want to sleep in %d state", hu, qca->rx_ibs_state);
777
778 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
779
780 qca->ibs_recv_slps++;
781
782 switch (qca->rx_ibs_state) {
783 case HCI_IBS_RX_AWAKE:
784 /* Update state */
785 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
786 /* Vote off rx clock under workqueue */
787 queue_work(qca->workqueue, &qca->ws_rx_vote_off);
788 break;
789
790 case HCI_IBS_RX_ASLEEP:
791 break;
792
793 default:
794 /* Any other state is illegal */
795 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
796 qca->rx_ibs_state);
797 break;
798 }
799
800 wake_up_interruptible(&qca->suspend_wait_q);
801
802 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
803 }
804
805 /* Called upon wake-up-acknowledgement from the device
806 */
device_woke_up(struct hci_uart * hu)807 static void device_woke_up(struct hci_uart *hu)
808 {
809 unsigned long flags, idle_delay;
810 struct qca_data *qca = hu->priv;
811 struct sk_buff *skb = NULL;
812
813 BT_DBG("hu %p woke up", hu);
814
815 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
816
817 qca->ibs_recv_wacks++;
818
819 /* Don't react to the wake-up-acknowledgment when suspending. */
820 if (test_bit(QCA_SUSPENDING, &qca->flags)) {
821 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
822 return;
823 }
824
825 switch (qca->tx_ibs_state) {
826 case HCI_IBS_TX_AWAKE:
827 /* Expect one if we send 2 WAKEs */
828 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
829 qca->tx_ibs_state);
830 break;
831
832 case HCI_IBS_TX_WAKING:
833 /* Send pending packets */
834 while ((skb = skb_dequeue(&qca->tx_wait_q)))
835 skb_queue_tail(&qca->txq, skb);
836
837 /* Switch timers and change state to HCI_IBS_TX_AWAKE */
838 del_timer(&qca->wake_retrans_timer);
839 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
840 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
841 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
842 break;
843
844 case HCI_IBS_TX_ASLEEP:
845 default:
846 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
847 qca->tx_ibs_state);
848 break;
849 }
850
851 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
852
853 /* Actually send the packets */
854 hci_uart_tx_wakeup(hu);
855 }
856
857 /* Enqueue frame for transmittion (padding, crc, etc) may be called from
858 * two simultaneous tasklets.
859 */
qca_enqueue(struct hci_uart * hu,struct sk_buff * skb)860 static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
861 {
862 unsigned long flags = 0, idle_delay;
863 struct qca_data *qca = hu->priv;
864
865 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
866 qca->tx_ibs_state);
867
868 if (test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
869 /* As SSR is in progress, ignore the packets */
870 bt_dev_dbg(hu->hdev, "SSR is in progress");
871 kfree_skb(skb);
872 return 0;
873 }
874
875 /* Prepend skb with frame type */
876 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
877
878 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
879
880 /* Don't go to sleep in middle of patch download or
881 * Out-Of-Band(GPIOs control) sleep is selected.
882 * Don't wake the device up when suspending.
883 */
884 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
885 test_bit(QCA_SUSPENDING, &qca->flags)) {
886 skb_queue_tail(&qca->txq, skb);
887 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
888 return 0;
889 }
890
891 /* Act according to current state */
892 switch (qca->tx_ibs_state) {
893 case HCI_IBS_TX_AWAKE:
894 BT_DBG("Device awake, sending normally");
895 skb_queue_tail(&qca->txq, skb);
896 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
897 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
898 break;
899
900 case HCI_IBS_TX_ASLEEP:
901 BT_DBG("Device asleep, waking up and queueing packet");
902 /* Save packet for later */
903 skb_queue_tail(&qca->tx_wait_q, skb);
904
905 qca->tx_ibs_state = HCI_IBS_TX_WAKING;
906 /* Schedule a work queue to wake up device */
907 queue_work(qca->workqueue, &qca->ws_awake_device);
908 break;
909
910 case HCI_IBS_TX_WAKING:
911 BT_DBG("Device waking up, queueing packet");
912 /* Transient state; just keep packet for later */
913 skb_queue_tail(&qca->tx_wait_q, skb);
914 break;
915
916 default:
917 BT_ERR("Illegal tx state: %d (losing packet)",
918 qca->tx_ibs_state);
919 dev_kfree_skb_irq(skb);
920 break;
921 }
922
923 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
924
925 return 0;
926 }
927
qca_ibs_sleep_ind(struct hci_dev * hdev,struct sk_buff * skb)928 static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
929 {
930 struct hci_uart *hu = hci_get_drvdata(hdev);
931
932 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
933
934 device_want_to_sleep(hu);
935
936 kfree_skb(skb);
937 return 0;
938 }
939
qca_ibs_wake_ind(struct hci_dev * hdev,struct sk_buff * skb)940 static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
941 {
942 struct hci_uart *hu = hci_get_drvdata(hdev);
943
944 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
945
946 device_want_to_wakeup(hu);
947
948 kfree_skb(skb);
949 return 0;
950 }
951
qca_ibs_wake_ack(struct hci_dev * hdev,struct sk_buff * skb)952 static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
953 {
954 struct hci_uart *hu = hci_get_drvdata(hdev);
955
956 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
957
958 device_woke_up(hu);
959
960 kfree_skb(skb);
961 return 0;
962 }
963
qca_recv_acl_data(struct hci_dev * hdev,struct sk_buff * skb)964 static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
965 {
966 /* We receive debug logs from chip as an ACL packets.
967 * Instead of sending the data to ACL to decode the
968 * received data, we are pushing them to the above layers
969 * as a diagnostic packet.
970 */
971 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
972 return hci_recv_diag(hdev, skb);
973
974 return hci_recv_frame(hdev, skb);
975 }
976
qca_controller_memdump(struct work_struct * work)977 static void qca_controller_memdump(struct work_struct *work)
978 {
979 struct qca_data *qca = container_of(work, struct qca_data,
980 ctrl_memdump_evt);
981 struct hci_uart *hu = qca->hu;
982 struct sk_buff *skb;
983 struct qca_memdump_event_hdr *cmd_hdr;
984 struct qca_memdump_data *qca_memdump = qca->qca_memdump;
985 struct qca_dump_size *dump;
986 char *memdump_buf;
987 char nullBuff[QCA_DUMP_PACKET_SIZE] = { 0 };
988 u16 seq_no;
989 u32 dump_size;
990 u32 rx_size;
991 enum qca_btsoc_type soc_type = qca_soc_type(hu);
992
993 while ((skb = skb_dequeue(&qca->rx_memdump_q))) {
994
995 mutex_lock(&qca->hci_memdump_lock);
996 /* Skip processing the received packets if timeout detected
997 * or memdump collection completed.
998 */
999 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1000 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1001 mutex_unlock(&qca->hci_memdump_lock);
1002 return;
1003 }
1004
1005 if (!qca_memdump) {
1006 qca_memdump = kzalloc(sizeof(struct qca_memdump_data),
1007 GFP_ATOMIC);
1008 if (!qca_memdump) {
1009 mutex_unlock(&qca->hci_memdump_lock);
1010 return;
1011 }
1012
1013 qca->qca_memdump = qca_memdump;
1014 }
1015
1016 qca->memdump_state = QCA_MEMDUMP_COLLECTING;
1017 cmd_hdr = (void *) skb->data;
1018 seq_no = __le16_to_cpu(cmd_hdr->seq_no);
1019 skb_pull(skb, sizeof(struct qca_memdump_event_hdr));
1020
1021 if (!seq_no) {
1022
1023 /* This is the first frame of memdump packet from
1024 * the controller, Disable IBS to recevie dump
1025 * with out any interruption, ideally time required for
1026 * the controller to send the dump is 8 seconds. let us
1027 * start timer to handle this asynchronous activity.
1028 */
1029 set_bit(QCA_IBS_DISABLED, &qca->flags);
1030 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1031 dump = (void *) skb->data;
1032 dump_size = __le32_to_cpu(dump->dump_size);
1033 if (!(dump_size)) {
1034 bt_dev_err(hu->hdev, "Rx invalid memdump size");
1035 kfree(qca_memdump);
1036 kfree_skb(skb);
1037 qca->qca_memdump = NULL;
1038 mutex_unlock(&qca->hci_memdump_lock);
1039 return;
1040 }
1041
1042 bt_dev_info(hu->hdev, "QCA collecting dump of size:%u",
1043 dump_size);
1044 queue_delayed_work(qca->workqueue,
1045 &qca->ctrl_memdump_timeout,
1046 msecs_to_jiffies(MEMDUMP_TIMEOUT_MS)
1047 );
1048
1049 skb_pull(skb, sizeof(dump_size));
1050 memdump_buf = vmalloc(dump_size);
1051 qca_memdump->ram_dump_size = dump_size;
1052 qca_memdump->memdump_buf_head = memdump_buf;
1053 qca_memdump->memdump_buf_tail = memdump_buf;
1054 }
1055
1056 memdump_buf = qca_memdump->memdump_buf_tail;
1057
1058 /* If sequence no 0 is missed then there is no point in
1059 * accepting the other sequences.
1060 */
1061 if (!memdump_buf) {
1062 bt_dev_err(hu->hdev, "QCA: Discarding other packets");
1063 kfree(qca_memdump);
1064 kfree_skb(skb);
1065 qca->qca_memdump = NULL;
1066 mutex_unlock(&qca->hci_memdump_lock);
1067 return;
1068 }
1069
1070 /* There could be chance of missing some packets from
1071 * the controller. In such cases let us store the dummy
1072 * packets in the buffer.
1073 */
1074 /* For QCA6390, controller does not lost packets but
1075 * sequence number field of packet sometimes has error
1076 * bits, so skip this checking for missing packet.
1077 */
1078 while ((seq_no > qca_memdump->current_seq_no + 1) &&
1079 (soc_type != QCA_QCA6390) &&
1080 seq_no != QCA_LAST_SEQUENCE_NUM) {
1081 bt_dev_err(hu->hdev, "QCA controller missed packet:%d",
1082 qca_memdump->current_seq_no);
1083 rx_size = qca_memdump->received_dump;
1084 rx_size += QCA_DUMP_PACKET_SIZE;
1085 if (rx_size > qca_memdump->ram_dump_size) {
1086 bt_dev_err(hu->hdev,
1087 "QCA memdump received %d, no space for missed packet",
1088 qca_memdump->received_dump);
1089 break;
1090 }
1091 memcpy(memdump_buf, nullBuff, QCA_DUMP_PACKET_SIZE);
1092 memdump_buf = memdump_buf + QCA_DUMP_PACKET_SIZE;
1093 qca_memdump->received_dump += QCA_DUMP_PACKET_SIZE;
1094 qca_memdump->current_seq_no++;
1095 }
1096
1097 rx_size = qca_memdump->received_dump + skb->len;
1098 if (rx_size <= qca_memdump->ram_dump_size) {
1099 if ((seq_no != QCA_LAST_SEQUENCE_NUM) &&
1100 (seq_no != qca_memdump->current_seq_no))
1101 bt_dev_err(hu->hdev,
1102 "QCA memdump unexpected packet %d",
1103 seq_no);
1104 bt_dev_dbg(hu->hdev,
1105 "QCA memdump packet %d with length %d",
1106 seq_no, skb->len);
1107 memcpy(memdump_buf, (unsigned char *)skb->data,
1108 skb->len);
1109 memdump_buf = memdump_buf + skb->len;
1110 qca_memdump->memdump_buf_tail = memdump_buf;
1111 qca_memdump->current_seq_no = seq_no + 1;
1112 qca_memdump->received_dump += skb->len;
1113 } else {
1114 bt_dev_err(hu->hdev,
1115 "QCA memdump received %d, no space for packet %d",
1116 qca_memdump->received_dump, seq_no);
1117 }
1118 qca->qca_memdump = qca_memdump;
1119 kfree_skb(skb);
1120 if (seq_no == QCA_LAST_SEQUENCE_NUM) {
1121 bt_dev_info(hu->hdev,
1122 "QCA memdump Done, received %d, total %d",
1123 qca_memdump->received_dump,
1124 qca_memdump->ram_dump_size);
1125 memdump_buf = qca_memdump->memdump_buf_head;
1126 dev_coredumpv(&hu->serdev->dev, memdump_buf,
1127 qca_memdump->received_dump, GFP_KERNEL);
1128 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1129 kfree(qca->qca_memdump);
1130 qca->qca_memdump = NULL;
1131 qca->memdump_state = QCA_MEMDUMP_COLLECTED;
1132 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1133 }
1134
1135 mutex_unlock(&qca->hci_memdump_lock);
1136 }
1137
1138 }
1139
qca_controller_memdump_event(struct hci_dev * hdev,struct sk_buff * skb)1140 static int qca_controller_memdump_event(struct hci_dev *hdev,
1141 struct sk_buff *skb)
1142 {
1143 struct hci_uart *hu = hci_get_drvdata(hdev);
1144 struct qca_data *qca = hu->priv;
1145
1146 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1147 skb_queue_tail(&qca->rx_memdump_q, skb);
1148 queue_work(qca->workqueue, &qca->ctrl_memdump_evt);
1149
1150 return 0;
1151 }
1152
qca_recv_event(struct hci_dev * hdev,struct sk_buff * skb)1153 static int qca_recv_event(struct hci_dev *hdev, struct sk_buff *skb)
1154 {
1155 struct hci_uart *hu = hci_get_drvdata(hdev);
1156 struct qca_data *qca = hu->priv;
1157
1158 if (test_bit(QCA_DROP_VENDOR_EVENT, &qca->flags)) {
1159 struct hci_event_hdr *hdr = (void *)skb->data;
1160
1161 /* For the WCN3990 the vendor command for a baudrate change
1162 * isn't sent as synchronous HCI command, because the
1163 * controller sends the corresponding vendor event with the
1164 * new baudrate. The event is received and properly decoded
1165 * after changing the baudrate of the host port. It needs to
1166 * be dropped, otherwise it can be misinterpreted as
1167 * response to a later firmware download command (also a
1168 * vendor command).
1169 */
1170
1171 if (hdr->evt == HCI_EV_VENDOR)
1172 complete(&qca->drop_ev_comp);
1173
1174 kfree_skb(skb);
1175
1176 return 0;
1177 }
1178 /* We receive chip memory dump as an event packet, With a dedicated
1179 * handler followed by a hardware error event. When this event is
1180 * received we store dump into a file before closing hci. This
1181 * dump will help in triaging the issues.
1182 */
1183 if ((skb->data[0] == HCI_VENDOR_PKT) &&
1184 (get_unaligned_be16(skb->data + 2) == QCA_SSR_DUMP_HANDLE))
1185 return qca_controller_memdump_event(hdev, skb);
1186
1187 return hci_recv_frame(hdev, skb);
1188 }
1189
1190 #define QCA_IBS_SLEEP_IND_EVENT \
1191 .type = HCI_IBS_SLEEP_IND, \
1192 .hlen = 0, \
1193 .loff = 0, \
1194 .lsize = 0, \
1195 .maxlen = HCI_MAX_IBS_SIZE
1196
1197 #define QCA_IBS_WAKE_IND_EVENT \
1198 .type = HCI_IBS_WAKE_IND, \
1199 .hlen = 0, \
1200 .loff = 0, \
1201 .lsize = 0, \
1202 .maxlen = HCI_MAX_IBS_SIZE
1203
1204 #define QCA_IBS_WAKE_ACK_EVENT \
1205 .type = HCI_IBS_WAKE_ACK, \
1206 .hlen = 0, \
1207 .loff = 0, \
1208 .lsize = 0, \
1209 .maxlen = HCI_MAX_IBS_SIZE
1210
1211 static const struct h4_recv_pkt qca_recv_pkts[] = {
1212 { H4_RECV_ACL, .recv = qca_recv_acl_data },
1213 { H4_RECV_SCO, .recv = hci_recv_frame },
1214 { H4_RECV_EVENT, .recv = qca_recv_event },
1215 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
1216 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
1217 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
1218 };
1219
qca_recv(struct hci_uart * hu,const void * data,int count)1220 static int qca_recv(struct hci_uart *hu, const void *data, int count)
1221 {
1222 struct qca_data *qca = hu->priv;
1223
1224 if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
1225 return -EUNATCH;
1226
1227 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
1228 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
1229 if (IS_ERR(qca->rx_skb)) {
1230 int err = PTR_ERR(qca->rx_skb);
1231 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
1232 qca->rx_skb = NULL;
1233 return err;
1234 }
1235
1236 return count;
1237 }
1238
qca_dequeue(struct hci_uart * hu)1239 static struct sk_buff *qca_dequeue(struct hci_uart *hu)
1240 {
1241 struct qca_data *qca = hu->priv;
1242
1243 return skb_dequeue(&qca->txq);
1244 }
1245
qca_get_baudrate_value(int speed)1246 static uint8_t qca_get_baudrate_value(int speed)
1247 {
1248 switch (speed) {
1249 case 9600:
1250 return QCA_BAUDRATE_9600;
1251 case 19200:
1252 return QCA_BAUDRATE_19200;
1253 case 38400:
1254 return QCA_BAUDRATE_38400;
1255 case 57600:
1256 return QCA_BAUDRATE_57600;
1257 case 115200:
1258 return QCA_BAUDRATE_115200;
1259 case 230400:
1260 return QCA_BAUDRATE_230400;
1261 case 460800:
1262 return QCA_BAUDRATE_460800;
1263 case 500000:
1264 return QCA_BAUDRATE_500000;
1265 case 921600:
1266 return QCA_BAUDRATE_921600;
1267 case 1000000:
1268 return QCA_BAUDRATE_1000000;
1269 case 2000000:
1270 return QCA_BAUDRATE_2000000;
1271 case 3000000:
1272 return QCA_BAUDRATE_3000000;
1273 case 3200000:
1274 return QCA_BAUDRATE_3200000;
1275 case 3500000:
1276 return QCA_BAUDRATE_3500000;
1277 default:
1278 return QCA_BAUDRATE_115200;
1279 }
1280 }
1281
qca_set_baudrate(struct hci_dev * hdev,uint8_t baudrate)1282 static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
1283 {
1284 struct hci_uart *hu = hci_get_drvdata(hdev);
1285 struct qca_data *qca = hu->priv;
1286 struct sk_buff *skb;
1287 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
1288
1289 if (baudrate > QCA_BAUDRATE_3200000)
1290 return -EINVAL;
1291
1292 cmd[4] = baudrate;
1293
1294 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
1295 if (!skb) {
1296 bt_dev_err(hdev, "Failed to allocate baudrate packet");
1297 return -ENOMEM;
1298 }
1299
1300 /* Assign commands to change baudrate and packet type. */
1301 skb_put_data(skb, cmd, sizeof(cmd));
1302 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1303
1304 skb_queue_tail(&qca->txq, skb);
1305 hci_uart_tx_wakeup(hu);
1306
1307 /* Wait for the baudrate change request to be sent */
1308
1309 while (!skb_queue_empty(&qca->txq))
1310 usleep_range(100, 200);
1311
1312 if (hu->serdev)
1313 serdev_device_wait_until_sent(hu->serdev,
1314 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1315
1316 /* Give the controller time to process the request */
1317 if (qca_is_wcn399x(qca_soc_type(hu)) ||
1318 qca_is_wcn6750(qca_soc_type(hu)))
1319 usleep_range(1000, 10000);
1320 else
1321 msleep(300);
1322
1323 return 0;
1324 }
1325
host_set_baudrate(struct hci_uart * hu,unsigned int speed)1326 static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1327 {
1328 if (hu->serdev)
1329 serdev_device_set_baudrate(hu->serdev, speed);
1330 else
1331 hci_uart_set_baudrate(hu, speed);
1332 }
1333
qca_send_power_pulse(struct hci_uart * hu,bool on)1334 static int qca_send_power_pulse(struct hci_uart *hu, bool on)
1335 {
1336 int ret;
1337 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
1338 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
1339
1340 /* These power pulses are single byte command which are sent
1341 * at required baudrate to wcn3990. On wcn3990, we have an external
1342 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1343 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1344 * and also we use the same power inputs to turn on and off for
1345 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1346 * we send a power on pulse at 115200 bps. This algorithm will help to
1347 * save power. Disabling hardware flow control is mandatory while
1348 * sending power pulses to SoC.
1349 */
1350 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
1351
1352 serdev_device_write_flush(hu->serdev);
1353 hci_uart_set_flow_control(hu, true);
1354 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1355 if (ret < 0) {
1356 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1357 return ret;
1358 }
1359
1360 serdev_device_wait_until_sent(hu->serdev, timeout);
1361 hci_uart_set_flow_control(hu, false);
1362
1363 /* Give to controller time to boot/shutdown */
1364 if (on)
1365 msleep(100);
1366 else
1367 usleep_range(1000, 10000);
1368
1369 return 0;
1370 }
1371
qca_get_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1372 static unsigned int qca_get_speed(struct hci_uart *hu,
1373 enum qca_speed_type speed_type)
1374 {
1375 unsigned int speed = 0;
1376
1377 if (speed_type == QCA_INIT_SPEED) {
1378 if (hu->init_speed)
1379 speed = hu->init_speed;
1380 else if (hu->proto->init_speed)
1381 speed = hu->proto->init_speed;
1382 } else {
1383 if (hu->oper_speed)
1384 speed = hu->oper_speed;
1385 else if (hu->proto->oper_speed)
1386 speed = hu->proto->oper_speed;
1387 }
1388
1389 return speed;
1390 }
1391
qca_check_speeds(struct hci_uart * hu)1392 static int qca_check_speeds(struct hci_uart *hu)
1393 {
1394 if (qca_is_wcn399x(qca_soc_type(hu)) ||
1395 qca_is_wcn6750(qca_soc_type(hu))) {
1396 if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1397 !qca_get_speed(hu, QCA_OPER_SPEED))
1398 return -EINVAL;
1399 } else {
1400 if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1401 !qca_get_speed(hu, QCA_OPER_SPEED))
1402 return -EINVAL;
1403 }
1404
1405 return 0;
1406 }
1407
qca_set_speed(struct hci_uart * hu,enum qca_speed_type speed_type)1408 static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1409 {
1410 unsigned int speed, qca_baudrate;
1411 struct qca_data *qca = hu->priv;
1412 int ret = 0;
1413
1414 if (speed_type == QCA_INIT_SPEED) {
1415 speed = qca_get_speed(hu, QCA_INIT_SPEED);
1416 if (speed)
1417 host_set_baudrate(hu, speed);
1418 } else {
1419 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1420
1421 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1422 if (!speed)
1423 return 0;
1424
1425 /* Disable flow control for wcn3990 to deassert RTS while
1426 * changing the baudrate of chip and host.
1427 */
1428 if (qca_is_wcn399x(soc_type) ||
1429 qca_is_wcn6750(soc_type))
1430 hci_uart_set_flow_control(hu, true);
1431
1432 if (soc_type == QCA_WCN3990) {
1433 reinit_completion(&qca->drop_ev_comp);
1434 set_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1435 }
1436
1437 qca_baudrate = qca_get_baudrate_value(speed);
1438 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
1439 ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1440 if (ret)
1441 goto error;
1442
1443 host_set_baudrate(hu, speed);
1444
1445 error:
1446 if (qca_is_wcn399x(soc_type) ||
1447 qca_is_wcn6750(soc_type))
1448 hci_uart_set_flow_control(hu, false);
1449
1450 if (soc_type == QCA_WCN3990) {
1451 /* Wait for the controller to send the vendor event
1452 * for the baudrate change command.
1453 */
1454 if (!wait_for_completion_timeout(&qca->drop_ev_comp,
1455 msecs_to_jiffies(100))) {
1456 bt_dev_err(hu->hdev,
1457 "Failed to change controller baudrate\n");
1458 ret = -ETIMEDOUT;
1459 }
1460
1461 clear_bit(QCA_DROP_VENDOR_EVENT, &qca->flags);
1462 }
1463 }
1464
1465 return ret;
1466 }
1467
qca_send_crashbuffer(struct hci_uart * hu)1468 static int qca_send_crashbuffer(struct hci_uart *hu)
1469 {
1470 struct qca_data *qca = hu->priv;
1471 struct sk_buff *skb;
1472
1473 skb = bt_skb_alloc(QCA_CRASHBYTE_PACKET_LEN, GFP_KERNEL);
1474 if (!skb) {
1475 bt_dev_err(hu->hdev, "Failed to allocate memory for skb packet");
1476 return -ENOMEM;
1477 }
1478
1479 /* We forcefully crash the controller, by sending 0xfb byte for
1480 * 1024 times. We also might have chance of losing data, To be
1481 * on safer side we send 1096 bytes to the SoC.
1482 */
1483 memset(skb_put(skb, QCA_CRASHBYTE_PACKET_LEN), QCA_MEMDUMP_BYTE,
1484 QCA_CRASHBYTE_PACKET_LEN);
1485 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
1486 bt_dev_info(hu->hdev, "crash the soc to collect controller dump");
1487 skb_queue_tail(&qca->txq, skb);
1488 hci_uart_tx_wakeup(hu);
1489
1490 return 0;
1491 }
1492
qca_wait_for_dump_collection(struct hci_dev * hdev)1493 static void qca_wait_for_dump_collection(struct hci_dev *hdev)
1494 {
1495 struct hci_uart *hu = hci_get_drvdata(hdev);
1496 struct qca_data *qca = hu->priv;
1497
1498 wait_on_bit_timeout(&qca->flags, QCA_MEMDUMP_COLLECTION,
1499 TASK_UNINTERRUPTIBLE, MEMDUMP_TIMEOUT_MS);
1500
1501 clear_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1502 }
1503
qca_hw_error(struct hci_dev * hdev,u8 code)1504 static void qca_hw_error(struct hci_dev *hdev, u8 code)
1505 {
1506 struct hci_uart *hu = hci_get_drvdata(hdev);
1507 struct qca_data *qca = hu->priv;
1508
1509 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1510 set_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1511 bt_dev_info(hdev, "mem_dump_status: %d", qca->memdump_state);
1512
1513 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1514 /* If hardware error event received for other than QCA
1515 * soc memory dump event, then we need to crash the SOC
1516 * and wait here for 8 seconds to get the dump packets.
1517 * This will block main thread to be on hold until we
1518 * collect dump.
1519 */
1520 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1521 qca_send_crashbuffer(hu);
1522 qca_wait_for_dump_collection(hdev);
1523 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1524 /* Let us wait here until memory dump collected or
1525 * memory dump timer expired.
1526 */
1527 bt_dev_info(hdev, "waiting for dump to complete");
1528 qca_wait_for_dump_collection(hdev);
1529 }
1530
1531 mutex_lock(&qca->hci_memdump_lock);
1532 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1533 bt_dev_err(hu->hdev, "clearing allocated memory due to memdump timeout");
1534 if (qca->qca_memdump) {
1535 vfree(qca->qca_memdump->memdump_buf_head);
1536 kfree(qca->qca_memdump);
1537 qca->qca_memdump = NULL;
1538 }
1539 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1540 cancel_delayed_work(&qca->ctrl_memdump_timeout);
1541 }
1542 mutex_unlock(&qca->hci_memdump_lock);
1543
1544 if (qca->memdump_state == QCA_MEMDUMP_TIMEOUT ||
1545 qca->memdump_state == QCA_MEMDUMP_COLLECTED) {
1546 cancel_work_sync(&qca->ctrl_memdump_evt);
1547 skb_queue_purge(&qca->rx_memdump_q);
1548 }
1549
1550 clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
1551 }
1552
qca_cmd_timeout(struct hci_dev * hdev)1553 static void qca_cmd_timeout(struct hci_dev *hdev)
1554 {
1555 struct hci_uart *hu = hci_get_drvdata(hdev);
1556 struct qca_data *qca = hu->priv;
1557
1558 set_bit(QCA_SSR_TRIGGERED, &qca->flags);
1559 if (qca->memdump_state == QCA_MEMDUMP_IDLE) {
1560 set_bit(QCA_MEMDUMP_COLLECTION, &qca->flags);
1561 qca_send_crashbuffer(hu);
1562 qca_wait_for_dump_collection(hdev);
1563 } else if (qca->memdump_state == QCA_MEMDUMP_COLLECTING) {
1564 /* Let us wait here until memory dump collected or
1565 * memory dump timer expired.
1566 */
1567 bt_dev_info(hdev, "waiting for dump to complete");
1568 qca_wait_for_dump_collection(hdev);
1569 }
1570
1571 mutex_lock(&qca->hci_memdump_lock);
1572 if (qca->memdump_state != QCA_MEMDUMP_COLLECTED) {
1573 qca->memdump_state = QCA_MEMDUMP_TIMEOUT;
1574 if (!test_bit(QCA_HW_ERROR_EVENT, &qca->flags)) {
1575 /* Inject hw error event to reset the device
1576 * and driver.
1577 */
1578 hci_reset_dev(hu->hdev);
1579 }
1580 }
1581 mutex_unlock(&qca->hci_memdump_lock);
1582 }
1583
qca_prevent_wake(struct hci_dev * hdev)1584 static bool qca_prevent_wake(struct hci_dev *hdev)
1585 {
1586 struct hci_uart *hu = hci_get_drvdata(hdev);
1587 bool wakeup;
1588
1589 /* BT SoC attached through the serial bus is handled by the serdev driver.
1590 * So we need to use the device handle of the serdev driver to get the
1591 * status of device may wakeup.
1592 */
1593 wakeup = device_may_wakeup(&hu->serdev->ctrl->dev);
1594 bt_dev_dbg(hu->hdev, "wakeup status : %d", wakeup);
1595
1596 return !wakeup;
1597 }
1598
qca_regulator_init(struct hci_uart * hu)1599 static int qca_regulator_init(struct hci_uart *hu)
1600 {
1601 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1602 struct qca_serdev *qcadev;
1603 int ret;
1604 bool sw_ctrl_state;
1605
1606 /* Check for vregs status, may be hci down has turned
1607 * off the voltage regulator.
1608 */
1609 qcadev = serdev_device_get_drvdata(hu->serdev);
1610 if (!qcadev->bt_power->vregs_on) {
1611 serdev_device_close(hu->serdev);
1612 ret = qca_regulator_enable(qcadev);
1613 if (ret)
1614 return ret;
1615
1616 ret = serdev_device_open(hu->serdev);
1617 if (ret) {
1618 bt_dev_err(hu->hdev, "failed to open port");
1619 return ret;
1620 }
1621 }
1622
1623 if (qca_is_wcn399x(soc_type)) {
1624 /* Forcefully enable wcn399x to enter in to boot mode. */
1625 host_set_baudrate(hu, 2400);
1626 ret = qca_send_power_pulse(hu, false);
1627 if (ret)
1628 return ret;
1629 }
1630
1631 /* For wcn6750 need to enable gpio bt_en */
1632 if (qcadev->bt_en) {
1633 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1634 msleep(50);
1635 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1636 msleep(50);
1637 if (qcadev->sw_ctrl) {
1638 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1639 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1640 }
1641 }
1642
1643 qca_set_speed(hu, QCA_INIT_SPEED);
1644
1645 if (qca_is_wcn399x(soc_type)) {
1646 ret = qca_send_power_pulse(hu, true);
1647 if (ret)
1648 return ret;
1649 }
1650
1651 /* Now the device is in ready state to communicate with host.
1652 * To sync host with device we need to reopen port.
1653 * Without this, we will have RTS and CTS synchronization
1654 * issues.
1655 */
1656 serdev_device_close(hu->serdev);
1657 ret = serdev_device_open(hu->serdev);
1658 if (ret) {
1659 bt_dev_err(hu->hdev, "failed to open port");
1660 return ret;
1661 }
1662
1663 hci_uart_set_flow_control(hu, false);
1664
1665 return 0;
1666 }
1667
qca_power_on(struct hci_dev * hdev)1668 static int qca_power_on(struct hci_dev *hdev)
1669 {
1670 struct hci_uart *hu = hci_get_drvdata(hdev);
1671 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1672 struct qca_serdev *qcadev;
1673 struct qca_data *qca = hu->priv;
1674 int ret = 0;
1675
1676 /* Non-serdev device usually is powered by external power
1677 * and don't need additional action in driver for power on
1678 */
1679 if (!hu->serdev)
1680 return 0;
1681
1682 if (qca_is_wcn399x(soc_type) ||
1683 qca_is_wcn6750(soc_type)) {
1684 ret = qca_regulator_init(hu);
1685 } else {
1686 qcadev = serdev_device_get_drvdata(hu->serdev);
1687 if (qcadev->bt_en) {
1688 gpiod_set_value_cansleep(qcadev->bt_en, 1);
1689 /* Controller needs time to bootup. */
1690 msleep(150);
1691 }
1692 }
1693
1694 clear_bit(QCA_BT_OFF, &qca->flags);
1695 return ret;
1696 }
1697
qca_setup(struct hci_uart * hu)1698 static int qca_setup(struct hci_uart *hu)
1699 {
1700 struct hci_dev *hdev = hu->hdev;
1701 struct qca_data *qca = hu->priv;
1702 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
1703 unsigned int retries = 0;
1704 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1705 const char *firmware_name = qca_get_firmware_name(hu);
1706 int ret;
1707 struct qca_btsoc_version ver;
1708
1709 ret = qca_check_speeds(hu);
1710 if (ret)
1711 return ret;
1712
1713 clear_bit(QCA_ROM_FW, &qca->flags);
1714 /* Patch downloading has to be done without IBS mode */
1715 set_bit(QCA_IBS_DISABLED, &qca->flags);
1716
1717 /* Enable controller to do both LE scan and BR/EDR inquiry
1718 * simultaneously.
1719 */
1720 set_bit(HCI_QUIRK_SIMULTANEOUS_DISCOVERY, &hdev->quirks);
1721
1722 bt_dev_info(hdev, "setting up %s",
1723 qca_is_wcn399x(soc_type) ? "wcn399x" :
1724 (soc_type == QCA_WCN6750) ? "wcn6750" : "ROME/QCA6390");
1725
1726 qca->memdump_state = QCA_MEMDUMP_IDLE;
1727
1728 retry:
1729 ret = qca_power_on(hdev);
1730 if (ret)
1731 goto out;
1732
1733 clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
1734
1735 if (qca_is_wcn399x(soc_type) ||
1736 qca_is_wcn6750(soc_type)) {
1737 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
1738
1739 ret = qca_read_soc_version(hdev, &ver, soc_type);
1740 if (ret)
1741 goto out;
1742 } else {
1743 qca_set_speed(hu, QCA_INIT_SPEED);
1744 }
1745
1746 /* Setup user speed if needed */
1747 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1748 if (speed) {
1749 ret = qca_set_speed(hu, QCA_OPER_SPEED);
1750 if (ret)
1751 goto out;
1752
1753 qca_baudrate = qca_get_baudrate_value(speed);
1754 }
1755
1756 if (!(qca_is_wcn399x(soc_type) ||
1757 qca_is_wcn6750(soc_type))) {
1758 /* Get QCA version information */
1759 ret = qca_read_soc_version(hdev, &ver, soc_type);
1760 if (ret)
1761 goto out;
1762 }
1763
1764 /* Setup patch / NVM configurations */
1765 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, ver,
1766 firmware_name);
1767 if (!ret) {
1768 clear_bit(QCA_IBS_DISABLED, &qca->flags);
1769 qca_debugfs_init(hdev);
1770 hu->hdev->hw_error = qca_hw_error;
1771 hu->hdev->cmd_timeout = qca_cmd_timeout;
1772 hu->hdev->prevent_wake = qca_prevent_wake;
1773 } else if (ret == -ENOENT) {
1774 /* No patch/nvm-config found, run with original fw/config */
1775 set_bit(QCA_ROM_FW, &qca->flags);
1776 ret = 0;
1777 } else if (ret == -EAGAIN) {
1778 /*
1779 * Userspace firmware loader will return -EAGAIN in case no
1780 * patch/nvm-config is found, so run with original fw/config.
1781 */
1782 set_bit(QCA_ROM_FW, &qca->flags);
1783 ret = 0;
1784 }
1785
1786 out:
1787 if (ret && retries < MAX_INIT_RETRIES) {
1788 bt_dev_warn(hdev, "Retry BT power ON:%d", retries);
1789 qca_power_shutdown(hu);
1790 if (hu->serdev) {
1791 serdev_device_close(hu->serdev);
1792 ret = serdev_device_open(hu->serdev);
1793 if (ret) {
1794 bt_dev_err(hdev, "failed to open port");
1795 return ret;
1796 }
1797 }
1798 retries++;
1799 goto retry;
1800 }
1801
1802 /* Setup bdaddr */
1803 if (soc_type == QCA_ROME)
1804 hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
1805 else
1806 hu->hdev->set_bdaddr = qca_set_bdaddr;
1807
1808 return ret;
1809 }
1810
1811 static const struct hci_uart_proto qca_proto = {
1812 .id = HCI_UART_QCA,
1813 .name = "QCA",
1814 .manufacturer = 29,
1815 .init_speed = 115200,
1816 .oper_speed = 3000000,
1817 .open = qca_open,
1818 .close = qca_close,
1819 .flush = qca_flush,
1820 .setup = qca_setup,
1821 .recv = qca_recv,
1822 .enqueue = qca_enqueue,
1823 .dequeue = qca_dequeue,
1824 };
1825
1826 static const struct qca_device_data qca_soc_data_wcn3990 = {
1827 .soc_type = QCA_WCN3990,
1828 .vregs = (struct qca_vreg []) {
1829 { "vddio", 15000 },
1830 { "vddxo", 80000 },
1831 { "vddrf", 300000 },
1832 { "vddch0", 450000 },
1833 },
1834 .num_vregs = 4,
1835 };
1836
1837 static const struct qca_device_data qca_soc_data_wcn3991 = {
1838 .soc_type = QCA_WCN3991,
1839 .vregs = (struct qca_vreg []) {
1840 { "vddio", 15000 },
1841 { "vddxo", 80000 },
1842 { "vddrf", 300000 },
1843 { "vddch0", 450000 },
1844 },
1845 .num_vregs = 4,
1846 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1847 };
1848
1849 static const struct qca_device_data qca_soc_data_wcn3998 = {
1850 .soc_type = QCA_WCN3998,
1851 .vregs = (struct qca_vreg []) {
1852 { "vddio", 10000 },
1853 { "vddxo", 80000 },
1854 { "vddrf", 300000 },
1855 { "vddch0", 450000 },
1856 },
1857 .num_vregs = 4,
1858 };
1859
1860 static const struct qca_device_data qca_soc_data_qca6390 = {
1861 .soc_type = QCA_QCA6390,
1862 .num_vregs = 0,
1863 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1864 };
1865
1866 static const struct qca_device_data qca_soc_data_wcn6750 = {
1867 .soc_type = QCA_WCN6750,
1868 .vregs = (struct qca_vreg []) {
1869 { "vddio", 5000 },
1870 { "vddaon", 26000 },
1871 { "vddbtcxmx", 126000 },
1872 { "vddrfacmn", 12500 },
1873 { "vddrfa0p8", 102000 },
1874 { "vddrfa1p7", 302000 },
1875 { "vddrfa1p2", 257000 },
1876 { "vddrfa2p2", 1700000 },
1877 { "vddasd", 200 },
1878 },
1879 .num_vregs = 9,
1880 .capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
1881 };
1882
qca_power_shutdown(struct hci_uart * hu)1883 static void qca_power_shutdown(struct hci_uart *hu)
1884 {
1885 struct qca_serdev *qcadev;
1886 struct qca_data *qca = hu->priv;
1887 unsigned long flags;
1888 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1889 bool sw_ctrl_state;
1890
1891 /* From this point we go into power off state. But serial port is
1892 * still open, stop queueing the IBS data and flush all the buffered
1893 * data in skb's.
1894 */
1895 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
1896 set_bit(QCA_IBS_DISABLED, &qca->flags);
1897 qca_flush(hu);
1898 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
1899
1900 /* Non-serdev device usually is powered by external power
1901 * and don't need additional action in driver for power down
1902 */
1903 if (!hu->serdev)
1904 return;
1905
1906 qcadev = serdev_device_get_drvdata(hu->serdev);
1907
1908 if (qca_is_wcn399x(soc_type)) {
1909 host_set_baudrate(hu, 2400);
1910 qca_send_power_pulse(hu, false);
1911 qca_regulator_disable(qcadev);
1912 } else if (soc_type == QCA_WCN6750) {
1913 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1914 msleep(100);
1915 qca_regulator_disable(qcadev);
1916 if (qcadev->sw_ctrl) {
1917 sw_ctrl_state = gpiod_get_value_cansleep(qcadev->sw_ctrl);
1918 bt_dev_dbg(hu->hdev, "SW_CTRL is %d", sw_ctrl_state);
1919 }
1920 } else if (qcadev->bt_en) {
1921 gpiod_set_value_cansleep(qcadev->bt_en, 0);
1922 }
1923
1924 set_bit(QCA_BT_OFF, &qca->flags);
1925 }
1926
qca_power_off(struct hci_dev * hdev)1927 static int qca_power_off(struct hci_dev *hdev)
1928 {
1929 struct hci_uart *hu = hci_get_drvdata(hdev);
1930 struct qca_data *qca = hu->priv;
1931 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1932
1933 hu->hdev->hw_error = NULL;
1934 hu->hdev->cmd_timeout = NULL;
1935
1936 del_timer_sync(&qca->wake_retrans_timer);
1937 del_timer_sync(&qca->tx_idle_timer);
1938
1939 /* Stop sending shutdown command if soc crashes. */
1940 if (soc_type != QCA_ROME
1941 && qca->memdump_state == QCA_MEMDUMP_IDLE) {
1942 qca_send_pre_shutdown_cmd(hdev);
1943 usleep_range(8000, 10000);
1944 }
1945
1946 qca_power_shutdown(hu);
1947 return 0;
1948 }
1949
qca_regulator_enable(struct qca_serdev * qcadev)1950 static int qca_regulator_enable(struct qca_serdev *qcadev)
1951 {
1952 struct qca_power *power = qcadev->bt_power;
1953 int ret;
1954
1955 /* Already enabled */
1956 if (power->vregs_on)
1957 return 0;
1958
1959 BT_DBG("enabling %d regulators)", power->num_vregs);
1960
1961 ret = regulator_bulk_enable(power->num_vregs, power->vreg_bulk);
1962 if (ret)
1963 return ret;
1964
1965 power->vregs_on = true;
1966
1967 ret = clk_prepare_enable(qcadev->susclk);
1968 if (ret)
1969 qca_regulator_disable(qcadev);
1970
1971 return ret;
1972 }
1973
qca_regulator_disable(struct qca_serdev * qcadev)1974 static void qca_regulator_disable(struct qca_serdev *qcadev)
1975 {
1976 struct qca_power *power;
1977
1978 if (!qcadev)
1979 return;
1980
1981 power = qcadev->bt_power;
1982
1983 /* Already disabled? */
1984 if (!power->vregs_on)
1985 return;
1986
1987 regulator_bulk_disable(power->num_vregs, power->vreg_bulk);
1988 power->vregs_on = false;
1989
1990 clk_disable_unprepare(qcadev->susclk);
1991 }
1992
qca_init_regulators(struct qca_power * qca,const struct qca_vreg * vregs,size_t num_vregs)1993 static int qca_init_regulators(struct qca_power *qca,
1994 const struct qca_vreg *vregs, size_t num_vregs)
1995 {
1996 struct regulator_bulk_data *bulk;
1997 int ret;
1998 int i;
1999
2000 bulk = devm_kcalloc(qca->dev, num_vregs, sizeof(*bulk), GFP_KERNEL);
2001 if (!bulk)
2002 return -ENOMEM;
2003
2004 for (i = 0; i < num_vregs; i++)
2005 bulk[i].supply = vregs[i].name;
2006
2007 ret = devm_regulator_bulk_get(qca->dev, num_vregs, bulk);
2008 if (ret < 0)
2009 return ret;
2010
2011 for (i = 0; i < num_vregs; i++) {
2012 ret = regulator_set_load(bulk[i].consumer, vregs[i].load_uA);
2013 if (ret)
2014 return ret;
2015 }
2016
2017 qca->vreg_bulk = bulk;
2018 qca->num_vregs = num_vregs;
2019
2020 return 0;
2021 }
2022
qca_serdev_probe(struct serdev_device * serdev)2023 static int qca_serdev_probe(struct serdev_device *serdev)
2024 {
2025 struct qca_serdev *qcadev;
2026 struct hci_dev *hdev;
2027 const struct qca_device_data *data;
2028 int err;
2029 bool power_ctrl_enabled = true;
2030
2031 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
2032 if (!qcadev)
2033 return -ENOMEM;
2034
2035 qcadev->serdev_hu.serdev = serdev;
2036 data = device_get_match_data(&serdev->dev);
2037 serdev_device_set_drvdata(serdev, qcadev);
2038 device_property_read_string(&serdev->dev, "firmware-name",
2039 &qcadev->firmware_name);
2040 device_property_read_u32(&serdev->dev, "max-speed",
2041 &qcadev->oper_speed);
2042 if (!qcadev->oper_speed)
2043 BT_DBG("UART will pick default operating speed");
2044
2045 if (data &&
2046 (qca_is_wcn399x(data->soc_type) ||
2047 qca_is_wcn6750(data->soc_type))) {
2048 qcadev->btsoc_type = data->soc_type;
2049 qcadev->bt_power = devm_kzalloc(&serdev->dev,
2050 sizeof(struct qca_power),
2051 GFP_KERNEL);
2052 if (!qcadev->bt_power)
2053 return -ENOMEM;
2054
2055 qcadev->bt_power->dev = &serdev->dev;
2056 err = qca_init_regulators(qcadev->bt_power, data->vregs,
2057 data->num_vregs);
2058 if (err) {
2059 BT_ERR("Failed to init regulators:%d", err);
2060 return err;
2061 }
2062
2063 qcadev->bt_power->vregs_on = false;
2064
2065 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2066 GPIOD_OUT_LOW);
2067 if (IS_ERR_OR_NULL(qcadev->bt_en) && data->soc_type == QCA_WCN6750) {
2068 dev_err(&serdev->dev, "failed to acquire BT_EN gpio\n");
2069 power_ctrl_enabled = false;
2070 }
2071
2072 qcadev->sw_ctrl = devm_gpiod_get_optional(&serdev->dev, "swctrl",
2073 GPIOD_IN);
2074 if (IS_ERR_OR_NULL(qcadev->sw_ctrl) && data->soc_type == QCA_WCN6750)
2075 dev_warn(&serdev->dev, "failed to acquire SW_CTRL gpio\n");
2076
2077 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2078 if (IS_ERR(qcadev->susclk)) {
2079 dev_err(&serdev->dev, "failed to acquire clk\n");
2080 return PTR_ERR(qcadev->susclk);
2081 }
2082
2083 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2084 if (err) {
2085 BT_ERR("wcn3990 serdev registration failed");
2086 return err;
2087 }
2088 } else {
2089 if (data)
2090 qcadev->btsoc_type = data->soc_type;
2091 else
2092 qcadev->btsoc_type = QCA_ROME;
2093
2094 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
2095 GPIOD_OUT_LOW);
2096 if (IS_ERR_OR_NULL(qcadev->bt_en)) {
2097 dev_warn(&serdev->dev, "failed to acquire enable gpio\n");
2098 power_ctrl_enabled = false;
2099 }
2100
2101 qcadev->susclk = devm_clk_get_optional(&serdev->dev, NULL);
2102 if (IS_ERR(qcadev->susclk)) {
2103 dev_warn(&serdev->dev, "failed to acquire clk\n");
2104 return PTR_ERR(qcadev->susclk);
2105 }
2106 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
2107 if (err)
2108 return err;
2109
2110 err = clk_prepare_enable(qcadev->susclk);
2111 if (err)
2112 return err;
2113
2114 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
2115 if (err) {
2116 BT_ERR("Rome serdev registration failed");
2117 clk_disable_unprepare(qcadev->susclk);
2118 return err;
2119 }
2120 }
2121
2122 hdev = qcadev->serdev_hu.hdev;
2123
2124 if (power_ctrl_enabled) {
2125 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
2126 hdev->shutdown = qca_power_off;
2127 }
2128
2129 if (data) {
2130 /* Wideband speech support must be set per driver since it can't
2131 * be queried via hci. Same with the valid le states quirk.
2132 */
2133 if (data->capabilities & QCA_CAP_WIDEBAND_SPEECH)
2134 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
2135 &hdev->quirks);
2136
2137 if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2138 set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2139 }
2140
2141 return 0;
2142 }
2143
qca_serdev_remove(struct serdev_device * serdev)2144 static void qca_serdev_remove(struct serdev_device *serdev)
2145 {
2146 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2147 struct qca_power *power = qcadev->bt_power;
2148
2149 if ((qca_is_wcn399x(qcadev->btsoc_type) ||
2150 qca_is_wcn6750(qcadev->btsoc_type)) &&
2151 power->vregs_on)
2152 qca_power_shutdown(&qcadev->serdev_hu);
2153 else if (qcadev->susclk)
2154 clk_disable_unprepare(qcadev->susclk);
2155
2156 hci_uart_unregister_device(&qcadev->serdev_hu);
2157 }
2158
qca_serdev_shutdown(struct device * dev)2159 static void qca_serdev_shutdown(struct device *dev)
2160 {
2161 int ret;
2162 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
2163 struct serdev_device *serdev = to_serdev_device(dev);
2164 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2165 struct hci_uart *hu = &qcadev->serdev_hu;
2166 struct hci_dev *hdev = hu->hdev;
2167 struct qca_data *qca = hu->priv;
2168 const u8 ibs_wake_cmd[] = { 0xFD };
2169 const u8 edl_reset_soc_cmd[] = { 0x01, 0x00, 0xFC, 0x01, 0x05 };
2170
2171 if (qcadev->btsoc_type == QCA_QCA6390) {
2172 if (test_bit(QCA_BT_OFF, &qca->flags) ||
2173 !test_bit(HCI_RUNNING, &hdev->flags))
2174 return;
2175
2176 serdev_device_write_flush(serdev);
2177 ret = serdev_device_write_buf(serdev, ibs_wake_cmd,
2178 sizeof(ibs_wake_cmd));
2179 if (ret < 0) {
2180 BT_ERR("QCA send IBS_WAKE_IND error: %d", ret);
2181 return;
2182 }
2183 serdev_device_wait_until_sent(serdev, timeout);
2184 usleep_range(8000, 10000);
2185
2186 serdev_device_write_flush(serdev);
2187 ret = serdev_device_write_buf(serdev, edl_reset_soc_cmd,
2188 sizeof(edl_reset_soc_cmd));
2189 if (ret < 0) {
2190 BT_ERR("QCA send EDL_RESET_REQ error: %d", ret);
2191 return;
2192 }
2193 serdev_device_wait_until_sent(serdev, timeout);
2194 usleep_range(8000, 10000);
2195 }
2196 }
2197
qca_suspend(struct device * dev)2198 static int __maybe_unused qca_suspend(struct device *dev)
2199 {
2200 struct serdev_device *serdev = to_serdev_device(dev);
2201 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2202 struct hci_uart *hu = &qcadev->serdev_hu;
2203 struct qca_data *qca = hu->priv;
2204 unsigned long flags;
2205 bool tx_pending = false;
2206 int ret = 0;
2207 u8 cmd;
2208 u32 wait_timeout = 0;
2209
2210 set_bit(QCA_SUSPENDING, &qca->flags);
2211
2212 /* if BT SoC is running with default firmware then it does not
2213 * support in-band sleep
2214 */
2215 if (test_bit(QCA_ROM_FW, &qca->flags))
2216 return 0;
2217
2218 /* During SSR after memory dump collection, controller will be
2219 * powered off and then powered on.If controller is powered off
2220 * during SSR then we should wait until SSR is completed.
2221 */
2222 if (test_bit(QCA_BT_OFF, &qca->flags) &&
2223 !test_bit(QCA_SSR_TRIGGERED, &qca->flags))
2224 return 0;
2225
2226 if (test_bit(QCA_IBS_DISABLED, &qca->flags) ||
2227 test_bit(QCA_SSR_TRIGGERED, &qca->flags)) {
2228 wait_timeout = test_bit(QCA_SSR_TRIGGERED, &qca->flags) ?
2229 IBS_DISABLE_SSR_TIMEOUT_MS :
2230 FW_DOWNLOAD_TIMEOUT_MS;
2231
2232 /* QCA_IBS_DISABLED flag is set to true, During FW download
2233 * and during memory dump collection. It is reset to false,
2234 * After FW download complete.
2235 */
2236 wait_on_bit_timeout(&qca->flags, QCA_IBS_DISABLED,
2237 TASK_UNINTERRUPTIBLE, msecs_to_jiffies(wait_timeout));
2238
2239 if (test_bit(QCA_IBS_DISABLED, &qca->flags)) {
2240 bt_dev_err(hu->hdev, "SSR or FW download time out");
2241 ret = -ETIMEDOUT;
2242 goto error;
2243 }
2244 }
2245
2246 cancel_work_sync(&qca->ws_awake_device);
2247 cancel_work_sync(&qca->ws_awake_rx);
2248
2249 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
2250 flags, SINGLE_DEPTH_NESTING);
2251
2252 switch (qca->tx_ibs_state) {
2253 case HCI_IBS_TX_WAKING:
2254 del_timer(&qca->wake_retrans_timer);
2255 fallthrough;
2256 case HCI_IBS_TX_AWAKE:
2257 del_timer(&qca->tx_idle_timer);
2258
2259 serdev_device_write_flush(hu->serdev);
2260 cmd = HCI_IBS_SLEEP_IND;
2261 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
2262
2263 if (ret < 0) {
2264 BT_ERR("Failed to send SLEEP to device");
2265 break;
2266 }
2267
2268 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
2269 qca->ibs_sent_slps++;
2270 tx_pending = true;
2271 break;
2272
2273 case HCI_IBS_TX_ASLEEP:
2274 break;
2275
2276 default:
2277 BT_ERR("Spurious tx state %d", qca->tx_ibs_state);
2278 ret = -EINVAL;
2279 break;
2280 }
2281
2282 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
2283
2284 if (ret < 0)
2285 goto error;
2286
2287 if (tx_pending) {
2288 serdev_device_wait_until_sent(hu->serdev,
2289 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
2290 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
2291 }
2292
2293 /* Wait for HCI_IBS_SLEEP_IND sent by device to indicate its Tx is going
2294 * to sleep, so that the packet does not wake the system later.
2295 */
2296 ret = wait_event_interruptible_timeout(qca->suspend_wait_q,
2297 qca->rx_ibs_state == HCI_IBS_RX_ASLEEP,
2298 msecs_to_jiffies(IBS_BTSOC_TX_IDLE_TIMEOUT_MS));
2299 if (ret == 0) {
2300 ret = -ETIMEDOUT;
2301 goto error;
2302 }
2303
2304 return 0;
2305
2306 error:
2307 clear_bit(QCA_SUSPENDING, &qca->flags);
2308
2309 return ret;
2310 }
2311
qca_resume(struct device * dev)2312 static int __maybe_unused qca_resume(struct device *dev)
2313 {
2314 struct serdev_device *serdev = to_serdev_device(dev);
2315 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
2316 struct hci_uart *hu = &qcadev->serdev_hu;
2317 struct qca_data *qca = hu->priv;
2318
2319 clear_bit(QCA_SUSPENDING, &qca->flags);
2320
2321 return 0;
2322 }
2323
2324 static SIMPLE_DEV_PM_OPS(qca_pm_ops, qca_suspend, qca_resume);
2325
2326 #ifdef CONFIG_OF
2327 static const struct of_device_id qca_bluetooth_of_match[] = {
2328 { .compatible = "qcom,qca6174-bt" },
2329 { .compatible = "qcom,qca6390-bt", .data = &qca_soc_data_qca6390},
2330 { .compatible = "qcom,qca9377-bt" },
2331 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990},
2332 { .compatible = "qcom,wcn3991-bt", .data = &qca_soc_data_wcn3991},
2333 { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998},
2334 { .compatible = "qcom,wcn6750-bt", .data = &qca_soc_data_wcn6750},
2335 { /* sentinel */ }
2336 };
2337 MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
2338 #endif
2339
2340 #ifdef CONFIG_ACPI
2341 static const struct acpi_device_id qca_bluetooth_acpi_match[] = {
2342 { "QCOM6390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2343 { "DLA16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2344 { "DLB16390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2345 { "DLB26390", (kernel_ulong_t)&qca_soc_data_qca6390 },
2346 { },
2347 };
2348 MODULE_DEVICE_TABLE(acpi, qca_bluetooth_acpi_match);
2349 #endif
2350
2351
2352 static struct serdev_device_driver qca_serdev_driver = {
2353 .probe = qca_serdev_probe,
2354 .remove = qca_serdev_remove,
2355 .driver = {
2356 .name = "hci_uart_qca",
2357 .of_match_table = of_match_ptr(qca_bluetooth_of_match),
2358 .acpi_match_table = ACPI_PTR(qca_bluetooth_acpi_match),
2359 .shutdown = qca_serdev_shutdown,
2360 .pm = &qca_pm_ops,
2361 },
2362 };
2363
qca_init(void)2364 int __init qca_init(void)
2365 {
2366 serdev_device_driver_register(&qca_serdev_driver);
2367
2368 return hci_uart_register_proto(&qca_proto);
2369 }
2370
qca_deinit(void)2371 int __exit qca_deinit(void)
2372 {
2373 serdev_device_driver_unregister(&qca_serdev_driver);
2374
2375 return hci_uart_unregister_proto(&qca_proto);
2376 }
2377