1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27
28 #include "ObjectID.h"
29 #include "atomfirmware.h"
30
31 #include "include/bios_parser_types.h"
32
33 #include "command_table_helper2.h"
34
dal_bios_parser_init_cmd_tbl_helper2(const struct command_table_helper ** h,enum dce_version dce)35 bool dal_bios_parser_init_cmd_tbl_helper2(
36 const struct command_table_helper **h,
37 enum dce_version dce)
38 {
39 switch (dce) {
40 #if defined(CONFIG_DRM_AMD_DC_SI)
41 case DCE_VERSION_6_0:
42 case DCE_VERSION_6_1:
43 case DCE_VERSION_6_4:
44 *h = dal_cmd_tbl_helper_dce60_get_table();
45 return true;
46 #endif
47
48 case DCE_VERSION_8_0:
49 case DCE_VERSION_8_1:
50 case DCE_VERSION_8_3:
51 *h = dal_cmd_tbl_helper_dce80_get_table();
52 return true;
53
54 case DCE_VERSION_10_0:
55 *h = dal_cmd_tbl_helper_dce110_get_table();
56 return true;
57
58 case DCE_VERSION_11_0:
59 *h = dal_cmd_tbl_helper_dce110_get_table();
60 return true;
61
62 case DCE_VERSION_11_2:
63 case DCE_VERSION_11_22:
64 case DCE_VERSION_12_0:
65 case DCE_VERSION_12_1:
66 *h = dal_cmd_tbl_helper_dce112_get_table2();
67 return true;
68 #if defined(CONFIG_DRM_AMD_DC_DCN)
69 case DCN_VERSION_1_0:
70 case DCN_VERSION_1_01:
71 case DCN_VERSION_2_0:
72 case DCN_VERSION_2_1:
73 case DCN_VERSION_3_0:
74 case DCN_VERSION_3_01:
75 case DCN_VERSION_3_02:
76 case DCN_VERSION_3_03:
77 case DCN_VERSION_3_1:
78 *h = dal_cmd_tbl_helper_dce112_get_table2();
79 return true;
80 #endif
81 default:
82 /* Unsupported DCE */
83 BREAK_TO_DEBUGGER();
84 return false;
85 }
86 }
87
88 /* real implementations */
89
dal_cmd_table_helper_controller_id_to_atom2(enum controller_id id,uint8_t * atom_id)90 bool dal_cmd_table_helper_controller_id_to_atom2(
91 enum controller_id id,
92 uint8_t *atom_id)
93 {
94 if (atom_id == NULL) {
95 BREAK_TO_DEBUGGER();
96 return false;
97 }
98
99 switch (id) {
100 case CONTROLLER_ID_D0:
101 *atom_id = ATOM_CRTC1;
102 return true;
103 case CONTROLLER_ID_D1:
104 *atom_id = ATOM_CRTC2;
105 return true;
106 case CONTROLLER_ID_D2:
107 *atom_id = ATOM_CRTC3;
108 return true;
109 case CONTROLLER_ID_D3:
110 *atom_id = ATOM_CRTC4;
111 return true;
112 case CONTROLLER_ID_D4:
113 *atom_id = ATOM_CRTC5;
114 return true;
115 case CONTROLLER_ID_D5:
116 *atom_id = ATOM_CRTC6;
117 return true;
118 /* TODO :case CONTROLLER_ID_UNDERLAY0:
119 *atom_id = ATOM_UNDERLAY_PIPE0;
120 return true;
121 */
122 case CONTROLLER_ID_UNDEFINED:
123 *atom_id = ATOM_CRTC_INVALID;
124 return true;
125 default:
126 /* Wrong controller id */
127 BREAK_TO_DEBUGGER();
128 return false;
129 }
130 }
131
132 /**
133 * dal_cmd_table_helper_transmitter_bp_to_atom2 - Translate the Transmitter to the
134 * corresponding ATOM BIOS value
135 * @t: transmitter
136 * returns: digitalTransmitter
137 * // =00: Digital Transmitter1 ( UNIPHY linkAB )
138 * // =01: Digital Transmitter2 ( UNIPHY linkCD )
139 * // =02: Digital Transmitter3 ( UNIPHY linkEF )
140 */
dal_cmd_table_helper_transmitter_bp_to_atom2(enum transmitter t)141 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2(
142 enum transmitter t)
143 {
144 switch (t) {
145 case TRANSMITTER_UNIPHY_A:
146 case TRANSMITTER_UNIPHY_B:
147 case TRANSMITTER_TRAVIS_LCD:
148 return 0;
149 case TRANSMITTER_UNIPHY_C:
150 case TRANSMITTER_UNIPHY_D:
151 return 1;
152 case TRANSMITTER_UNIPHY_E:
153 case TRANSMITTER_UNIPHY_F:
154 return 2;
155 default:
156 /* Invalid Transmitter Type! */
157 BREAK_TO_DEBUGGER();
158 return 0;
159 }
160 }
161
dal_cmd_table_helper_encoder_mode_bp_to_atom2(enum signal_type s,bool enable_dp_audio)162 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2(
163 enum signal_type s,
164 bool enable_dp_audio)
165 {
166 switch (s) {
167 case SIGNAL_TYPE_DVI_SINGLE_LINK:
168 case SIGNAL_TYPE_DVI_DUAL_LINK:
169 return ATOM_ENCODER_MODE_DVI;
170 case SIGNAL_TYPE_HDMI_TYPE_A:
171 return ATOM_ENCODER_MODE_HDMI;
172 case SIGNAL_TYPE_LVDS:
173 return ATOM_ENCODER_MODE_LVDS;
174 case SIGNAL_TYPE_EDP:
175 case SIGNAL_TYPE_DISPLAY_PORT_MST:
176 case SIGNAL_TYPE_DISPLAY_PORT:
177 case SIGNAL_TYPE_VIRTUAL:
178 if (enable_dp_audio)
179 return ATOM_ENCODER_MODE_DP_AUDIO;
180 else
181 return ATOM_ENCODER_MODE_DP;
182 case SIGNAL_TYPE_RGB:
183 return ATOM_ENCODER_MODE_CRT;
184 default:
185 return ATOM_ENCODER_MODE_CRT;
186 }
187 }
188
dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(enum clock_source_id id,uint32_t * ref_clk_src_id)189 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2(
190 enum clock_source_id id,
191 uint32_t *ref_clk_src_id)
192 {
193 if (ref_clk_src_id == NULL) {
194 BREAK_TO_DEBUGGER();
195 return false;
196 }
197
198 switch (id) {
199 case CLOCK_SOURCE_ID_PLL1:
200 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
201 return true;
202 case CLOCK_SOURCE_ID_PLL2:
203 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
204 return true;
205 /*TODO:case CLOCK_SOURCE_ID_DCPLL:
206 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
207 return true;
208 */
209 case CLOCK_SOURCE_ID_EXTERNAL:
210 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
211 return true;
212 case CLOCK_SOURCE_ID_UNDEFINED:
213 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
214 return true;
215 default:
216 /* Unsupported clock source id */
217 BREAK_TO_DEBUGGER();
218 return false;
219 }
220 }
221
dal_cmd_table_helper_encoder_id_to_atom2(enum encoder_id id)222 uint8_t dal_cmd_table_helper_encoder_id_to_atom2(
223 enum encoder_id id)
224 {
225 switch (id) {
226 case ENCODER_ID_INTERNAL_LVDS:
227 return ENCODER_OBJECT_ID_INTERNAL_LVDS;
228 case ENCODER_ID_INTERNAL_TMDS1:
229 return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
230 case ENCODER_ID_INTERNAL_TMDS2:
231 return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
232 case ENCODER_ID_INTERNAL_DAC1:
233 return ENCODER_OBJECT_ID_INTERNAL_DAC1;
234 case ENCODER_ID_INTERNAL_DAC2:
235 return ENCODER_OBJECT_ID_INTERNAL_DAC2;
236 case ENCODER_ID_INTERNAL_LVTM1:
237 return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
238 case ENCODER_ID_INTERNAL_HDMI:
239 return ENCODER_OBJECT_ID_HDMI_INTERNAL;
240 case ENCODER_ID_EXTERNAL_TRAVIS:
241 return ENCODER_OBJECT_ID_TRAVIS;
242 case ENCODER_ID_EXTERNAL_NUTMEG:
243 return ENCODER_OBJECT_ID_NUTMEG;
244 case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
245 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
246 case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
247 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
248 case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
249 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
250 case ENCODER_ID_EXTERNAL_MVPU_FPGA:
251 return ENCODER_OBJECT_ID_MVPU_FPGA;
252 case ENCODER_ID_INTERNAL_DDI:
253 return ENCODER_OBJECT_ID_INTERNAL_DDI;
254 case ENCODER_ID_INTERNAL_UNIPHY:
255 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
256 case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
257 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
258 case ENCODER_ID_INTERNAL_UNIPHY1:
259 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
260 case ENCODER_ID_INTERNAL_UNIPHY2:
261 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
262 case ENCODER_ID_INTERNAL_UNIPHY3:
263 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
264 case ENCODER_ID_INTERNAL_WIRELESS:
265 return ENCODER_OBJECT_ID_INTERNAL_VCE;
266 case ENCODER_ID_INTERNAL_VIRTUAL:
267 return ENCODER_OBJECT_ID_NONE;
268 case ENCODER_ID_UNKNOWN:
269 return ENCODER_OBJECT_ID_NONE;
270 default:
271 /* Invalid encoder id */
272 BREAK_TO_DEBUGGER();
273 return ENCODER_OBJECT_ID_NONE;
274 }
275 }
276