1 /*
2 * SPDX-License-Identifier: MIT
3 *
4 * Copyright © 2011-2012 Intel Corporation
5 */
6
7 /*
8 * This file implements HW context support. On gen5+ a HW context consists of an
9 * opaque GPU object which is referenced at times of context saves and restores.
10 * With RC6 enabled, the context is also referenced as the GPU enters and exists
11 * from RC6 (GPU has it's own internal power context, except on gen5). Though
12 * something like a context does exist for the media ring, the code only
13 * supports contexts for the render ring.
14 *
15 * In software, there is a distinction between contexts created by the user,
16 * and the default HW context. The default HW context is used by GPU clients
17 * that do not request setup of their own hardware context. The default
18 * context's state is never restored to help prevent programming errors. This
19 * would happen if a client ran and piggy-backed off another clients GPU state.
20 * The default context only exists to give the GPU some offset to load as the
21 * current to invoke a save of the context we actually care about. In fact, the
22 * code could likely be constructed, albeit in a more complicated fashion, to
23 * never use the default context, though that limits the driver's ability to
24 * swap out, and/or destroy other contexts.
25 *
26 * All other contexts are created as a request by the GPU client. These contexts
27 * store GPU state, and thus allow GPU clients to not re-emit state (and
28 * potentially query certain state) at any time. The kernel driver makes
29 * certain that the appropriate commands are inserted.
30 *
31 * The context life cycle is semi-complicated in that context BOs may live
32 * longer than the context itself because of the way the hardware, and object
33 * tracking works. Below is a very crude representation of the state machine
34 * describing the context life.
35 * refcount pincount active
36 * S0: initial state 0 0 0
37 * S1: context created 1 0 0
38 * S2: context is currently running 2 1 X
39 * S3: GPU referenced, but not current 2 0 1
40 * S4: context is current, but destroyed 1 1 0
41 * S5: like S3, but destroyed 1 0 1
42 *
43 * The most common (but not all) transitions:
44 * S0->S1: client creates a context
45 * S1->S2: client submits execbuf with context
46 * S2->S3: other clients submits execbuf with context
47 * S3->S1: context object was retired
48 * S3->S2: clients submits another execbuf
49 * S2->S4: context destroy called with current context
50 * S3->S5->S0: destroy path
51 * S4->S5->S0: destroy path on current context
52 *
53 * There are two confusing terms used above:
54 * The "current context" means the context which is currently running on the
55 * GPU. The GPU has loaded its state already and has stored away the gtt
56 * offset of the BO. The GPU is not actively referencing the data at this
57 * offset, but it will on the next context switch. The only way to avoid this
58 * is to do a GPU reset.
59 *
60 * An "active context' is one which was previously the "current context" and is
61 * on the active list waiting for the next context switch to occur. Until this
62 * happens, the object must remain at the same gtt offset. It is therefore
63 * possible to destroy a context, but it is still active.
64 *
65 */
66
67 #include <linux/log2.h>
68 #include <linux/nospec.h>
69
70 #include <drm/drm_syncobj.h>
71
72 #include "gt/gen6_ppgtt.h"
73 #include "gt/intel_context.h"
74 #include "gt/intel_context_param.h"
75 #include "gt/intel_engine_heartbeat.h"
76 #include "gt/intel_engine_user.h"
77 #include "gt/intel_gpu_commands.h"
78 #include "gt/intel_ring.h"
79
80 #include "i915_gem_context.h"
81 #include "i915_trace.h"
82 #include "i915_user_extensions.h"
83
84 #define ALL_L3_SLICES(dev) (1 << NUM_L3_SLICES(dev)) - 1
85
86 static struct kmem_cache *slab_luts;
87
i915_lut_handle_alloc(void)88 struct i915_lut_handle *i915_lut_handle_alloc(void)
89 {
90 return kmem_cache_alloc(slab_luts, GFP_KERNEL);
91 }
92
i915_lut_handle_free(struct i915_lut_handle * lut)93 void i915_lut_handle_free(struct i915_lut_handle *lut)
94 {
95 return kmem_cache_free(slab_luts, lut);
96 }
97
lut_close(struct i915_gem_context * ctx)98 static void lut_close(struct i915_gem_context *ctx)
99 {
100 struct radix_tree_iter iter;
101 void __rcu **slot;
102
103 mutex_lock(&ctx->lut_mutex);
104 rcu_read_lock();
105 radix_tree_for_each_slot(slot, &ctx->handles_vma, &iter, 0) {
106 struct i915_vma *vma = rcu_dereference_raw(*slot);
107 struct drm_i915_gem_object *obj = vma->obj;
108 struct i915_lut_handle *lut;
109
110 if (!kref_get_unless_zero(&obj->base.refcount))
111 continue;
112
113 spin_lock(&obj->lut_lock);
114 list_for_each_entry(lut, &obj->lut_list, obj_link) {
115 if (lut->ctx != ctx)
116 continue;
117
118 if (lut->handle != iter.index)
119 continue;
120
121 list_del(&lut->obj_link);
122 break;
123 }
124 spin_unlock(&obj->lut_lock);
125
126 if (&lut->obj_link != &obj->lut_list) {
127 i915_lut_handle_free(lut);
128 radix_tree_iter_delete(&ctx->handles_vma, &iter, slot);
129 i915_vma_close(vma);
130 i915_gem_object_put(obj);
131 }
132
133 i915_gem_object_put(obj);
134 }
135 rcu_read_unlock();
136 mutex_unlock(&ctx->lut_mutex);
137 }
138
139 static struct intel_context *
lookup_user_engine(struct i915_gem_context * ctx,unsigned long flags,const struct i915_engine_class_instance * ci)140 lookup_user_engine(struct i915_gem_context *ctx,
141 unsigned long flags,
142 const struct i915_engine_class_instance *ci)
143 #define LOOKUP_USER_INDEX BIT(0)
144 {
145 int idx;
146
147 if (!!(flags & LOOKUP_USER_INDEX) != i915_gem_context_user_engines(ctx))
148 return ERR_PTR(-EINVAL);
149
150 if (!i915_gem_context_user_engines(ctx)) {
151 struct intel_engine_cs *engine;
152
153 engine = intel_engine_lookup_user(ctx->i915,
154 ci->engine_class,
155 ci->engine_instance);
156 if (!engine)
157 return ERR_PTR(-EINVAL);
158
159 idx = engine->legacy_idx;
160 } else {
161 idx = ci->engine_instance;
162 }
163
164 return i915_gem_context_get_engine(ctx, idx);
165 }
166
validate_priority(struct drm_i915_private * i915,const struct drm_i915_gem_context_param * args)167 static int validate_priority(struct drm_i915_private *i915,
168 const struct drm_i915_gem_context_param *args)
169 {
170 s64 priority = args->value;
171
172 if (args->size)
173 return -EINVAL;
174
175 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
176 return -ENODEV;
177
178 if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
179 priority < I915_CONTEXT_MIN_USER_PRIORITY)
180 return -EINVAL;
181
182 if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
183 !capable(CAP_SYS_NICE))
184 return -EPERM;
185
186 return 0;
187 }
188
proto_context_close(struct i915_gem_proto_context * pc)189 static void proto_context_close(struct i915_gem_proto_context *pc)
190 {
191 int i;
192
193 if (pc->vm)
194 i915_vm_put(pc->vm);
195 if (pc->user_engines) {
196 for (i = 0; i < pc->num_user_engines; i++)
197 kfree(pc->user_engines[i].siblings);
198 kfree(pc->user_engines);
199 }
200 kfree(pc);
201 }
202
proto_context_set_persistence(struct drm_i915_private * i915,struct i915_gem_proto_context * pc,bool persist)203 static int proto_context_set_persistence(struct drm_i915_private *i915,
204 struct i915_gem_proto_context *pc,
205 bool persist)
206 {
207 if (persist) {
208 /*
209 * Only contexts that are short-lived [that will expire or be
210 * reset] are allowed to survive past termination. We require
211 * hangcheck to ensure that the persistent requests are healthy.
212 */
213 if (!i915->params.enable_hangcheck)
214 return -EINVAL;
215
216 pc->user_flags |= BIT(UCONTEXT_PERSISTENCE);
217 } else {
218 /* To cancel a context we use "preempt-to-idle" */
219 if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
220 return -ENODEV;
221
222 /*
223 * If the cancel fails, we then need to reset, cleanly!
224 *
225 * If the per-engine reset fails, all hope is lost! We resort
226 * to a full GPU reset in that unlikely case, but realistically
227 * if the engine could not reset, the full reset does not fare
228 * much better. The damage has been done.
229 *
230 * However, if we cannot reset an engine by itself, we cannot
231 * cleanup a hanging persistent context without causing
232 * colateral damage, and we should not pretend we can by
233 * exposing the interface.
234 */
235 if (!intel_has_reset_engine(&i915->gt))
236 return -ENODEV;
237
238 pc->user_flags &= ~BIT(UCONTEXT_PERSISTENCE);
239 }
240
241 return 0;
242 }
243
244 static struct i915_gem_proto_context *
proto_context_create(struct drm_i915_private * i915,unsigned int flags)245 proto_context_create(struct drm_i915_private *i915, unsigned int flags)
246 {
247 struct i915_gem_proto_context *pc, *err;
248
249 pc = kzalloc(sizeof(*pc), GFP_KERNEL);
250 if (!pc)
251 return ERR_PTR(-ENOMEM);
252
253 pc->num_user_engines = -1;
254 pc->user_engines = NULL;
255 pc->user_flags = BIT(UCONTEXT_BANNABLE) |
256 BIT(UCONTEXT_RECOVERABLE);
257 if (i915->params.enable_hangcheck)
258 pc->user_flags |= BIT(UCONTEXT_PERSISTENCE);
259 pc->sched.priority = I915_PRIORITY_NORMAL;
260
261 if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
262 if (!HAS_EXECLISTS(i915)) {
263 err = ERR_PTR(-EINVAL);
264 goto proto_close;
265 }
266 pc->single_timeline = true;
267 }
268
269 return pc;
270
271 proto_close:
272 proto_context_close(pc);
273 return err;
274 }
275
proto_context_register_locked(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,u32 * id)276 static int proto_context_register_locked(struct drm_i915_file_private *fpriv,
277 struct i915_gem_proto_context *pc,
278 u32 *id)
279 {
280 int ret;
281 void *old;
282
283 lockdep_assert_held(&fpriv->proto_context_lock);
284
285 ret = xa_alloc(&fpriv->context_xa, id, NULL, xa_limit_32b, GFP_KERNEL);
286 if (ret)
287 return ret;
288
289 old = xa_store(&fpriv->proto_context_xa, *id, pc, GFP_KERNEL);
290 if (xa_is_err(old)) {
291 xa_erase(&fpriv->context_xa, *id);
292 return xa_err(old);
293 }
294 WARN_ON(old);
295
296 return 0;
297 }
298
proto_context_register(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,u32 * id)299 static int proto_context_register(struct drm_i915_file_private *fpriv,
300 struct i915_gem_proto_context *pc,
301 u32 *id)
302 {
303 int ret;
304
305 mutex_lock(&fpriv->proto_context_lock);
306 ret = proto_context_register_locked(fpriv, pc, id);
307 mutex_unlock(&fpriv->proto_context_lock);
308
309 return ret;
310 }
311
set_proto_ctx_vm(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,const struct drm_i915_gem_context_param * args)312 static int set_proto_ctx_vm(struct drm_i915_file_private *fpriv,
313 struct i915_gem_proto_context *pc,
314 const struct drm_i915_gem_context_param *args)
315 {
316 struct drm_i915_private *i915 = fpriv->dev_priv;
317 struct i915_address_space *vm;
318
319 if (args->size)
320 return -EINVAL;
321
322 if (!HAS_FULL_PPGTT(i915))
323 return -ENODEV;
324
325 if (upper_32_bits(args->value))
326 return -ENOENT;
327
328 vm = i915_gem_vm_lookup(fpriv, args->value);
329 if (!vm)
330 return -ENOENT;
331
332 if (pc->vm)
333 i915_vm_put(pc->vm);
334 pc->vm = vm;
335
336 return 0;
337 }
338
339 struct set_proto_ctx_engines {
340 struct drm_i915_private *i915;
341 unsigned num_engines;
342 struct i915_gem_proto_engine *engines;
343 };
344
345 static int
set_proto_ctx_engines_balance(struct i915_user_extension __user * base,void * data)346 set_proto_ctx_engines_balance(struct i915_user_extension __user *base,
347 void *data)
348 {
349 struct i915_context_engines_load_balance __user *ext =
350 container_of_user(base, typeof(*ext), base);
351 const struct set_proto_ctx_engines *set = data;
352 struct drm_i915_private *i915 = set->i915;
353 struct intel_engine_cs **siblings;
354 u16 num_siblings, idx;
355 unsigned int n;
356 int err;
357
358 if (!HAS_EXECLISTS(i915))
359 return -ENODEV;
360
361 if (get_user(idx, &ext->engine_index))
362 return -EFAULT;
363
364 if (idx >= set->num_engines) {
365 drm_dbg(&i915->drm, "Invalid placement value, %d >= %d\n",
366 idx, set->num_engines);
367 return -EINVAL;
368 }
369
370 idx = array_index_nospec(idx, set->num_engines);
371 if (set->engines[idx].type != I915_GEM_ENGINE_TYPE_INVALID) {
372 drm_dbg(&i915->drm,
373 "Invalid placement[%d], already occupied\n", idx);
374 return -EEXIST;
375 }
376
377 if (get_user(num_siblings, &ext->num_siblings))
378 return -EFAULT;
379
380 err = check_user_mbz(&ext->flags);
381 if (err)
382 return err;
383
384 err = check_user_mbz(&ext->mbz64);
385 if (err)
386 return err;
387
388 if (num_siblings == 0)
389 return 0;
390
391 siblings = kmalloc_array(num_siblings, sizeof(*siblings), GFP_KERNEL);
392 if (!siblings)
393 return -ENOMEM;
394
395 for (n = 0; n < num_siblings; n++) {
396 struct i915_engine_class_instance ci;
397
398 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
399 err = -EFAULT;
400 goto err_siblings;
401 }
402
403 siblings[n] = intel_engine_lookup_user(i915,
404 ci.engine_class,
405 ci.engine_instance);
406 if (!siblings[n]) {
407 drm_dbg(&i915->drm,
408 "Invalid sibling[%d]: { class:%d, inst:%d }\n",
409 n, ci.engine_class, ci.engine_instance);
410 err = -EINVAL;
411 goto err_siblings;
412 }
413 }
414
415 if (num_siblings == 1) {
416 set->engines[idx].type = I915_GEM_ENGINE_TYPE_PHYSICAL;
417 set->engines[idx].engine = siblings[0];
418 kfree(siblings);
419 } else {
420 set->engines[idx].type = I915_GEM_ENGINE_TYPE_BALANCED;
421 set->engines[idx].num_siblings = num_siblings;
422 set->engines[idx].siblings = siblings;
423 }
424
425 return 0;
426
427 err_siblings:
428 kfree(siblings);
429
430 return err;
431 }
432
433 static int
set_proto_ctx_engines_bond(struct i915_user_extension __user * base,void * data)434 set_proto_ctx_engines_bond(struct i915_user_extension __user *base, void *data)
435 {
436 struct i915_context_engines_bond __user *ext =
437 container_of_user(base, typeof(*ext), base);
438 const struct set_proto_ctx_engines *set = data;
439 struct drm_i915_private *i915 = set->i915;
440 struct i915_engine_class_instance ci;
441 struct intel_engine_cs *master;
442 u16 idx, num_bonds;
443 int err, n;
444
445 if (GRAPHICS_VER(i915) >= 12 && !IS_TIGERLAKE(i915) &&
446 !IS_ROCKETLAKE(i915) && !IS_ALDERLAKE_S(i915)) {
447 drm_dbg(&i915->drm,
448 "Bonding on gen12+ aside from TGL, RKL, and ADL_S not supported\n");
449 return -ENODEV;
450 }
451
452 if (get_user(idx, &ext->virtual_index))
453 return -EFAULT;
454
455 if (idx >= set->num_engines) {
456 drm_dbg(&i915->drm,
457 "Invalid index for virtual engine: %d >= %d\n",
458 idx, set->num_engines);
459 return -EINVAL;
460 }
461
462 idx = array_index_nospec(idx, set->num_engines);
463 if (set->engines[idx].type == I915_GEM_ENGINE_TYPE_INVALID) {
464 drm_dbg(&i915->drm, "Invalid engine at %d\n", idx);
465 return -EINVAL;
466 }
467
468 if (set->engines[idx].type != I915_GEM_ENGINE_TYPE_PHYSICAL) {
469 drm_dbg(&i915->drm,
470 "Bonding with virtual engines not allowed\n");
471 return -EINVAL;
472 }
473
474 err = check_user_mbz(&ext->flags);
475 if (err)
476 return err;
477
478 for (n = 0; n < ARRAY_SIZE(ext->mbz64); n++) {
479 err = check_user_mbz(&ext->mbz64[n]);
480 if (err)
481 return err;
482 }
483
484 if (copy_from_user(&ci, &ext->master, sizeof(ci)))
485 return -EFAULT;
486
487 master = intel_engine_lookup_user(i915,
488 ci.engine_class,
489 ci.engine_instance);
490 if (!master) {
491 drm_dbg(&i915->drm,
492 "Unrecognised master engine: { class:%u, instance:%u }\n",
493 ci.engine_class, ci.engine_instance);
494 return -EINVAL;
495 }
496
497 if (intel_engine_uses_guc(master)) {
498 DRM_DEBUG("bonding extension not supported with GuC submission");
499 return -ENODEV;
500 }
501
502 if (get_user(num_bonds, &ext->num_bonds))
503 return -EFAULT;
504
505 for (n = 0; n < num_bonds; n++) {
506 struct intel_engine_cs *bond;
507
508 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci)))
509 return -EFAULT;
510
511 bond = intel_engine_lookup_user(i915,
512 ci.engine_class,
513 ci.engine_instance);
514 if (!bond) {
515 drm_dbg(&i915->drm,
516 "Unrecognised engine[%d] for bonding: { class:%d, instance: %d }\n",
517 n, ci.engine_class, ci.engine_instance);
518 return -EINVAL;
519 }
520 }
521
522 return 0;
523 }
524
525 static const i915_user_extension_fn set_proto_ctx_engines_extensions[] = {
526 [I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE] = set_proto_ctx_engines_balance,
527 [I915_CONTEXT_ENGINES_EXT_BOND] = set_proto_ctx_engines_bond,
528 };
529
set_proto_ctx_engines(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,const struct drm_i915_gem_context_param * args)530 static int set_proto_ctx_engines(struct drm_i915_file_private *fpriv,
531 struct i915_gem_proto_context *pc,
532 const struct drm_i915_gem_context_param *args)
533 {
534 struct drm_i915_private *i915 = fpriv->dev_priv;
535 struct set_proto_ctx_engines set = { .i915 = i915 };
536 struct i915_context_param_engines __user *user =
537 u64_to_user_ptr(args->value);
538 unsigned int n;
539 u64 extensions;
540 int err;
541
542 if (pc->num_user_engines >= 0) {
543 drm_dbg(&i915->drm, "Cannot set engines twice");
544 return -EINVAL;
545 }
546
547 if (args->size < sizeof(*user) ||
548 !IS_ALIGNED(args->size - sizeof(*user), sizeof(*user->engines))) {
549 drm_dbg(&i915->drm, "Invalid size for engine array: %d\n",
550 args->size);
551 return -EINVAL;
552 }
553
554 set.num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines);
555 /* RING_MASK has no shift so we can use it directly here */
556 if (set.num_engines > I915_EXEC_RING_MASK + 1)
557 return -EINVAL;
558
559 set.engines = kmalloc_array(set.num_engines, sizeof(*set.engines), GFP_KERNEL);
560 if (!set.engines)
561 return -ENOMEM;
562
563 for (n = 0; n < set.num_engines; n++) {
564 struct i915_engine_class_instance ci;
565 struct intel_engine_cs *engine;
566
567 if (copy_from_user(&ci, &user->engines[n], sizeof(ci))) {
568 kfree(set.engines);
569 return -EFAULT;
570 }
571
572 memset(&set.engines[n], 0, sizeof(set.engines[n]));
573
574 if (ci.engine_class == (u16)I915_ENGINE_CLASS_INVALID &&
575 ci.engine_instance == (u16)I915_ENGINE_CLASS_INVALID_NONE)
576 continue;
577
578 engine = intel_engine_lookup_user(i915,
579 ci.engine_class,
580 ci.engine_instance);
581 if (!engine) {
582 drm_dbg(&i915->drm,
583 "Invalid engine[%d]: { class:%d, instance:%d }\n",
584 n, ci.engine_class, ci.engine_instance);
585 kfree(set.engines);
586 return -ENOENT;
587 }
588
589 set.engines[n].type = I915_GEM_ENGINE_TYPE_PHYSICAL;
590 set.engines[n].engine = engine;
591 }
592
593 err = -EFAULT;
594 if (!get_user(extensions, &user->extensions))
595 err = i915_user_extensions(u64_to_user_ptr(extensions),
596 set_proto_ctx_engines_extensions,
597 ARRAY_SIZE(set_proto_ctx_engines_extensions),
598 &set);
599 if (err) {
600 kfree(set.engines);
601 return err;
602 }
603
604 pc->num_user_engines = set.num_engines;
605 pc->user_engines = set.engines;
606
607 return 0;
608 }
609
set_proto_ctx_sseu(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,struct drm_i915_gem_context_param * args)610 static int set_proto_ctx_sseu(struct drm_i915_file_private *fpriv,
611 struct i915_gem_proto_context *pc,
612 struct drm_i915_gem_context_param *args)
613 {
614 struct drm_i915_private *i915 = fpriv->dev_priv;
615 struct drm_i915_gem_context_param_sseu user_sseu;
616 struct intel_sseu *sseu;
617 int ret;
618
619 if (args->size < sizeof(user_sseu))
620 return -EINVAL;
621
622 if (GRAPHICS_VER(i915) != 11)
623 return -ENODEV;
624
625 if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
626 sizeof(user_sseu)))
627 return -EFAULT;
628
629 if (user_sseu.rsvd)
630 return -EINVAL;
631
632 if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
633 return -EINVAL;
634
635 if (!!(user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX) != (pc->num_user_engines >= 0))
636 return -EINVAL;
637
638 if (pc->num_user_engines >= 0) {
639 int idx = user_sseu.engine.engine_instance;
640 struct i915_gem_proto_engine *pe;
641
642 if (idx >= pc->num_user_engines)
643 return -EINVAL;
644
645 idx = array_index_nospec(idx, pc->num_user_engines);
646 pe = &pc->user_engines[idx];
647
648 /* Only render engine supports RPCS configuration. */
649 if (pe->engine->class != RENDER_CLASS)
650 return -EINVAL;
651
652 sseu = &pe->sseu;
653 } else {
654 /* Only render engine supports RPCS configuration. */
655 if (user_sseu.engine.engine_class != I915_ENGINE_CLASS_RENDER)
656 return -EINVAL;
657
658 /* There is only one render engine */
659 if (user_sseu.engine.engine_instance != 0)
660 return -EINVAL;
661
662 sseu = &pc->legacy_rcs_sseu;
663 }
664
665 ret = i915_gem_user_to_context_sseu(&i915->gt, &user_sseu, sseu);
666 if (ret)
667 return ret;
668
669 args->size = sizeof(user_sseu);
670
671 return 0;
672 }
673
set_proto_ctx_param(struct drm_i915_file_private * fpriv,struct i915_gem_proto_context * pc,struct drm_i915_gem_context_param * args)674 static int set_proto_ctx_param(struct drm_i915_file_private *fpriv,
675 struct i915_gem_proto_context *pc,
676 struct drm_i915_gem_context_param *args)
677 {
678 int ret = 0;
679
680 switch (args->param) {
681 case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
682 if (args->size)
683 ret = -EINVAL;
684 else if (args->value)
685 pc->user_flags |= BIT(UCONTEXT_NO_ERROR_CAPTURE);
686 else
687 pc->user_flags &= ~BIT(UCONTEXT_NO_ERROR_CAPTURE);
688 break;
689
690 case I915_CONTEXT_PARAM_BANNABLE:
691 if (args->size)
692 ret = -EINVAL;
693 else if (!capable(CAP_SYS_ADMIN) && !args->value)
694 ret = -EPERM;
695 else if (args->value)
696 pc->user_flags |= BIT(UCONTEXT_BANNABLE);
697 else
698 pc->user_flags &= ~BIT(UCONTEXT_BANNABLE);
699 break;
700
701 case I915_CONTEXT_PARAM_RECOVERABLE:
702 if (args->size)
703 ret = -EINVAL;
704 else if (args->value)
705 pc->user_flags |= BIT(UCONTEXT_RECOVERABLE);
706 else
707 pc->user_flags &= ~BIT(UCONTEXT_RECOVERABLE);
708 break;
709
710 case I915_CONTEXT_PARAM_PRIORITY:
711 ret = validate_priority(fpriv->dev_priv, args);
712 if (!ret)
713 pc->sched.priority = args->value;
714 break;
715
716 case I915_CONTEXT_PARAM_SSEU:
717 ret = set_proto_ctx_sseu(fpriv, pc, args);
718 break;
719
720 case I915_CONTEXT_PARAM_VM:
721 ret = set_proto_ctx_vm(fpriv, pc, args);
722 break;
723
724 case I915_CONTEXT_PARAM_ENGINES:
725 ret = set_proto_ctx_engines(fpriv, pc, args);
726 break;
727
728 case I915_CONTEXT_PARAM_PERSISTENCE:
729 if (args->size)
730 ret = -EINVAL;
731 else
732 ret = proto_context_set_persistence(fpriv->dev_priv, pc,
733 args->value);
734 break;
735
736 case I915_CONTEXT_PARAM_NO_ZEROMAP:
737 case I915_CONTEXT_PARAM_BAN_PERIOD:
738 case I915_CONTEXT_PARAM_RINGSIZE:
739 default:
740 ret = -EINVAL;
741 break;
742 }
743
744 return ret;
745 }
746
747 static struct i915_address_space *
context_get_vm_rcu(struct i915_gem_context * ctx)748 context_get_vm_rcu(struct i915_gem_context *ctx)
749 {
750 GEM_BUG_ON(!rcu_access_pointer(ctx->vm));
751
752 do {
753 struct i915_address_space *vm;
754
755 /*
756 * We do not allow downgrading from full-ppgtt [to a shared
757 * global gtt], so ctx->vm cannot become NULL.
758 */
759 vm = rcu_dereference(ctx->vm);
760 if (!kref_get_unless_zero(&vm->ref))
761 continue;
762
763 /*
764 * This ppgtt may have be reallocated between
765 * the read and the kref, and reassigned to a third
766 * context. In order to avoid inadvertent sharing
767 * of this ppgtt with that third context (and not
768 * src), we have to confirm that we have the same
769 * ppgtt after passing through the strong memory
770 * barrier implied by a successful
771 * kref_get_unless_zero().
772 *
773 * Once we have acquired the current ppgtt of ctx,
774 * we no longer care if it is released from ctx, as
775 * it cannot be reallocated elsewhere.
776 */
777
778 if (vm == rcu_access_pointer(ctx->vm))
779 return rcu_pointer_handoff(vm);
780
781 i915_vm_put(vm);
782 } while (1);
783 }
784
intel_context_set_gem(struct intel_context * ce,struct i915_gem_context * ctx,struct intel_sseu sseu)785 static int intel_context_set_gem(struct intel_context *ce,
786 struct i915_gem_context *ctx,
787 struct intel_sseu sseu)
788 {
789 int ret = 0;
790
791 GEM_BUG_ON(rcu_access_pointer(ce->gem_context));
792 RCU_INIT_POINTER(ce->gem_context, ctx);
793
794 ce->ring_size = SZ_16K;
795
796 if (rcu_access_pointer(ctx->vm)) {
797 struct i915_address_space *vm;
798
799 rcu_read_lock();
800 vm = context_get_vm_rcu(ctx); /* hmm */
801 rcu_read_unlock();
802
803 i915_vm_put(ce->vm);
804 ce->vm = vm;
805 }
806
807 if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
808 intel_engine_has_timeslices(ce->engine) &&
809 intel_engine_has_semaphores(ce->engine))
810 __set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
811
812 if (IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) &&
813 ctx->i915->params.request_timeout_ms) {
814 unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
815
816 intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000);
817 }
818
819 /* A valid SSEU has no zero fields */
820 if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS))
821 ret = intel_context_reconfigure_sseu(ce, sseu);
822
823 return ret;
824 }
825
__free_engines(struct i915_gem_engines * e,unsigned int count)826 static void __free_engines(struct i915_gem_engines *e, unsigned int count)
827 {
828 while (count--) {
829 if (!e->engines[count])
830 continue;
831
832 intel_context_put(e->engines[count]);
833 }
834 kfree(e);
835 }
836
free_engines(struct i915_gem_engines * e)837 static void free_engines(struct i915_gem_engines *e)
838 {
839 __free_engines(e, e->num_engines);
840 }
841
free_engines_rcu(struct rcu_head * rcu)842 static void free_engines_rcu(struct rcu_head *rcu)
843 {
844 struct i915_gem_engines *engines =
845 container_of(rcu, struct i915_gem_engines, rcu);
846
847 i915_sw_fence_fini(&engines->fence);
848 free_engines(engines);
849 }
850
851 static int __i915_sw_fence_call
engines_notify(struct i915_sw_fence * fence,enum i915_sw_fence_notify state)852 engines_notify(struct i915_sw_fence *fence, enum i915_sw_fence_notify state)
853 {
854 struct i915_gem_engines *engines =
855 container_of(fence, typeof(*engines), fence);
856
857 switch (state) {
858 case FENCE_COMPLETE:
859 if (!list_empty(&engines->link)) {
860 struct i915_gem_context *ctx = engines->ctx;
861 unsigned long flags;
862
863 spin_lock_irqsave(&ctx->stale.lock, flags);
864 list_del(&engines->link);
865 spin_unlock_irqrestore(&ctx->stale.lock, flags);
866 }
867 i915_gem_context_put(engines->ctx);
868 break;
869
870 case FENCE_FREE:
871 init_rcu_head(&engines->rcu);
872 call_rcu(&engines->rcu, free_engines_rcu);
873 break;
874 }
875
876 return NOTIFY_DONE;
877 }
878
alloc_engines(unsigned int count)879 static struct i915_gem_engines *alloc_engines(unsigned int count)
880 {
881 struct i915_gem_engines *e;
882
883 e = kzalloc(struct_size(e, engines, count), GFP_KERNEL);
884 if (!e)
885 return NULL;
886
887 i915_sw_fence_init(&e->fence, engines_notify);
888 return e;
889 }
890
default_engines(struct i915_gem_context * ctx,struct intel_sseu rcs_sseu)891 static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx,
892 struct intel_sseu rcs_sseu)
893 {
894 const struct intel_gt *gt = &ctx->i915->gt;
895 struct intel_engine_cs *engine;
896 struct i915_gem_engines *e, *err;
897 enum intel_engine_id id;
898
899 e = alloc_engines(I915_NUM_ENGINES);
900 if (!e)
901 return ERR_PTR(-ENOMEM);
902
903 for_each_engine(engine, gt, id) {
904 struct intel_context *ce;
905 struct intel_sseu sseu = {};
906 int ret;
907
908 if (engine->legacy_idx == INVALID_ENGINE)
909 continue;
910
911 GEM_BUG_ON(engine->legacy_idx >= I915_NUM_ENGINES);
912 GEM_BUG_ON(e->engines[engine->legacy_idx]);
913
914 ce = intel_context_create(engine);
915 if (IS_ERR(ce)) {
916 err = ERR_CAST(ce);
917 goto free_engines;
918 }
919
920 e->engines[engine->legacy_idx] = ce;
921 e->num_engines = max(e->num_engines, engine->legacy_idx + 1);
922
923 if (engine->class == RENDER_CLASS)
924 sseu = rcs_sseu;
925
926 ret = intel_context_set_gem(ce, ctx, sseu);
927 if (ret) {
928 err = ERR_PTR(ret);
929 goto free_engines;
930 }
931
932 }
933
934 return e;
935
936 free_engines:
937 free_engines(e);
938 return err;
939 }
940
user_engines(struct i915_gem_context * ctx,unsigned int num_engines,struct i915_gem_proto_engine * pe)941 static struct i915_gem_engines *user_engines(struct i915_gem_context *ctx,
942 unsigned int num_engines,
943 struct i915_gem_proto_engine *pe)
944 {
945 struct i915_gem_engines *e, *err;
946 unsigned int n;
947
948 e = alloc_engines(num_engines);
949 if (!e)
950 return ERR_PTR(-ENOMEM);
951 e->num_engines = num_engines;
952
953 for (n = 0; n < num_engines; n++) {
954 struct intel_context *ce;
955 int ret;
956
957 switch (pe[n].type) {
958 case I915_GEM_ENGINE_TYPE_PHYSICAL:
959 ce = intel_context_create(pe[n].engine);
960 break;
961
962 case I915_GEM_ENGINE_TYPE_BALANCED:
963 ce = intel_engine_create_virtual(pe[n].siblings,
964 pe[n].num_siblings);
965 break;
966
967 case I915_GEM_ENGINE_TYPE_INVALID:
968 default:
969 GEM_WARN_ON(pe[n].type != I915_GEM_ENGINE_TYPE_INVALID);
970 continue;
971 }
972
973 if (IS_ERR(ce)) {
974 err = ERR_CAST(ce);
975 goto free_engines;
976 }
977
978 e->engines[n] = ce;
979
980 ret = intel_context_set_gem(ce, ctx, pe->sseu);
981 if (ret) {
982 err = ERR_PTR(ret);
983 goto free_engines;
984 }
985 }
986
987 return e;
988
989 free_engines:
990 free_engines(e);
991 return err;
992 }
993
i915_gem_context_release(struct kref * ref)994 void i915_gem_context_release(struct kref *ref)
995 {
996 struct i915_gem_context *ctx = container_of(ref, typeof(*ctx), ref);
997
998 trace_i915_context_free(ctx);
999 GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
1000
1001 spin_lock(&ctx->i915->gem.contexts.lock);
1002 list_del(&ctx->link);
1003 spin_unlock(&ctx->i915->gem.contexts.lock);
1004
1005 if (ctx->syncobj)
1006 drm_syncobj_put(ctx->syncobj);
1007
1008 mutex_destroy(&ctx->engines_mutex);
1009 mutex_destroy(&ctx->lut_mutex);
1010
1011 put_pid(ctx->pid);
1012 mutex_destroy(&ctx->mutex);
1013
1014 kfree_rcu(ctx, rcu);
1015 }
1016
1017 static inline struct i915_gem_engines *
__context_engines_static(const struct i915_gem_context * ctx)1018 __context_engines_static(const struct i915_gem_context *ctx)
1019 {
1020 return rcu_dereference_protected(ctx->engines, true);
1021 }
1022
__reset_context(struct i915_gem_context * ctx,struct intel_engine_cs * engine)1023 static void __reset_context(struct i915_gem_context *ctx,
1024 struct intel_engine_cs *engine)
1025 {
1026 intel_gt_handle_error(engine->gt, engine->mask, 0,
1027 "context closure in %s", ctx->name);
1028 }
1029
__cancel_engine(struct intel_engine_cs * engine)1030 static bool __cancel_engine(struct intel_engine_cs *engine)
1031 {
1032 /*
1033 * Send a "high priority pulse" down the engine to cause the
1034 * current request to be momentarily preempted. (If it fails to
1035 * be preempted, it will be reset). As we have marked our context
1036 * as banned, any incomplete request, including any running, will
1037 * be skipped following the preemption.
1038 *
1039 * If there is no hangchecking (one of the reasons why we try to
1040 * cancel the context) and no forced preemption, there may be no
1041 * means by which we reset the GPU and evict the persistent hog.
1042 * Ergo if we are unable to inject a preemptive pulse that can
1043 * kill the banned context, we fallback to doing a local reset
1044 * instead.
1045 */
1046 return intel_engine_pulse(engine) == 0;
1047 }
1048
active_engine(struct intel_context * ce)1049 static struct intel_engine_cs *active_engine(struct intel_context *ce)
1050 {
1051 struct intel_engine_cs *engine = NULL;
1052 struct i915_request *rq;
1053
1054 if (intel_context_has_inflight(ce))
1055 return intel_context_inflight(ce);
1056
1057 if (!ce->timeline)
1058 return NULL;
1059
1060 /*
1061 * rq->link is only SLAB_TYPESAFE_BY_RCU, we need to hold a reference
1062 * to the request to prevent it being transferred to a new timeline
1063 * (and onto a new timeline->requests list).
1064 */
1065 rcu_read_lock();
1066 list_for_each_entry_reverse(rq, &ce->timeline->requests, link) {
1067 bool found;
1068
1069 /* timeline is already completed upto this point? */
1070 if (!i915_request_get_rcu(rq))
1071 break;
1072
1073 /* Check with the backend if the request is inflight */
1074 found = true;
1075 if (likely(rcu_access_pointer(rq->timeline) == ce->timeline))
1076 found = i915_request_active_engine(rq, &engine);
1077
1078 i915_request_put(rq);
1079 if (found)
1080 break;
1081 }
1082 rcu_read_unlock();
1083
1084 return engine;
1085 }
1086
kill_engines(struct i915_gem_engines * engines,bool ban)1087 static void kill_engines(struct i915_gem_engines *engines, bool ban)
1088 {
1089 struct i915_gem_engines_iter it;
1090 struct intel_context *ce;
1091
1092 /*
1093 * Map the user's engine back to the actual engines; one virtual
1094 * engine will be mapped to multiple engines, and using ctx->engine[]
1095 * the same engine may be have multiple instances in the user's map.
1096 * However, we only care about pending requests, so only include
1097 * engines on which there are incomplete requests.
1098 */
1099 for_each_gem_engine(ce, engines, it) {
1100 struct intel_engine_cs *engine;
1101
1102 if (ban && intel_context_ban(ce, NULL))
1103 continue;
1104
1105 /*
1106 * Check the current active state of this context; if we
1107 * are currently executing on the GPU we need to evict
1108 * ourselves. On the other hand, if we haven't yet been
1109 * submitted to the GPU or if everything is complete,
1110 * we have nothing to do.
1111 */
1112 engine = active_engine(ce);
1113
1114 /* First attempt to gracefully cancel the context */
1115 if (engine && !__cancel_engine(engine) && ban)
1116 /*
1117 * If we are unable to send a preemptive pulse to bump
1118 * the context from the GPU, we have to resort to a full
1119 * reset. We hope the collateral damage is worth it.
1120 */
1121 __reset_context(engines->ctx, engine);
1122 }
1123 }
1124
kill_context(struct i915_gem_context * ctx)1125 static void kill_context(struct i915_gem_context *ctx)
1126 {
1127 bool ban = (!i915_gem_context_is_persistent(ctx) ||
1128 !ctx->i915->params.enable_hangcheck);
1129 struct i915_gem_engines *pos, *next;
1130
1131 spin_lock_irq(&ctx->stale.lock);
1132 GEM_BUG_ON(!i915_gem_context_is_closed(ctx));
1133 list_for_each_entry_safe(pos, next, &ctx->stale.engines, link) {
1134 if (!i915_sw_fence_await(&pos->fence)) {
1135 list_del_init(&pos->link);
1136 continue;
1137 }
1138
1139 spin_unlock_irq(&ctx->stale.lock);
1140
1141 kill_engines(pos, ban);
1142
1143 spin_lock_irq(&ctx->stale.lock);
1144 GEM_BUG_ON(i915_sw_fence_signaled(&pos->fence));
1145 list_safe_reset_next(pos, next, link);
1146 list_del_init(&pos->link); /* decouple from FENCE_COMPLETE */
1147
1148 i915_sw_fence_complete(&pos->fence);
1149 }
1150 spin_unlock_irq(&ctx->stale.lock);
1151 }
1152
engines_idle_release(struct i915_gem_context * ctx,struct i915_gem_engines * engines)1153 static void engines_idle_release(struct i915_gem_context *ctx,
1154 struct i915_gem_engines *engines)
1155 {
1156 struct i915_gem_engines_iter it;
1157 struct intel_context *ce;
1158
1159 INIT_LIST_HEAD(&engines->link);
1160
1161 engines->ctx = i915_gem_context_get(ctx);
1162
1163 for_each_gem_engine(ce, engines, it) {
1164 int err;
1165
1166 /* serialises with execbuf */
1167 set_bit(CONTEXT_CLOSED_BIT, &ce->flags);
1168 if (!intel_context_pin_if_active(ce))
1169 continue;
1170
1171 /* Wait until context is finally scheduled out and retired */
1172 err = i915_sw_fence_await_active(&engines->fence,
1173 &ce->active,
1174 I915_ACTIVE_AWAIT_BARRIER);
1175 intel_context_unpin(ce);
1176 if (err)
1177 goto kill;
1178 }
1179
1180 spin_lock_irq(&ctx->stale.lock);
1181 if (!i915_gem_context_is_closed(ctx))
1182 list_add_tail(&engines->link, &ctx->stale.engines);
1183 spin_unlock_irq(&ctx->stale.lock);
1184
1185 kill:
1186 if (list_empty(&engines->link)) /* raced, already closed */
1187 kill_engines(engines, true);
1188
1189 i915_sw_fence_commit(&engines->fence);
1190 }
1191
set_closed_name(struct i915_gem_context * ctx)1192 static void set_closed_name(struct i915_gem_context *ctx)
1193 {
1194 char *s;
1195
1196 /* Replace '[]' with '<>' to indicate closed in debug prints */
1197
1198 s = strrchr(ctx->name, '[');
1199 if (!s)
1200 return;
1201
1202 *s = '<';
1203
1204 s = strchr(s + 1, ']');
1205 if (s)
1206 *s = '>';
1207 }
1208
context_close(struct i915_gem_context * ctx)1209 static void context_close(struct i915_gem_context *ctx)
1210 {
1211 struct i915_address_space *vm;
1212
1213 /* Flush any concurrent set_engines() */
1214 mutex_lock(&ctx->engines_mutex);
1215 engines_idle_release(ctx, rcu_replace_pointer(ctx->engines, NULL, 1));
1216 i915_gem_context_set_closed(ctx);
1217 mutex_unlock(&ctx->engines_mutex);
1218
1219 mutex_lock(&ctx->mutex);
1220
1221 set_closed_name(ctx);
1222
1223 vm = i915_gem_context_vm(ctx);
1224 if (vm)
1225 i915_vm_close(vm);
1226
1227 ctx->file_priv = ERR_PTR(-EBADF);
1228
1229 /*
1230 * The LUT uses the VMA as a backpointer to unref the object,
1231 * so we need to clear the LUT before we close all the VMA (inside
1232 * the ppgtt).
1233 */
1234 lut_close(ctx);
1235
1236 mutex_unlock(&ctx->mutex);
1237
1238 /*
1239 * If the user has disabled hangchecking, we can not be sure that
1240 * the batches will ever complete after the context is closed,
1241 * keeping the context and all resources pinned forever. So in this
1242 * case we opt to forcibly kill off all remaining requests on
1243 * context close.
1244 */
1245 kill_context(ctx);
1246
1247 i915_gem_context_put(ctx);
1248 }
1249
__context_set_persistence(struct i915_gem_context * ctx,bool state)1250 static int __context_set_persistence(struct i915_gem_context *ctx, bool state)
1251 {
1252 if (i915_gem_context_is_persistent(ctx) == state)
1253 return 0;
1254
1255 if (state) {
1256 /*
1257 * Only contexts that are short-lived [that will expire or be
1258 * reset] are allowed to survive past termination. We require
1259 * hangcheck to ensure that the persistent requests are healthy.
1260 */
1261 if (!ctx->i915->params.enable_hangcheck)
1262 return -EINVAL;
1263
1264 i915_gem_context_set_persistence(ctx);
1265 } else {
1266 /* To cancel a context we use "preempt-to-idle" */
1267 if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
1268 return -ENODEV;
1269
1270 /*
1271 * If the cancel fails, we then need to reset, cleanly!
1272 *
1273 * If the per-engine reset fails, all hope is lost! We resort
1274 * to a full GPU reset in that unlikely case, but realistically
1275 * if the engine could not reset, the full reset does not fare
1276 * much better. The damage has been done.
1277 *
1278 * However, if we cannot reset an engine by itself, we cannot
1279 * cleanup a hanging persistent context without causing
1280 * colateral damage, and we should not pretend we can by
1281 * exposing the interface.
1282 */
1283 if (!intel_has_reset_engine(&ctx->i915->gt))
1284 return -ENODEV;
1285
1286 i915_gem_context_clear_persistence(ctx);
1287 }
1288
1289 return 0;
1290 }
1291
1292 static inline struct i915_gem_engines *
__context_engines_await(const struct i915_gem_context * ctx,bool * user_engines)1293 __context_engines_await(const struct i915_gem_context *ctx,
1294 bool *user_engines)
1295 {
1296 struct i915_gem_engines *engines;
1297
1298 rcu_read_lock();
1299 do {
1300 engines = rcu_dereference(ctx->engines);
1301 GEM_BUG_ON(!engines);
1302
1303 if (user_engines)
1304 *user_engines = i915_gem_context_user_engines(ctx);
1305
1306 /* successful await => strong mb */
1307 if (unlikely(!i915_sw_fence_await(&engines->fence)))
1308 continue;
1309
1310 if (likely(engines == rcu_access_pointer(ctx->engines)))
1311 break;
1312
1313 i915_sw_fence_complete(&engines->fence);
1314 } while (1);
1315 rcu_read_unlock();
1316
1317 return engines;
1318 }
1319
1320 static void
context_apply_all(struct i915_gem_context * ctx,void (* fn)(struct intel_context * ce,void * data),void * data)1321 context_apply_all(struct i915_gem_context *ctx,
1322 void (*fn)(struct intel_context *ce, void *data),
1323 void *data)
1324 {
1325 struct i915_gem_engines_iter it;
1326 struct i915_gem_engines *e;
1327 struct intel_context *ce;
1328
1329 e = __context_engines_await(ctx, NULL);
1330 for_each_gem_engine(ce, e, it)
1331 fn(ce, data);
1332 i915_sw_fence_complete(&e->fence);
1333 }
1334
1335 static struct i915_gem_context *
i915_gem_create_context(struct drm_i915_private * i915,const struct i915_gem_proto_context * pc)1336 i915_gem_create_context(struct drm_i915_private *i915,
1337 const struct i915_gem_proto_context *pc)
1338 {
1339 struct i915_gem_context *ctx;
1340 struct i915_address_space *vm = NULL;
1341 struct i915_gem_engines *e;
1342 int err;
1343 int i;
1344
1345 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
1346 if (!ctx)
1347 return ERR_PTR(-ENOMEM);
1348
1349 kref_init(&ctx->ref);
1350 ctx->i915 = i915;
1351 ctx->sched = pc->sched;
1352 mutex_init(&ctx->mutex);
1353 INIT_LIST_HEAD(&ctx->link);
1354
1355 spin_lock_init(&ctx->stale.lock);
1356 INIT_LIST_HEAD(&ctx->stale.engines);
1357
1358 if (pc->vm) {
1359 vm = i915_vm_get(pc->vm);
1360 } else if (HAS_FULL_PPGTT(i915)) {
1361 struct i915_ppgtt *ppgtt;
1362
1363 ppgtt = i915_ppgtt_create(&i915->gt);
1364 if (IS_ERR(ppgtt)) {
1365 drm_dbg(&i915->drm, "PPGTT setup failed (%ld)\n",
1366 PTR_ERR(ppgtt));
1367 err = PTR_ERR(ppgtt);
1368 goto err_ctx;
1369 }
1370 vm = &ppgtt->vm;
1371 }
1372 if (vm) {
1373 RCU_INIT_POINTER(ctx->vm, i915_vm_open(vm));
1374
1375 /* i915_vm_open() takes a reference */
1376 i915_vm_put(vm);
1377 }
1378
1379 mutex_init(&ctx->engines_mutex);
1380 if (pc->num_user_engines >= 0) {
1381 i915_gem_context_set_user_engines(ctx);
1382 e = user_engines(ctx, pc->num_user_engines, pc->user_engines);
1383 } else {
1384 i915_gem_context_clear_user_engines(ctx);
1385 e = default_engines(ctx, pc->legacy_rcs_sseu);
1386 }
1387 if (IS_ERR(e)) {
1388 err = PTR_ERR(e);
1389 goto err_vm;
1390 }
1391 RCU_INIT_POINTER(ctx->engines, e);
1392
1393 INIT_RADIX_TREE(&ctx->handles_vma, GFP_KERNEL);
1394 mutex_init(&ctx->lut_mutex);
1395
1396 /* NB: Mark all slices as needing a remap so that when the context first
1397 * loads it will restore whatever remap state already exists. If there
1398 * is no remap info, it will be a NOP. */
1399 ctx->remap_slice = ALL_L3_SLICES(i915);
1400
1401 ctx->user_flags = pc->user_flags;
1402
1403 for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
1404 ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
1405
1406 if (pc->single_timeline) {
1407 err = drm_syncobj_create(&ctx->syncobj,
1408 DRM_SYNCOBJ_CREATE_SIGNALED,
1409 NULL);
1410 if (err)
1411 goto err_engines;
1412 }
1413
1414 trace_i915_context_create(ctx);
1415
1416 return ctx;
1417
1418 err_engines:
1419 free_engines(e);
1420 err_vm:
1421 if (ctx->vm)
1422 i915_vm_close(ctx->vm);
1423 err_ctx:
1424 kfree(ctx);
1425 return ERR_PTR(err);
1426 }
1427
init_contexts(struct i915_gem_contexts * gc)1428 static void init_contexts(struct i915_gem_contexts *gc)
1429 {
1430 spin_lock_init(&gc->lock);
1431 INIT_LIST_HEAD(&gc->list);
1432 }
1433
i915_gem_init__contexts(struct drm_i915_private * i915)1434 void i915_gem_init__contexts(struct drm_i915_private *i915)
1435 {
1436 init_contexts(&i915->gem.contexts);
1437 }
1438
gem_context_register(struct i915_gem_context * ctx,struct drm_i915_file_private * fpriv,u32 id)1439 static void gem_context_register(struct i915_gem_context *ctx,
1440 struct drm_i915_file_private *fpriv,
1441 u32 id)
1442 {
1443 struct drm_i915_private *i915 = ctx->i915;
1444 void *old;
1445
1446 ctx->file_priv = fpriv;
1447
1448 ctx->pid = get_task_pid(current, PIDTYPE_PID);
1449 snprintf(ctx->name, sizeof(ctx->name), "%s[%d]",
1450 current->comm, pid_nr(ctx->pid));
1451
1452 /* And finally expose ourselves to userspace via the idr */
1453 old = xa_store(&fpriv->context_xa, id, ctx, GFP_KERNEL);
1454 WARN_ON(old);
1455
1456 spin_lock(&i915->gem.contexts.lock);
1457 list_add_tail(&ctx->link, &i915->gem.contexts.list);
1458 spin_unlock(&i915->gem.contexts.lock);
1459 }
1460
i915_gem_context_open(struct drm_i915_private * i915,struct drm_file * file)1461 int i915_gem_context_open(struct drm_i915_private *i915,
1462 struct drm_file *file)
1463 {
1464 struct drm_i915_file_private *file_priv = file->driver_priv;
1465 struct i915_gem_proto_context *pc;
1466 struct i915_gem_context *ctx;
1467 int err;
1468
1469 mutex_init(&file_priv->proto_context_lock);
1470 xa_init_flags(&file_priv->proto_context_xa, XA_FLAGS_ALLOC);
1471
1472 /* 0 reserved for the default context */
1473 xa_init_flags(&file_priv->context_xa, XA_FLAGS_ALLOC1);
1474
1475 /* 0 reserved for invalid/unassigned ppgtt */
1476 xa_init_flags(&file_priv->vm_xa, XA_FLAGS_ALLOC1);
1477
1478 pc = proto_context_create(i915, 0);
1479 if (IS_ERR(pc)) {
1480 err = PTR_ERR(pc);
1481 goto err;
1482 }
1483
1484 ctx = i915_gem_create_context(i915, pc);
1485 proto_context_close(pc);
1486 if (IS_ERR(ctx)) {
1487 err = PTR_ERR(ctx);
1488 goto err;
1489 }
1490
1491 gem_context_register(ctx, file_priv, 0);
1492
1493 return 0;
1494
1495 err:
1496 xa_destroy(&file_priv->vm_xa);
1497 xa_destroy(&file_priv->context_xa);
1498 xa_destroy(&file_priv->proto_context_xa);
1499 mutex_destroy(&file_priv->proto_context_lock);
1500 return err;
1501 }
1502
i915_gem_context_close(struct drm_file * file)1503 void i915_gem_context_close(struct drm_file *file)
1504 {
1505 struct drm_i915_file_private *file_priv = file->driver_priv;
1506 struct i915_gem_proto_context *pc;
1507 struct i915_address_space *vm;
1508 struct i915_gem_context *ctx;
1509 unsigned long idx;
1510
1511 xa_for_each(&file_priv->proto_context_xa, idx, pc)
1512 proto_context_close(pc);
1513 xa_destroy(&file_priv->proto_context_xa);
1514 mutex_destroy(&file_priv->proto_context_lock);
1515
1516 xa_for_each(&file_priv->context_xa, idx, ctx)
1517 context_close(ctx);
1518 xa_destroy(&file_priv->context_xa);
1519
1520 xa_for_each(&file_priv->vm_xa, idx, vm)
1521 i915_vm_put(vm);
1522 xa_destroy(&file_priv->vm_xa);
1523 }
1524
i915_gem_vm_create_ioctl(struct drm_device * dev,void * data,struct drm_file * file)1525 int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data,
1526 struct drm_file *file)
1527 {
1528 struct drm_i915_private *i915 = to_i915(dev);
1529 struct drm_i915_gem_vm_control *args = data;
1530 struct drm_i915_file_private *file_priv = file->driver_priv;
1531 struct i915_ppgtt *ppgtt;
1532 u32 id;
1533 int err;
1534
1535 if (!HAS_FULL_PPGTT(i915))
1536 return -ENODEV;
1537
1538 if (args->flags)
1539 return -EINVAL;
1540
1541 ppgtt = i915_ppgtt_create(&i915->gt);
1542 if (IS_ERR(ppgtt))
1543 return PTR_ERR(ppgtt);
1544
1545 if (args->extensions) {
1546 err = i915_user_extensions(u64_to_user_ptr(args->extensions),
1547 NULL, 0,
1548 ppgtt);
1549 if (err)
1550 goto err_put;
1551 }
1552
1553 err = xa_alloc(&file_priv->vm_xa, &id, &ppgtt->vm,
1554 xa_limit_32b, GFP_KERNEL);
1555 if (err)
1556 goto err_put;
1557
1558 GEM_BUG_ON(id == 0); /* reserved for invalid/unassigned ppgtt */
1559 args->vm_id = id;
1560 return 0;
1561
1562 err_put:
1563 i915_vm_put(&ppgtt->vm);
1564 return err;
1565 }
1566
i915_gem_vm_destroy_ioctl(struct drm_device * dev,void * data,struct drm_file * file)1567 int i915_gem_vm_destroy_ioctl(struct drm_device *dev, void *data,
1568 struct drm_file *file)
1569 {
1570 struct drm_i915_file_private *file_priv = file->driver_priv;
1571 struct drm_i915_gem_vm_control *args = data;
1572 struct i915_address_space *vm;
1573
1574 if (args->flags)
1575 return -EINVAL;
1576
1577 if (args->extensions)
1578 return -EINVAL;
1579
1580 vm = xa_erase(&file_priv->vm_xa, args->vm_id);
1581 if (!vm)
1582 return -ENOENT;
1583
1584 i915_vm_put(vm);
1585 return 0;
1586 }
1587
get_ppgtt(struct drm_i915_file_private * file_priv,struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)1588 static int get_ppgtt(struct drm_i915_file_private *file_priv,
1589 struct i915_gem_context *ctx,
1590 struct drm_i915_gem_context_param *args)
1591 {
1592 struct i915_address_space *vm;
1593 int err;
1594 u32 id;
1595
1596 if (!rcu_access_pointer(ctx->vm))
1597 return -ENODEV;
1598
1599 rcu_read_lock();
1600 vm = context_get_vm_rcu(ctx);
1601 rcu_read_unlock();
1602 if (!vm)
1603 return -ENODEV;
1604
1605 err = xa_alloc(&file_priv->vm_xa, &id, vm, xa_limit_32b, GFP_KERNEL);
1606 if (err)
1607 goto err_put;
1608
1609 i915_vm_open(vm);
1610
1611 GEM_BUG_ON(id == 0); /* reserved for invalid/unassigned ppgtt */
1612 args->value = id;
1613 args->size = 0;
1614
1615 err_put:
1616 i915_vm_put(vm);
1617 return err;
1618 }
1619
1620 int
i915_gem_user_to_context_sseu(struct intel_gt * gt,const struct drm_i915_gem_context_param_sseu * user,struct intel_sseu * context)1621 i915_gem_user_to_context_sseu(struct intel_gt *gt,
1622 const struct drm_i915_gem_context_param_sseu *user,
1623 struct intel_sseu *context)
1624 {
1625 const struct sseu_dev_info *device = >->info.sseu;
1626 struct drm_i915_private *i915 = gt->i915;
1627
1628 /* No zeros in any field. */
1629 if (!user->slice_mask || !user->subslice_mask ||
1630 !user->min_eus_per_subslice || !user->max_eus_per_subslice)
1631 return -EINVAL;
1632
1633 /* Max > min. */
1634 if (user->max_eus_per_subslice < user->min_eus_per_subslice)
1635 return -EINVAL;
1636
1637 /*
1638 * Some future proofing on the types since the uAPI is wider than the
1639 * current internal implementation.
1640 */
1641 if (overflows_type(user->slice_mask, context->slice_mask) ||
1642 overflows_type(user->subslice_mask, context->subslice_mask) ||
1643 overflows_type(user->min_eus_per_subslice,
1644 context->min_eus_per_subslice) ||
1645 overflows_type(user->max_eus_per_subslice,
1646 context->max_eus_per_subslice))
1647 return -EINVAL;
1648
1649 /* Check validity against hardware. */
1650 if (user->slice_mask & ~device->slice_mask)
1651 return -EINVAL;
1652
1653 if (user->subslice_mask & ~device->subslice_mask[0])
1654 return -EINVAL;
1655
1656 if (user->max_eus_per_subslice > device->max_eus_per_subslice)
1657 return -EINVAL;
1658
1659 context->slice_mask = user->slice_mask;
1660 context->subslice_mask = user->subslice_mask;
1661 context->min_eus_per_subslice = user->min_eus_per_subslice;
1662 context->max_eus_per_subslice = user->max_eus_per_subslice;
1663
1664 /* Part specific restrictions. */
1665 if (GRAPHICS_VER(i915) == 11) {
1666 unsigned int hw_s = hweight8(device->slice_mask);
1667 unsigned int hw_ss_per_s = hweight8(device->subslice_mask[0]);
1668 unsigned int req_s = hweight8(context->slice_mask);
1669 unsigned int req_ss = hweight8(context->subslice_mask);
1670
1671 /*
1672 * Only full subslice enablement is possible if more than one
1673 * slice is turned on.
1674 */
1675 if (req_s > 1 && req_ss != hw_ss_per_s)
1676 return -EINVAL;
1677
1678 /*
1679 * If more than four (SScount bitfield limit) subslices are
1680 * requested then the number has to be even.
1681 */
1682 if (req_ss > 4 && (req_ss & 1))
1683 return -EINVAL;
1684
1685 /*
1686 * If only one slice is enabled and subslice count is below the
1687 * device full enablement, it must be at most half of the all
1688 * available subslices.
1689 */
1690 if (req_s == 1 && req_ss < hw_ss_per_s &&
1691 req_ss > (hw_ss_per_s / 2))
1692 return -EINVAL;
1693
1694 /* ABI restriction - VME use case only. */
1695
1696 /* All slices or one slice only. */
1697 if (req_s != 1 && req_s != hw_s)
1698 return -EINVAL;
1699
1700 /*
1701 * Half subslices or full enablement only when one slice is
1702 * enabled.
1703 */
1704 if (req_s == 1 &&
1705 (req_ss != hw_ss_per_s && req_ss != (hw_ss_per_s / 2)))
1706 return -EINVAL;
1707
1708 /* No EU configuration changes. */
1709 if ((user->min_eus_per_subslice !=
1710 device->max_eus_per_subslice) ||
1711 (user->max_eus_per_subslice !=
1712 device->max_eus_per_subslice))
1713 return -EINVAL;
1714 }
1715
1716 return 0;
1717 }
1718
set_sseu(struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)1719 static int set_sseu(struct i915_gem_context *ctx,
1720 struct drm_i915_gem_context_param *args)
1721 {
1722 struct drm_i915_private *i915 = ctx->i915;
1723 struct drm_i915_gem_context_param_sseu user_sseu;
1724 struct intel_context *ce;
1725 struct intel_sseu sseu;
1726 unsigned long lookup;
1727 int ret;
1728
1729 if (args->size < sizeof(user_sseu))
1730 return -EINVAL;
1731
1732 if (GRAPHICS_VER(i915) != 11)
1733 return -ENODEV;
1734
1735 if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
1736 sizeof(user_sseu)))
1737 return -EFAULT;
1738
1739 if (user_sseu.rsvd)
1740 return -EINVAL;
1741
1742 if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
1743 return -EINVAL;
1744
1745 lookup = 0;
1746 if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
1747 lookup |= LOOKUP_USER_INDEX;
1748
1749 ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
1750 if (IS_ERR(ce))
1751 return PTR_ERR(ce);
1752
1753 /* Only render engine supports RPCS configuration. */
1754 if (ce->engine->class != RENDER_CLASS) {
1755 ret = -ENODEV;
1756 goto out_ce;
1757 }
1758
1759 ret = i915_gem_user_to_context_sseu(ce->engine->gt, &user_sseu, &sseu);
1760 if (ret)
1761 goto out_ce;
1762
1763 ret = intel_context_reconfigure_sseu(ce, sseu);
1764 if (ret)
1765 goto out_ce;
1766
1767 args->size = sizeof(user_sseu);
1768
1769 out_ce:
1770 intel_context_put(ce);
1771 return ret;
1772 }
1773
1774 static int
set_persistence(struct i915_gem_context * ctx,const struct drm_i915_gem_context_param * args)1775 set_persistence(struct i915_gem_context *ctx,
1776 const struct drm_i915_gem_context_param *args)
1777 {
1778 if (args->size)
1779 return -EINVAL;
1780
1781 return __context_set_persistence(ctx, args->value);
1782 }
1783
__apply_priority(struct intel_context * ce,void * arg)1784 static void __apply_priority(struct intel_context *ce, void *arg)
1785 {
1786 struct i915_gem_context *ctx = arg;
1787
1788 if (!intel_engine_has_timeslices(ce->engine))
1789 return;
1790
1791 if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
1792 intel_engine_has_semaphores(ce->engine))
1793 intel_context_set_use_semaphores(ce);
1794 else
1795 intel_context_clear_use_semaphores(ce);
1796 }
1797
set_priority(struct i915_gem_context * ctx,const struct drm_i915_gem_context_param * args)1798 static int set_priority(struct i915_gem_context *ctx,
1799 const struct drm_i915_gem_context_param *args)
1800 {
1801 int err;
1802
1803 err = validate_priority(ctx->i915, args);
1804 if (err)
1805 return err;
1806
1807 ctx->sched.priority = args->value;
1808 context_apply_all(ctx, __apply_priority, ctx);
1809
1810 return 0;
1811 }
1812
ctx_setparam(struct drm_i915_file_private * fpriv,struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)1813 static int ctx_setparam(struct drm_i915_file_private *fpriv,
1814 struct i915_gem_context *ctx,
1815 struct drm_i915_gem_context_param *args)
1816 {
1817 int ret = 0;
1818
1819 switch (args->param) {
1820 case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
1821 if (args->size)
1822 ret = -EINVAL;
1823 else if (args->value)
1824 i915_gem_context_set_no_error_capture(ctx);
1825 else
1826 i915_gem_context_clear_no_error_capture(ctx);
1827 break;
1828
1829 case I915_CONTEXT_PARAM_BANNABLE:
1830 if (args->size)
1831 ret = -EINVAL;
1832 else if (!capable(CAP_SYS_ADMIN) && !args->value)
1833 ret = -EPERM;
1834 else if (args->value)
1835 i915_gem_context_set_bannable(ctx);
1836 else
1837 i915_gem_context_clear_bannable(ctx);
1838 break;
1839
1840 case I915_CONTEXT_PARAM_RECOVERABLE:
1841 if (args->size)
1842 ret = -EINVAL;
1843 else if (args->value)
1844 i915_gem_context_set_recoverable(ctx);
1845 else
1846 i915_gem_context_clear_recoverable(ctx);
1847 break;
1848
1849 case I915_CONTEXT_PARAM_PRIORITY:
1850 ret = set_priority(ctx, args);
1851 break;
1852
1853 case I915_CONTEXT_PARAM_SSEU:
1854 ret = set_sseu(ctx, args);
1855 break;
1856
1857 case I915_CONTEXT_PARAM_PERSISTENCE:
1858 ret = set_persistence(ctx, args);
1859 break;
1860
1861 case I915_CONTEXT_PARAM_NO_ZEROMAP:
1862 case I915_CONTEXT_PARAM_BAN_PERIOD:
1863 case I915_CONTEXT_PARAM_RINGSIZE:
1864 case I915_CONTEXT_PARAM_VM:
1865 case I915_CONTEXT_PARAM_ENGINES:
1866 default:
1867 ret = -EINVAL;
1868 break;
1869 }
1870
1871 return ret;
1872 }
1873
1874 struct create_ext {
1875 struct i915_gem_proto_context *pc;
1876 struct drm_i915_file_private *fpriv;
1877 };
1878
create_setparam(struct i915_user_extension __user * ext,void * data)1879 static int create_setparam(struct i915_user_extension __user *ext, void *data)
1880 {
1881 struct drm_i915_gem_context_create_ext_setparam local;
1882 const struct create_ext *arg = data;
1883
1884 if (copy_from_user(&local, ext, sizeof(local)))
1885 return -EFAULT;
1886
1887 if (local.param.ctx_id)
1888 return -EINVAL;
1889
1890 return set_proto_ctx_param(arg->fpriv, arg->pc, &local.param);
1891 }
1892
invalid_ext(struct i915_user_extension __user * ext,void * data)1893 static int invalid_ext(struct i915_user_extension __user *ext, void *data)
1894 {
1895 return -EINVAL;
1896 }
1897
1898 static const i915_user_extension_fn create_extensions[] = {
1899 [I915_CONTEXT_CREATE_EXT_SETPARAM] = create_setparam,
1900 [I915_CONTEXT_CREATE_EXT_CLONE] = invalid_ext,
1901 };
1902
client_is_banned(struct drm_i915_file_private * file_priv)1903 static bool client_is_banned(struct drm_i915_file_private *file_priv)
1904 {
1905 return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
1906 }
1907
1908 static inline struct i915_gem_context *
__context_lookup(struct drm_i915_file_private * file_priv,u32 id)1909 __context_lookup(struct drm_i915_file_private *file_priv, u32 id)
1910 {
1911 struct i915_gem_context *ctx;
1912
1913 rcu_read_lock();
1914 ctx = xa_load(&file_priv->context_xa, id);
1915 if (ctx && !kref_get_unless_zero(&ctx->ref))
1916 ctx = NULL;
1917 rcu_read_unlock();
1918
1919 return ctx;
1920 }
1921
1922 static struct i915_gem_context *
finalize_create_context_locked(struct drm_i915_file_private * file_priv,struct i915_gem_proto_context * pc,u32 id)1923 finalize_create_context_locked(struct drm_i915_file_private *file_priv,
1924 struct i915_gem_proto_context *pc, u32 id)
1925 {
1926 struct i915_gem_context *ctx;
1927 void *old;
1928
1929 lockdep_assert_held(&file_priv->proto_context_lock);
1930
1931 ctx = i915_gem_create_context(file_priv->dev_priv, pc);
1932 if (IS_ERR(ctx))
1933 return ctx;
1934
1935 gem_context_register(ctx, file_priv, id);
1936
1937 old = xa_erase(&file_priv->proto_context_xa, id);
1938 GEM_BUG_ON(old != pc);
1939 proto_context_close(pc);
1940
1941 /* One for the xarray and one for the caller */
1942 return i915_gem_context_get(ctx);
1943 }
1944
1945 struct i915_gem_context *
i915_gem_context_lookup(struct drm_i915_file_private * file_priv,u32 id)1946 i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
1947 {
1948 struct i915_gem_proto_context *pc;
1949 struct i915_gem_context *ctx;
1950
1951 ctx = __context_lookup(file_priv, id);
1952 if (ctx)
1953 return ctx;
1954
1955 mutex_lock(&file_priv->proto_context_lock);
1956 /* Try one more time under the lock */
1957 ctx = __context_lookup(file_priv, id);
1958 if (!ctx) {
1959 pc = xa_load(&file_priv->proto_context_xa, id);
1960 if (!pc)
1961 ctx = ERR_PTR(-ENOENT);
1962 else
1963 ctx = finalize_create_context_locked(file_priv, pc, id);
1964 }
1965 mutex_unlock(&file_priv->proto_context_lock);
1966
1967 return ctx;
1968 }
1969
i915_gem_context_create_ioctl(struct drm_device * dev,void * data,struct drm_file * file)1970 int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
1971 struct drm_file *file)
1972 {
1973 struct drm_i915_private *i915 = to_i915(dev);
1974 struct drm_i915_gem_context_create_ext *args = data;
1975 struct create_ext ext_data;
1976 int ret;
1977 u32 id;
1978
1979 if (!DRIVER_CAPS(i915)->has_logical_contexts)
1980 return -ENODEV;
1981
1982 if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
1983 return -EINVAL;
1984
1985 ret = intel_gt_terminally_wedged(&i915->gt);
1986 if (ret)
1987 return ret;
1988
1989 ext_data.fpriv = file->driver_priv;
1990 if (client_is_banned(ext_data.fpriv)) {
1991 drm_dbg(&i915->drm,
1992 "client %s[%d] banned from creating ctx\n",
1993 current->comm, task_pid_nr(current));
1994 return -EIO;
1995 }
1996
1997 ext_data.pc = proto_context_create(i915, args->flags);
1998 if (IS_ERR(ext_data.pc))
1999 return PTR_ERR(ext_data.pc);
2000
2001 if (args->flags & I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS) {
2002 ret = i915_user_extensions(u64_to_user_ptr(args->extensions),
2003 create_extensions,
2004 ARRAY_SIZE(create_extensions),
2005 &ext_data);
2006 if (ret)
2007 goto err_pc;
2008 }
2009
2010 if (GRAPHICS_VER(i915) > 12) {
2011 struct i915_gem_context *ctx;
2012
2013 /* Get ourselves a context ID */
2014 ret = xa_alloc(&ext_data.fpriv->context_xa, &id, NULL,
2015 xa_limit_32b, GFP_KERNEL);
2016 if (ret)
2017 goto err_pc;
2018
2019 ctx = i915_gem_create_context(i915, ext_data.pc);
2020 if (IS_ERR(ctx)) {
2021 ret = PTR_ERR(ctx);
2022 goto err_pc;
2023 }
2024
2025 proto_context_close(ext_data.pc);
2026 gem_context_register(ctx, ext_data.fpriv, id);
2027 } else {
2028 ret = proto_context_register(ext_data.fpriv, ext_data.pc, &id);
2029 if (ret < 0)
2030 goto err_pc;
2031 }
2032
2033 args->ctx_id = id;
2034 drm_dbg(&i915->drm, "HW context %d created\n", args->ctx_id);
2035
2036 return 0;
2037
2038 err_pc:
2039 proto_context_close(ext_data.pc);
2040 return ret;
2041 }
2042
i915_gem_context_destroy_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2043 int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
2044 struct drm_file *file)
2045 {
2046 struct drm_i915_gem_context_destroy *args = data;
2047 struct drm_i915_file_private *file_priv = file->driver_priv;
2048 struct i915_gem_proto_context *pc;
2049 struct i915_gem_context *ctx;
2050
2051 if (args->pad != 0)
2052 return -EINVAL;
2053
2054 if (!args->ctx_id)
2055 return -ENOENT;
2056
2057 /* We need to hold the proto-context lock here to prevent races
2058 * with finalize_create_context_locked().
2059 */
2060 mutex_lock(&file_priv->proto_context_lock);
2061 ctx = xa_erase(&file_priv->context_xa, args->ctx_id);
2062 pc = xa_erase(&file_priv->proto_context_xa, args->ctx_id);
2063 mutex_unlock(&file_priv->proto_context_lock);
2064
2065 if (!ctx && !pc)
2066 return -ENOENT;
2067 GEM_WARN_ON(ctx && pc);
2068
2069 if (pc)
2070 proto_context_close(pc);
2071
2072 if (ctx)
2073 context_close(ctx);
2074
2075 return 0;
2076 }
2077
get_sseu(struct i915_gem_context * ctx,struct drm_i915_gem_context_param * args)2078 static int get_sseu(struct i915_gem_context *ctx,
2079 struct drm_i915_gem_context_param *args)
2080 {
2081 struct drm_i915_gem_context_param_sseu user_sseu;
2082 struct intel_context *ce;
2083 unsigned long lookup;
2084 int err;
2085
2086 if (args->size == 0)
2087 goto out;
2088 else if (args->size < sizeof(user_sseu))
2089 return -EINVAL;
2090
2091 if (copy_from_user(&user_sseu, u64_to_user_ptr(args->value),
2092 sizeof(user_sseu)))
2093 return -EFAULT;
2094
2095 if (user_sseu.rsvd)
2096 return -EINVAL;
2097
2098 if (user_sseu.flags & ~(I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX))
2099 return -EINVAL;
2100
2101 lookup = 0;
2102 if (user_sseu.flags & I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX)
2103 lookup |= LOOKUP_USER_INDEX;
2104
2105 ce = lookup_user_engine(ctx, lookup, &user_sseu.engine);
2106 if (IS_ERR(ce))
2107 return PTR_ERR(ce);
2108
2109 err = intel_context_lock_pinned(ce); /* serialises with set_sseu */
2110 if (err) {
2111 intel_context_put(ce);
2112 return err;
2113 }
2114
2115 user_sseu.slice_mask = ce->sseu.slice_mask;
2116 user_sseu.subslice_mask = ce->sseu.subslice_mask;
2117 user_sseu.min_eus_per_subslice = ce->sseu.min_eus_per_subslice;
2118 user_sseu.max_eus_per_subslice = ce->sseu.max_eus_per_subslice;
2119
2120 intel_context_unlock_pinned(ce);
2121 intel_context_put(ce);
2122
2123 if (copy_to_user(u64_to_user_ptr(args->value), &user_sseu,
2124 sizeof(user_sseu)))
2125 return -EFAULT;
2126
2127 out:
2128 args->size = sizeof(user_sseu);
2129
2130 return 0;
2131 }
2132
i915_gem_context_getparam_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2133 int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
2134 struct drm_file *file)
2135 {
2136 struct drm_i915_file_private *file_priv = file->driver_priv;
2137 struct drm_i915_gem_context_param *args = data;
2138 struct i915_gem_context *ctx;
2139 int ret = 0;
2140
2141 ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
2142 if (IS_ERR(ctx))
2143 return PTR_ERR(ctx);
2144
2145 switch (args->param) {
2146 case I915_CONTEXT_PARAM_GTT_SIZE:
2147 args->size = 0;
2148 rcu_read_lock();
2149 if (rcu_access_pointer(ctx->vm))
2150 args->value = rcu_dereference(ctx->vm)->total;
2151 else
2152 args->value = to_i915(dev)->ggtt.vm.total;
2153 rcu_read_unlock();
2154 break;
2155
2156 case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
2157 args->size = 0;
2158 args->value = i915_gem_context_no_error_capture(ctx);
2159 break;
2160
2161 case I915_CONTEXT_PARAM_BANNABLE:
2162 args->size = 0;
2163 args->value = i915_gem_context_is_bannable(ctx);
2164 break;
2165
2166 case I915_CONTEXT_PARAM_RECOVERABLE:
2167 args->size = 0;
2168 args->value = i915_gem_context_is_recoverable(ctx);
2169 break;
2170
2171 case I915_CONTEXT_PARAM_PRIORITY:
2172 args->size = 0;
2173 args->value = ctx->sched.priority;
2174 break;
2175
2176 case I915_CONTEXT_PARAM_SSEU:
2177 ret = get_sseu(ctx, args);
2178 break;
2179
2180 case I915_CONTEXT_PARAM_VM:
2181 ret = get_ppgtt(file_priv, ctx, args);
2182 break;
2183
2184 case I915_CONTEXT_PARAM_PERSISTENCE:
2185 args->size = 0;
2186 args->value = i915_gem_context_is_persistent(ctx);
2187 break;
2188
2189 case I915_CONTEXT_PARAM_NO_ZEROMAP:
2190 case I915_CONTEXT_PARAM_BAN_PERIOD:
2191 case I915_CONTEXT_PARAM_ENGINES:
2192 case I915_CONTEXT_PARAM_RINGSIZE:
2193 default:
2194 ret = -EINVAL;
2195 break;
2196 }
2197
2198 i915_gem_context_put(ctx);
2199 return ret;
2200 }
2201
i915_gem_context_setparam_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2202 int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
2203 struct drm_file *file)
2204 {
2205 struct drm_i915_file_private *file_priv = file->driver_priv;
2206 struct drm_i915_gem_context_param *args = data;
2207 struct i915_gem_proto_context *pc;
2208 struct i915_gem_context *ctx;
2209 int ret = 0;
2210
2211 mutex_lock(&file_priv->proto_context_lock);
2212 ctx = __context_lookup(file_priv, args->ctx_id);
2213 if (!ctx) {
2214 pc = xa_load(&file_priv->proto_context_xa, args->ctx_id);
2215 if (pc) {
2216 /* Contexts should be finalized inside
2217 * GEM_CONTEXT_CREATE starting with graphics
2218 * version 13.
2219 */
2220 WARN_ON(GRAPHICS_VER(file_priv->dev_priv) > 12);
2221 ret = set_proto_ctx_param(file_priv, pc, args);
2222 } else {
2223 ret = -ENOENT;
2224 }
2225 }
2226 mutex_unlock(&file_priv->proto_context_lock);
2227
2228 if (ctx) {
2229 ret = ctx_setparam(file_priv, ctx, args);
2230 i915_gem_context_put(ctx);
2231 }
2232
2233 return ret;
2234 }
2235
i915_gem_context_reset_stats_ioctl(struct drm_device * dev,void * data,struct drm_file * file)2236 int i915_gem_context_reset_stats_ioctl(struct drm_device *dev,
2237 void *data, struct drm_file *file)
2238 {
2239 struct drm_i915_private *i915 = to_i915(dev);
2240 struct drm_i915_reset_stats *args = data;
2241 struct i915_gem_context *ctx;
2242
2243 if (args->flags || args->pad)
2244 return -EINVAL;
2245
2246 ctx = i915_gem_context_lookup(file->driver_priv, args->ctx_id);
2247 if (IS_ERR(ctx))
2248 return PTR_ERR(ctx);
2249
2250 /*
2251 * We opt for unserialised reads here. This may result in tearing
2252 * in the extremely unlikely event of a GPU hang on this context
2253 * as we are querying them. If we need that extra layer of protection,
2254 * we should wrap the hangstats with a seqlock.
2255 */
2256
2257 if (capable(CAP_SYS_ADMIN))
2258 args->reset_count = i915_reset_count(&i915->gpu_error);
2259 else
2260 args->reset_count = 0;
2261
2262 args->batch_active = atomic_read(&ctx->guilty_count);
2263 args->batch_pending = atomic_read(&ctx->active_count);
2264
2265 i915_gem_context_put(ctx);
2266 return 0;
2267 }
2268
2269 /* GEM context-engines iterator: for_each_gem_engine() */
2270 struct intel_context *
i915_gem_engines_iter_next(struct i915_gem_engines_iter * it)2271 i915_gem_engines_iter_next(struct i915_gem_engines_iter *it)
2272 {
2273 const struct i915_gem_engines *e = it->engines;
2274 struct intel_context *ctx;
2275
2276 if (unlikely(!e))
2277 return NULL;
2278
2279 do {
2280 if (it->idx >= e->num_engines)
2281 return NULL;
2282
2283 ctx = e->engines[it->idx++];
2284 } while (!ctx);
2285
2286 return ctx;
2287 }
2288
2289 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
2290 #include "selftests/mock_context.c"
2291 #include "selftests/i915_gem_context.c"
2292 #endif
2293
i915_gem_context_module_exit(void)2294 void i915_gem_context_module_exit(void)
2295 {
2296 kmem_cache_destroy(slab_luts);
2297 }
2298
i915_gem_context_module_init(void)2299 int __init i915_gem_context_module_init(void)
2300 {
2301 slab_luts = KMEM_CACHE(i915_lut_handle, 0);
2302 if (!slab_luts)
2303 return -ENOMEM;
2304
2305 return 0;
2306 }
2307