1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * AMD MP2 PCIe communication driver 4 * Copyright 2020 Advanced Micro Devices, Inc. 5 * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> 6 * Sandeep Singh <Sandeep.singh@amd.com> 7 */ 8 9 #ifndef PCIE_MP2_AMD_H 10 #define PCIE_MP2_AMD_H 11 12 #include <linux/pci.h> 13 #include "amd_sfh_hid.h" 14 15 #define PCI_DEVICE_ID_AMD_MP2 0x15E4 16 17 #define ENABLE_SENSOR 1 18 #define DISABLE_SENSOR 2 19 #define STOP_ALL_SENSORS 8 20 21 /* MP2 C2P Message Registers */ 22 #define AMD_C2P_MSG0 0x10500 23 #define AMD_C2P_MSG1 0x10504 24 #define AMD_C2P_MSG2 0x10508 25 26 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) 27 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4)) 28 29 /* MP2 P2C Message Registers */ 30 #define AMD_P2C_MSG3 0x1068C /* Supported Sensors info */ 31 32 #define V2_STATUS 0x2 33 34 #define SENSOR_ENABLED 4 35 #define SENSOR_DISABLED 5 36 37 #define HPD_IDX 16 38 39 #define AMD_SFH_IDLE_LOOP 200 40 41 #define SENSOR_DISCOVERY_STATUS_MASK GENMASK(5, 3) 42 #define SENSOR_DISCOVERY_STATUS_SHIFT 3 43 44 /* SFH Command register */ 45 union sfh_cmd_base { 46 u32 ul; 47 struct { 48 u32 cmd_id : 8; 49 u32 sensor_id : 8; 50 u32 period : 16; 51 } s; 52 struct { 53 u32 cmd_id : 4; 54 u32 intr_disable : 1; 55 u32 rsvd1 : 3; 56 u32 length : 7; 57 u32 mem_type : 1; 58 u32 sensor_id : 8; 59 u32 period : 8; 60 } cmd_v2; 61 }; 62 63 union cmd_response { 64 u32 resp; 65 struct { 66 u32 status : 2; 67 u32 out_in_c2p : 1; 68 u32 rsvd1 : 1; 69 u32 response : 4; 70 u32 sub_cmd : 8; 71 u32 sensor_id : 6; 72 u32 rsvd2 : 10; 73 } response_v2; 74 }; 75 76 union sfh_cmd_param { 77 u32 ul; 78 struct { 79 u32 buf_layout : 2; 80 u32 buf_length : 6; 81 u32 rsvd : 24; 82 } s; 83 }; 84 85 struct sfh_cmd_reg { 86 union sfh_cmd_base cmd_base; 87 union sfh_cmd_param cmd_param; 88 phys_addr_t phys_addr; 89 }; 90 91 enum sensor_idx { 92 accel_idx = 0, 93 gyro_idx = 1, 94 mag_idx = 2, 95 als_idx = 19 96 }; 97 98 struct amd_mp2_dev { 99 struct pci_dev *pdev; 100 struct amdtp_cl_data *cl_data; 101 void __iomem *mmio; 102 const struct amd_mp2_ops *mp2_ops; 103 struct amd_input_data in_data; 104 /* mp2 active control status */ 105 u32 mp2_acs; 106 }; 107 108 struct amd_mp2_sensor_info { 109 u8 sensor_idx; 110 u32 period; 111 dma_addr_t dma_address; 112 }; 113 114 enum mem_use_type { 115 USE_DRAM, 116 USE_C2P_REG, 117 }; 118 119 struct hpd_status { 120 union { 121 struct { 122 u32 human_presence_report : 4; 123 u32 human_presence_actual : 4; 124 u32 probablity : 8; 125 u32 object_distance : 16; 126 } shpd; 127 u32 val; 128 }; 129 }; 130 131 void amd_start_sensor(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); 132 void amd_stop_sensor(struct amd_mp2_dev *privdata, u16 sensor_idx); 133 void amd_stop_all_sensors(struct amd_mp2_dev *privdata); 134 int amd_mp2_get_sensor_num(struct amd_mp2_dev *privdata, u8 *sensor_id); 135 int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata); 136 int amd_sfh_hid_client_deinit(struct amd_mp2_dev *privdata); 137 u32 amd_sfh_wait_for_response(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts); 138 void amd_mp2_suspend(struct amd_mp2_dev *mp2); 139 void amd_mp2_resume(struct amd_mp2_dev *mp2); 140 141 struct amd_mp2_ops { 142 void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); 143 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx); 144 void (*stop_all)(struct amd_mp2_dev *privdata); 145 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts); 146 void (*clear_intr)(struct amd_mp2_dev *privdata); 147 int (*init_intr)(struct amd_mp2_dev *privdata); 148 int (*discovery_status)(struct amd_mp2_dev *privdata); 149 }; 150 #endif 151