1 // SPDX-License-Identifier: GPL-2.0 or Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4
5 /**
6 * irdma_query_device - get device attributes
7 * @ibdev: device pointer from stack
8 * @props: returning device attributes
9 * @udata: user data
10 */
irdma_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * udata)11 static int irdma_query_device(struct ib_device *ibdev,
12 struct ib_device_attr *props,
13 struct ib_udata *udata)
14 {
15 struct irdma_device *iwdev = to_iwdev(ibdev);
16 struct irdma_pci_f *rf = iwdev->rf;
17 struct pci_dev *pcidev = iwdev->rf->pcidev;
18 struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19
20 if (udata->inlen || udata->outlen)
21 return -EINVAL;
22
23 memset(props, 0, sizeof(*props));
24 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
25 props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
26 irdma_fw_minor_ver(&rf->sc_dev);
27 props->device_cap_flags = iwdev->device_cap_flags;
28 props->vendor_id = pcidev->vendor;
29 props->vendor_part_id = pcidev->device;
30
31 props->hw_ver = rf->pcidev->revision;
32 props->page_size_cap = hw_attrs->page_size_cap;
33 props->max_mr_size = hw_attrs->max_mr_size;
34 props->max_qp = rf->max_qp - rf->used_qps;
35 props->max_qp_wr = hw_attrs->max_qp_wr;
36 props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
37 props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
38 props->max_cq = rf->max_cq - rf->used_cqs;
39 props->max_cqe = rf->max_cqe - 1;
40 props->max_mr = rf->max_mr - rf->used_mrs;
41 props->max_mw = props->max_mr;
42 props->max_pd = rf->max_pd - rf->used_pds;
43 props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
44 props->max_qp_rd_atom = hw_attrs->max_hw_ird;
45 props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
46 if (rdma_protocol_roce(ibdev, 1)) {
47 props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN;
48 props->max_pkeys = IRDMA_PKEY_TBL_SZ;
49 }
50
51 props->max_ah = rf->max_ah;
52 props->max_mcast_grp = rf->max_mcg;
53 props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
54 props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
55 props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
56 #define HCA_CLOCK_TIMESTAMP_MASK 0x1ffff
57 if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_2)
58 props->timestamp_mask = HCA_CLOCK_TIMESTAMP_MASK;
59
60 return 0;
61 }
62
63 /**
64 * irdma_query_port - get port attributes
65 * @ibdev: device pointer from stack
66 * @port: port number for query
67 * @props: returning device attributes
68 */
irdma_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props)69 static int irdma_query_port(struct ib_device *ibdev, u32 port,
70 struct ib_port_attr *props)
71 {
72 struct irdma_device *iwdev = to_iwdev(ibdev);
73 struct net_device *netdev = iwdev->netdev;
74
75 /* no need to zero out pros here. done by caller */
76
77 props->max_mtu = IB_MTU_4096;
78 props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
79 props->lid = 1;
80 props->lmc = 0;
81 props->sm_lid = 0;
82 props->sm_sl = 0;
83 if (netif_carrier_ok(netdev) && netif_running(netdev)) {
84 props->state = IB_PORT_ACTIVE;
85 props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
86 } else {
87 props->state = IB_PORT_DOWN;
88 props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
89 }
90
91 ib_get_eth_speed(ibdev, port, &props->active_speed,
92 &props->active_width);
93
94 if (rdma_protocol_roce(ibdev, 1)) {
95 props->gid_tbl_len = 32;
96 props->ip_gids = true;
97 props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
98 } else {
99 props->gid_tbl_len = 1;
100 }
101 props->qkey_viol_cntr = 0;
102 props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
103 props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
104
105 return 0;
106 }
107
108 /**
109 * irdma_disassociate_ucontext - Disassociate user context
110 * @context: ib user context
111 */
irdma_disassociate_ucontext(struct ib_ucontext * context)112 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
113 {
114 }
115
irdma_mmap_legacy(struct irdma_ucontext * ucontext,struct vm_area_struct * vma)116 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
117 struct vm_area_struct *vma)
118 {
119 u64 pfn;
120
121 if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
122 return -EINVAL;
123
124 vma->vm_private_data = ucontext;
125 pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
126 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
127
128 return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
129 pgprot_noncached(vma->vm_page_prot), NULL);
130 }
131
irdma_mmap_free(struct rdma_user_mmap_entry * rdma_entry)132 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
133 {
134 struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
135
136 kfree(entry);
137 }
138
139 static struct rdma_user_mmap_entry*
irdma_user_mmap_entry_insert(struct irdma_ucontext * ucontext,u64 bar_offset,enum irdma_mmap_flag mmap_flag,u64 * mmap_offset)140 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
141 enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
142 {
143 struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
144 int ret;
145
146 if (!entry)
147 return NULL;
148
149 entry->bar_offset = bar_offset;
150 entry->mmap_flag = mmap_flag;
151
152 ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
153 &entry->rdma_entry, PAGE_SIZE);
154 if (ret) {
155 kfree(entry);
156 return NULL;
157 }
158 *mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
159
160 return &entry->rdma_entry;
161 }
162
163 /**
164 * irdma_mmap - user memory map
165 * @context: context created during alloc
166 * @vma: kernel info for user memory map
167 */
irdma_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)168 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
169 {
170 struct rdma_user_mmap_entry *rdma_entry;
171 struct irdma_user_mmap_entry *entry;
172 struct irdma_ucontext *ucontext;
173 u64 pfn;
174 int ret;
175
176 ucontext = to_ucontext(context);
177
178 /* Legacy support for libi40iw with hard-coded mmap key */
179 if (ucontext->legacy_mode)
180 return irdma_mmap_legacy(ucontext, vma);
181
182 rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
183 if (!rdma_entry) {
184 ibdev_dbg(&ucontext->iwdev->ibdev,
185 "VERBS: pgoff[0x%lx] does not have valid entry\n",
186 vma->vm_pgoff);
187 return -EINVAL;
188 }
189
190 entry = to_irdma_mmap_entry(rdma_entry);
191 ibdev_dbg(&ucontext->iwdev->ibdev,
192 "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
193 entry->bar_offset, entry->mmap_flag);
194
195 pfn = (entry->bar_offset +
196 pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
197
198 switch (entry->mmap_flag) {
199 case IRDMA_MMAP_IO_NC:
200 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
201 pgprot_noncached(vma->vm_page_prot),
202 rdma_entry);
203 break;
204 case IRDMA_MMAP_IO_WC:
205 ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
206 pgprot_writecombine(vma->vm_page_prot),
207 rdma_entry);
208 break;
209 default:
210 ret = -EINVAL;
211 }
212
213 if (ret)
214 ibdev_dbg(&ucontext->iwdev->ibdev,
215 "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
216 entry->bar_offset, entry->mmap_flag, ret);
217 rdma_user_mmap_entry_put(rdma_entry);
218
219 return ret;
220 }
221
222 /**
223 * irdma_alloc_push_page - allocate a push page for qp
224 * @iwqp: qp pointer
225 */
irdma_alloc_push_page(struct irdma_qp * iwqp)226 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
227 {
228 struct irdma_cqp_request *cqp_request;
229 struct cqp_cmds_info *cqp_info;
230 struct irdma_device *iwdev = iwqp->iwdev;
231 struct irdma_sc_qp *qp = &iwqp->sc_qp;
232 enum irdma_status_code status;
233
234 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
235 if (!cqp_request)
236 return;
237
238 cqp_info = &cqp_request->info;
239 cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
240 cqp_info->post_sq = 1;
241 cqp_info->in.u.manage_push_page.info.push_idx = 0;
242 cqp_info->in.u.manage_push_page.info.qs_handle =
243 qp->vsi->qos[qp->user_pri].qs_handle;
244 cqp_info->in.u.manage_push_page.info.free_page = 0;
245 cqp_info->in.u.manage_push_page.info.push_page_type = 0;
246 cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
247 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
248
249 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
250 if (!status && cqp_request->compl_info.op_ret_val <
251 iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
252 qp->push_idx = cqp_request->compl_info.op_ret_val;
253 qp->push_offset = 0;
254 }
255
256 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
257 }
258
259 /**
260 * irdma_alloc_ucontext - Allocate the user context data structure
261 * @uctx: uverbs context pointer
262 * @udata: user data
263 *
264 * This keeps track of all objects associated with a particular
265 * user-mode client.
266 */
irdma_alloc_ucontext(struct ib_ucontext * uctx,struct ib_udata * udata)267 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
268 struct ib_udata *udata)
269 {
270 struct ib_device *ibdev = uctx->device;
271 struct irdma_device *iwdev = to_iwdev(ibdev);
272 struct irdma_alloc_ucontext_req req;
273 struct irdma_alloc_ucontext_resp uresp = {};
274 struct irdma_ucontext *ucontext = to_ucontext(uctx);
275 struct irdma_uk_attrs *uk_attrs;
276
277 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
278 return -EINVAL;
279
280 if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
281 goto ver_error;
282
283 ucontext->iwdev = iwdev;
284 ucontext->abi_ver = req.userspace_ver;
285
286 uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
287 /* GEN_1 legacy support with libi40iw */
288 if (udata->outlen < sizeof(uresp)) {
289 if (uk_attrs->hw_rev != IRDMA_GEN_1)
290 return -EOPNOTSUPP;
291
292 ucontext->legacy_mode = true;
293 uresp.max_qps = iwdev->rf->max_qp;
294 uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
295 uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
296 uresp.kernel_ver = req.userspace_ver;
297 if (ib_copy_to_udata(udata, &uresp,
298 min(sizeof(uresp), udata->outlen)))
299 return -EFAULT;
300 } else {
301 u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
302
303 ucontext->db_mmap_entry =
304 irdma_user_mmap_entry_insert(ucontext, bar_off,
305 IRDMA_MMAP_IO_NC,
306 &uresp.db_mmap_key);
307 if (!ucontext->db_mmap_entry)
308 return -ENOMEM;
309
310 uresp.kernel_ver = IRDMA_ABI_VER;
311 uresp.feature_flags = uk_attrs->feature_flags;
312 uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
313 uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
314 uresp.max_hw_inline = uk_attrs->max_hw_inline;
315 uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
316 uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
317 uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
318 uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
319 uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
320 uresp.hw_rev = uk_attrs->hw_rev;
321 if (ib_copy_to_udata(udata, &uresp,
322 min(sizeof(uresp), udata->outlen))) {
323 rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
324 return -EFAULT;
325 }
326 }
327
328 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
329 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
330 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
331 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
332
333 return 0;
334
335 ver_error:
336 ibdev_err(&iwdev->ibdev,
337 "Invalid userspace driver version detected. Detected version %d, should be %d\n",
338 req.userspace_ver, IRDMA_ABI_VER);
339 return -EINVAL;
340 }
341
342 /**
343 * irdma_dealloc_ucontext - deallocate the user context data structure
344 * @context: user context created during alloc
345 */
irdma_dealloc_ucontext(struct ib_ucontext * context)346 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
347 {
348 struct irdma_ucontext *ucontext = to_ucontext(context);
349
350 rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
351 }
352
353 /**
354 * irdma_alloc_pd - allocate protection domain
355 * @pd: PD pointer
356 * @udata: user data
357 */
irdma_alloc_pd(struct ib_pd * pd,struct ib_udata * udata)358 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
359 {
360 struct irdma_pd *iwpd = to_iwpd(pd);
361 struct irdma_device *iwdev = to_iwdev(pd->device);
362 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
363 struct irdma_pci_f *rf = iwdev->rf;
364 struct irdma_alloc_pd_resp uresp = {};
365 struct irdma_sc_pd *sc_pd;
366 u32 pd_id = 0;
367 int err;
368
369 err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
370 &rf->next_pd);
371 if (err)
372 return err;
373
374 sc_pd = &iwpd->sc_pd;
375 if (udata) {
376 struct irdma_ucontext *ucontext =
377 rdma_udata_to_drv_context(udata, struct irdma_ucontext,
378 ibucontext);
379 irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
380 uresp.pd_id = pd_id;
381 if (ib_copy_to_udata(udata, &uresp,
382 min(sizeof(uresp), udata->outlen))) {
383 err = -EFAULT;
384 goto error;
385 }
386 } else {
387 irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
388 }
389
390 return 0;
391 error:
392 irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
393
394 return err;
395 }
396
397 /**
398 * irdma_dealloc_pd - deallocate pd
399 * @ibpd: ptr of pd to be deallocated
400 * @udata: user data
401 */
irdma_dealloc_pd(struct ib_pd * ibpd,struct ib_udata * udata)402 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
403 {
404 struct irdma_pd *iwpd = to_iwpd(ibpd);
405 struct irdma_device *iwdev = to_iwdev(ibpd->device);
406
407 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
408
409 return 0;
410 }
411
412 /**
413 * irdma_get_pbl - Retrieve pbl from a list given a virtual
414 * address
415 * @va: user virtual address
416 * @pbl_list: pbl list to search in (QP's or CQ's)
417 */
irdma_get_pbl(unsigned long va,struct list_head * pbl_list)418 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
419 struct list_head *pbl_list)
420 {
421 struct irdma_pbl *iwpbl;
422
423 list_for_each_entry (iwpbl, pbl_list, list) {
424 if (iwpbl->user_base == va) {
425 list_del(&iwpbl->list);
426 iwpbl->on_list = false;
427 return iwpbl;
428 }
429 }
430
431 return NULL;
432 }
433
434 /**
435 * irdma_clean_cqes - clean cq entries for qp
436 * @iwqp: qp ptr (user or kernel)
437 * @iwcq: cq ptr
438 */
irdma_clean_cqes(struct irdma_qp * iwqp,struct irdma_cq * iwcq)439 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
440 {
441 struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
442 unsigned long flags;
443
444 spin_lock_irqsave(&iwcq->lock, flags);
445 irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
446 spin_unlock_irqrestore(&iwcq->lock, flags);
447 }
448
irdma_remove_push_mmap_entries(struct irdma_qp * iwqp)449 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
450 {
451 if (iwqp->push_db_mmap_entry) {
452 rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
453 iwqp->push_db_mmap_entry = NULL;
454 }
455 if (iwqp->push_wqe_mmap_entry) {
456 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
457 iwqp->push_wqe_mmap_entry = NULL;
458 }
459 }
460
irdma_setup_push_mmap_entries(struct irdma_ucontext * ucontext,struct irdma_qp * iwqp,u64 * push_wqe_mmap_key,u64 * push_db_mmap_key)461 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
462 struct irdma_qp *iwqp,
463 u64 *push_wqe_mmap_key,
464 u64 *push_db_mmap_key)
465 {
466 struct irdma_device *iwdev = ucontext->iwdev;
467 u64 rsvd, bar_off;
468
469 rsvd = IRDMA_PF_BAR_RSVD;
470 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
471 /* skip over db page */
472 bar_off += IRDMA_HW_PAGE_SIZE;
473 /* push wqe page */
474 bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
475 iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
476 bar_off, IRDMA_MMAP_IO_WC,
477 push_wqe_mmap_key);
478 if (!iwqp->push_wqe_mmap_entry)
479 return -ENOMEM;
480
481 /* push doorbell page */
482 bar_off += IRDMA_HW_PAGE_SIZE;
483 iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
484 bar_off, IRDMA_MMAP_IO_NC,
485 push_db_mmap_key);
486 if (!iwqp->push_db_mmap_entry) {
487 rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
488 return -ENOMEM;
489 }
490
491 return 0;
492 }
493
494 /**
495 * irdma_destroy_qp - destroy qp
496 * @ibqp: qp's ib pointer also to get to device's qp address
497 * @udata: user data
498 */
irdma_destroy_qp(struct ib_qp * ibqp,struct ib_udata * udata)499 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
500 {
501 struct irdma_qp *iwqp = to_iwqp(ibqp);
502 struct irdma_device *iwdev = iwqp->iwdev;
503
504 iwqp->sc_qp.qp_uk.destroy_pending = true;
505
506 if (iwqp->iwarp_state == IRDMA_QP_STATE_RTS)
507 irdma_modify_qp_to_err(&iwqp->sc_qp);
508
509 if (!iwqp->user_mode)
510 cancel_delayed_work_sync(&iwqp->dwork_flush);
511
512 if (!iwqp->user_mode) {
513 if (iwqp->iwscq) {
514 irdma_clean_cqes(iwqp, iwqp->iwscq);
515 if (iwqp->iwrcq != iwqp->iwscq)
516 irdma_clean_cqes(iwqp, iwqp->iwrcq);
517 }
518 }
519
520 irdma_qp_rem_ref(&iwqp->ibqp);
521 wait_for_completion(&iwqp->free_qp);
522 irdma_free_lsmm_rsrc(iwqp);
523 irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
524
525 irdma_remove_push_mmap_entries(iwqp);
526 irdma_free_qp_rsrc(iwqp);
527
528 return 0;
529 }
530
531 /**
532 * irdma_setup_virt_qp - setup for allocation of virtual qp
533 * @iwdev: irdma device
534 * @iwqp: qp ptr
535 * @init_info: initialize info to return
536 */
irdma_setup_virt_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * init_info)537 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
538 struct irdma_qp *iwqp,
539 struct irdma_qp_init_info *init_info)
540 {
541 struct irdma_pbl *iwpbl = iwqp->iwpbl;
542 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
543
544 iwqp->page = qpmr->sq_page;
545 init_info->shadow_area_pa = qpmr->shadow;
546 if (iwpbl->pbl_allocated) {
547 init_info->virtual_map = true;
548 init_info->sq_pa = qpmr->sq_pbl.idx;
549 init_info->rq_pa = qpmr->rq_pbl.idx;
550 } else {
551 init_info->sq_pa = qpmr->sq_pbl.addr;
552 init_info->rq_pa = qpmr->rq_pbl.addr;
553 }
554 }
555
556 /**
557 * irdma_setup_kmode_qp - setup initialization for kernel mode qp
558 * @iwdev: iwarp device
559 * @iwqp: qp ptr (user or kernel)
560 * @info: initialize info to return
561 * @init_attr: Initial QP create attributes
562 */
irdma_setup_kmode_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * info,struct ib_qp_init_attr * init_attr)563 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
564 struct irdma_qp *iwqp,
565 struct irdma_qp_init_info *info,
566 struct ib_qp_init_attr *init_attr)
567 {
568 struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
569 u32 sqdepth, rqdepth;
570 u8 sqshift, rqshift;
571 u32 size;
572 enum irdma_status_code status;
573 struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
574 struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
575
576 irdma_get_wqe_shift(uk_attrs,
577 uk_attrs->hw_rev >= IRDMA_GEN_2 ? ukinfo->max_sq_frag_cnt + 1 :
578 ukinfo->max_sq_frag_cnt,
579 ukinfo->max_inline_data, &sqshift);
580 status = irdma_get_sqdepth(uk_attrs, ukinfo->sq_size, sqshift,
581 &sqdepth);
582 if (status)
583 return -ENOMEM;
584
585 if (uk_attrs->hw_rev == IRDMA_GEN_1)
586 rqshift = IRDMA_MAX_RQ_WQE_SHIFT_GEN1;
587 else
588 irdma_get_wqe_shift(uk_attrs, ukinfo->max_rq_frag_cnt, 0,
589 &rqshift);
590
591 status = irdma_get_rqdepth(uk_attrs, ukinfo->rq_size, rqshift,
592 &rqdepth);
593 if (status)
594 return -ENOMEM;
595
596 iwqp->kqp.sq_wrid_mem =
597 kcalloc(sqdepth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
598 if (!iwqp->kqp.sq_wrid_mem)
599 return -ENOMEM;
600
601 iwqp->kqp.rq_wrid_mem =
602 kcalloc(rqdepth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
603 if (!iwqp->kqp.rq_wrid_mem) {
604 kfree(iwqp->kqp.sq_wrid_mem);
605 iwqp->kqp.sq_wrid_mem = NULL;
606 return -ENOMEM;
607 }
608
609 ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
610 ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
611
612 size = (sqdepth + rqdepth) * IRDMA_QP_WQE_MIN_SIZE;
613 size += (IRDMA_SHADOW_AREA_SIZE << 3);
614
615 mem->size = ALIGN(size, 256);
616 mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
617 &mem->pa, GFP_KERNEL);
618 if (!mem->va) {
619 kfree(iwqp->kqp.sq_wrid_mem);
620 iwqp->kqp.sq_wrid_mem = NULL;
621 kfree(iwqp->kqp.rq_wrid_mem);
622 iwqp->kqp.rq_wrid_mem = NULL;
623 return -ENOMEM;
624 }
625
626 ukinfo->sq = mem->va;
627 info->sq_pa = mem->pa;
628 ukinfo->rq = &ukinfo->sq[sqdepth];
629 info->rq_pa = info->sq_pa + (sqdepth * IRDMA_QP_WQE_MIN_SIZE);
630 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
631 info->shadow_area_pa = info->rq_pa + (rqdepth * IRDMA_QP_WQE_MIN_SIZE);
632 ukinfo->sq_size = sqdepth >> sqshift;
633 ukinfo->rq_size = rqdepth >> rqshift;
634 ukinfo->qp_id = iwqp->ibqp.qp_num;
635
636 init_attr->cap.max_send_wr = (sqdepth - IRDMA_SQ_RSVD) >> sqshift;
637 init_attr->cap.max_recv_wr = (rqdepth - IRDMA_RQ_RSVD) >> rqshift;
638
639 return 0;
640 }
641
irdma_cqp_create_qp_cmd(struct irdma_qp * iwqp)642 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
643 {
644 struct irdma_pci_f *rf = iwqp->iwdev->rf;
645 struct irdma_cqp_request *cqp_request;
646 struct cqp_cmds_info *cqp_info;
647 struct irdma_create_qp_info *qp_info;
648 enum irdma_status_code status;
649
650 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
651 if (!cqp_request)
652 return -ENOMEM;
653
654 cqp_info = &cqp_request->info;
655 qp_info = &cqp_request->info.in.u.qp_create.info;
656 memset(qp_info, 0, sizeof(*qp_info));
657 qp_info->mac_valid = true;
658 qp_info->cq_num_valid = true;
659 qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
660
661 cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
662 cqp_info->post_sq = 1;
663 cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
664 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
665 status = irdma_handle_cqp_op(rf, cqp_request);
666 irdma_put_cqp_request(&rf->cqp, cqp_request);
667
668 return status ? -ENOMEM : 0;
669 }
670
irdma_roce_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)671 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
672 struct irdma_qp_host_ctx_info *ctx_info)
673 {
674 struct irdma_device *iwdev = iwqp->iwdev;
675 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
676 struct irdma_roce_offload_info *roce_info;
677 struct irdma_udp_offload_info *udp_info;
678
679 udp_info = &iwqp->udp_info;
680 udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
681 udp_info->cwnd = iwdev->roce_cwnd;
682 udp_info->rexmit_thresh = 2;
683 udp_info->rnr_nak_thresh = 2;
684 udp_info->src_port = 0xc000;
685 udp_info->dst_port = ROCE_V2_UDP_DPORT;
686 roce_info = &iwqp->roce_info;
687 ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
688
689 roce_info->rd_en = true;
690 roce_info->wr_rdresp_en = true;
691 roce_info->bind_en = true;
692 roce_info->dcqcn_en = false;
693 roce_info->rtomin = 5;
694
695 roce_info->ack_credits = iwdev->roce_ackcreds;
696 roce_info->ird_size = dev->hw_attrs.max_hw_ird;
697 roce_info->ord_size = dev->hw_attrs.max_hw_ord;
698
699 if (!iwqp->user_mode) {
700 roce_info->priv_mode_en = true;
701 roce_info->fast_reg_en = true;
702 roce_info->udprivcq_en = true;
703 }
704 roce_info->roce_tver = 0;
705
706 ctx_info->roce_info = &iwqp->roce_info;
707 ctx_info->udp_info = &iwqp->udp_info;
708 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
709 }
710
irdma_iw_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)711 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
712 struct irdma_qp_host_ctx_info *ctx_info)
713 {
714 struct irdma_device *iwdev = iwqp->iwdev;
715 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
716 struct irdma_iwarp_offload_info *iwarp_info;
717
718 iwarp_info = &iwqp->iwarp_info;
719 ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
720 iwarp_info->rd_en = true;
721 iwarp_info->wr_rdresp_en = true;
722 iwarp_info->bind_en = true;
723 iwarp_info->ecn_en = true;
724 iwarp_info->rtomin = 5;
725
726 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
727 iwarp_info->ib_rd_en = true;
728 if (!iwqp->user_mode) {
729 iwarp_info->priv_mode_en = true;
730 iwarp_info->fast_reg_en = true;
731 }
732 iwarp_info->ddp_ver = 1;
733 iwarp_info->rdmap_ver = 1;
734
735 ctx_info->iwarp_info = &iwqp->iwarp_info;
736 ctx_info->iwarp_info_valid = true;
737 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
738 ctx_info->iwarp_info_valid = false;
739 }
740
irdma_validate_qp_attrs(struct ib_qp_init_attr * init_attr,struct irdma_device * iwdev)741 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
742 struct irdma_device *iwdev)
743 {
744 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
745 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
746
747 if (init_attr->create_flags)
748 return -EOPNOTSUPP;
749
750 if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
751 init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
752 init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags)
753 return -EINVAL;
754
755 if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
756 if (init_attr->qp_type != IB_QPT_RC &&
757 init_attr->qp_type != IB_QPT_UD &&
758 init_attr->qp_type != IB_QPT_GSI)
759 return -EOPNOTSUPP;
760 } else {
761 if (init_attr->qp_type != IB_QPT_RC)
762 return -EOPNOTSUPP;
763 }
764
765 return 0;
766 }
767
irdma_flush_worker(struct work_struct * work)768 static void irdma_flush_worker(struct work_struct *work)
769 {
770 struct delayed_work *dwork = to_delayed_work(work);
771 struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush);
772
773 irdma_generate_flush_completions(iwqp);
774 }
775
776 /**
777 * irdma_create_qp - create qp
778 * @ibqp: ptr of qp
779 * @init_attr: attributes for qp
780 * @udata: user data for create qp
781 */
irdma_create_qp(struct ib_qp * ibqp,struct ib_qp_init_attr * init_attr,struct ib_udata * udata)782 static int irdma_create_qp(struct ib_qp *ibqp,
783 struct ib_qp_init_attr *init_attr,
784 struct ib_udata *udata)
785 {
786 struct ib_pd *ibpd = ibqp->pd;
787 struct irdma_pd *iwpd = to_iwpd(ibpd);
788 struct irdma_device *iwdev = to_iwdev(ibpd->device);
789 struct irdma_pci_f *rf = iwdev->rf;
790 struct irdma_qp *iwqp = to_iwqp(ibqp);
791 struct irdma_create_qp_req req;
792 struct irdma_create_qp_resp uresp = {};
793 u32 qp_num = 0;
794 enum irdma_status_code ret;
795 int err_code;
796 int sq_size;
797 int rq_size;
798 struct irdma_sc_qp *qp;
799 struct irdma_sc_dev *dev = &rf->sc_dev;
800 struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
801 struct irdma_qp_init_info init_info = {};
802 struct irdma_qp_host_ctx_info *ctx_info;
803 unsigned long flags;
804
805 err_code = irdma_validate_qp_attrs(init_attr, iwdev);
806 if (err_code)
807 return err_code;
808
809 sq_size = init_attr->cap.max_send_wr;
810 rq_size = init_attr->cap.max_recv_wr;
811
812 init_info.vsi = &iwdev->vsi;
813 init_info.qp_uk_init_info.uk_attrs = uk_attrs;
814 init_info.qp_uk_init_info.sq_size = sq_size;
815 init_info.qp_uk_init_info.rq_size = rq_size;
816 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
817 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
818 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
819
820 qp = &iwqp->sc_qp;
821 qp->qp_uk.back_qp = iwqp;
822 qp->qp_uk.lock = &iwqp->lock;
823 qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
824
825 iwqp->iwdev = iwdev;
826 iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
827 256);
828 iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
829 iwqp->q2_ctx_mem.size,
830 &iwqp->q2_ctx_mem.pa,
831 GFP_KERNEL);
832 if (!iwqp->q2_ctx_mem.va)
833 return -ENOMEM;
834
835 init_info.q2 = iwqp->q2_ctx_mem.va;
836 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
837 init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
838 init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
839
840 if (init_attr->qp_type == IB_QPT_GSI)
841 qp_num = 1;
842 else
843 err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
844 &qp_num, &rf->next_qp);
845 if (err_code)
846 goto error;
847
848 iwqp->iwpd = iwpd;
849 iwqp->ibqp.qp_num = qp_num;
850 qp = &iwqp->sc_qp;
851 iwqp->iwscq = to_iwcq(init_attr->send_cq);
852 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
853 iwqp->host_ctx.va = init_info.host_ctx;
854 iwqp->host_ctx.pa = init_info.host_ctx_pa;
855 iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
856
857 init_info.pd = &iwpd->sc_pd;
858 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
859 if (!rdma_protocol_roce(&iwdev->ibdev, 1))
860 init_info.qp_uk_init_info.first_sq_wq = 1;
861 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
862 init_waitqueue_head(&iwqp->waitq);
863 init_waitqueue_head(&iwqp->mod_qp_waitq);
864
865 if (udata) {
866 err_code = ib_copy_from_udata(&req, udata,
867 min(sizeof(req), udata->inlen));
868 if (err_code) {
869 ibdev_dbg(&iwdev->ibdev,
870 "VERBS: ib_copy_from_data fail\n");
871 goto error;
872 }
873
874 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
875 iwqp->user_mode = 1;
876 if (req.user_wqe_bufs) {
877 struct irdma_ucontext *ucontext =
878 rdma_udata_to_drv_context(udata,
879 struct irdma_ucontext,
880 ibucontext);
881
882 init_info.qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
883 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
884 iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
885 &ucontext->qp_reg_mem_list);
886 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
887
888 if (!iwqp->iwpbl) {
889 err_code = -ENODATA;
890 ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
891 goto error;
892 }
893 }
894 init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
895 irdma_setup_virt_qp(iwdev, iwqp, &init_info);
896 } else {
897 INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker);
898 init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
899 err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
900 }
901
902 if (err_code) {
903 ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
904 goto error;
905 }
906
907 if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
908 if (init_attr->qp_type == IB_QPT_RC) {
909 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
910 init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
911 IRDMA_WRITE_WITH_IMM |
912 IRDMA_ROCE;
913 } else {
914 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
915 init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
916 IRDMA_ROCE;
917 }
918 } else {
919 init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
920 init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
921 }
922
923 if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
924 init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
925
926 ret = irdma_sc_qp_init(qp, &init_info);
927 if (ret) {
928 err_code = -EPROTO;
929 ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
930 goto error;
931 }
932
933 ctx_info = &iwqp->ctx_info;
934 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
935 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
936
937 if (rdma_protocol_roce(&iwdev->ibdev, 1))
938 irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
939 else
940 irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
941
942 err_code = irdma_cqp_create_qp_cmd(iwqp);
943 if (err_code)
944 goto error;
945
946 refcount_set(&iwqp->refcnt, 1);
947 spin_lock_init(&iwqp->lock);
948 spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
949 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
950 rf->qp_table[qp_num] = iwqp;
951 iwqp->max_send_wr = sq_size;
952 iwqp->max_recv_wr = rq_size;
953
954 if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
955 if (dev->ws_add(&iwdev->vsi, 0)) {
956 irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
957 err_code = -EINVAL;
958 goto error;
959 }
960
961 irdma_qp_add_qos(&iwqp->sc_qp);
962 }
963
964 if (udata) {
965 /* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
966 if (udata->outlen < sizeof(uresp)) {
967 uresp.lsmm = 1;
968 uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
969 } else {
970 if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
971 uresp.lsmm = 1;
972 }
973 uresp.actual_sq_size = sq_size;
974 uresp.actual_rq_size = rq_size;
975 uresp.qp_id = qp_num;
976 uresp.qp_caps = qp->qp_uk.qp_caps;
977
978 err_code = ib_copy_to_udata(udata, &uresp,
979 min(sizeof(uresp), udata->outlen));
980 if (err_code) {
981 ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
982 irdma_destroy_qp(&iwqp->ibqp, udata);
983 return err_code;
984 }
985 }
986
987 init_completion(&iwqp->free_qp);
988 return 0;
989
990 error:
991 irdma_free_qp_rsrc(iwqp);
992 return err_code;
993 }
994
irdma_get_ib_acc_flags(struct irdma_qp * iwqp)995 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
996 {
997 int acc_flags = 0;
998
999 if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1000 if (iwqp->roce_info.wr_rdresp_en) {
1001 acc_flags |= IB_ACCESS_LOCAL_WRITE;
1002 acc_flags |= IB_ACCESS_REMOTE_WRITE;
1003 }
1004 if (iwqp->roce_info.rd_en)
1005 acc_flags |= IB_ACCESS_REMOTE_READ;
1006 if (iwqp->roce_info.bind_en)
1007 acc_flags |= IB_ACCESS_MW_BIND;
1008 } else {
1009 if (iwqp->iwarp_info.wr_rdresp_en) {
1010 acc_flags |= IB_ACCESS_LOCAL_WRITE;
1011 acc_flags |= IB_ACCESS_REMOTE_WRITE;
1012 }
1013 if (iwqp->iwarp_info.rd_en)
1014 acc_flags |= IB_ACCESS_REMOTE_READ;
1015 if (iwqp->iwarp_info.bind_en)
1016 acc_flags |= IB_ACCESS_MW_BIND;
1017 }
1018 return acc_flags;
1019 }
1020
1021 /**
1022 * irdma_query_qp - query qp attributes
1023 * @ibqp: qp pointer
1024 * @attr: attributes pointer
1025 * @attr_mask: Not used
1026 * @init_attr: qp attributes to return
1027 */
irdma_query_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_qp_init_attr * init_attr)1028 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1029 int attr_mask, struct ib_qp_init_attr *init_attr)
1030 {
1031 struct irdma_qp *iwqp = to_iwqp(ibqp);
1032 struct irdma_sc_qp *qp = &iwqp->sc_qp;
1033
1034 memset(attr, 0, sizeof(*attr));
1035 memset(init_attr, 0, sizeof(*init_attr));
1036
1037 attr->qp_state = iwqp->ibqp_state;
1038 attr->cur_qp_state = iwqp->ibqp_state;
1039 attr->cap.max_send_wr = iwqp->max_send_wr;
1040 attr->cap.max_recv_wr = iwqp->max_recv_wr;
1041 attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1042 attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1043 attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1044 attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1045 attr->port_num = 1;
1046 if (rdma_protocol_roce(ibqp->device, 1)) {
1047 attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1048 attr->qkey = iwqp->roce_info.qkey;
1049 attr->rq_psn = iwqp->udp_info.epsn;
1050 attr->sq_psn = iwqp->udp_info.psn_nxt;
1051 attr->dest_qp_num = iwqp->roce_info.dest_qp;
1052 attr->pkey_index = iwqp->roce_info.p_key;
1053 attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1054 attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1055 attr->max_rd_atomic = iwqp->roce_info.ord_size;
1056 attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1057 }
1058
1059 init_attr->event_handler = iwqp->ibqp.event_handler;
1060 init_attr->qp_context = iwqp->ibqp.qp_context;
1061 init_attr->send_cq = iwqp->ibqp.send_cq;
1062 init_attr->recv_cq = iwqp->ibqp.recv_cq;
1063 init_attr->cap = attr->cap;
1064
1065 return 0;
1066 }
1067
1068 /**
1069 * irdma_query_pkey - Query partition key
1070 * @ibdev: device pointer from stack
1071 * @port: port number
1072 * @index: index of pkey
1073 * @pkey: pointer to store the pkey
1074 */
irdma_query_pkey(struct ib_device * ibdev,u32 port,u16 index,u16 * pkey)1075 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1076 u16 *pkey)
1077 {
1078 if (index >= IRDMA_PKEY_TBL_SZ)
1079 return -EINVAL;
1080
1081 *pkey = IRDMA_DEFAULT_PKEY;
1082 return 0;
1083 }
1084
irdma_wait_for_suspend(struct irdma_qp * iwqp)1085 static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
1086 {
1087 if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
1088 !iwqp->suspend_pending,
1089 msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
1090 iwqp->suspend_pending = false;
1091 ibdev_warn(&iwqp->iwdev->ibdev,
1092 "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
1093 iwqp->ibqp.qp_num, iwqp->last_aeq);
1094 return -EBUSY;
1095 }
1096
1097 return 0;
1098 }
1099
1100 /**
1101 * irdma_modify_qp_roce - modify qp request
1102 * @ibqp: qp's pointer for modify
1103 * @attr: access attributes
1104 * @attr_mask: state mask
1105 * @udata: user data
1106 */
irdma_modify_qp_roce(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1107 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1108 int attr_mask, struct ib_udata *udata)
1109 {
1110 struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1111 struct irdma_qp *iwqp = to_iwqp(ibqp);
1112 struct irdma_device *iwdev = iwqp->iwdev;
1113 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1114 struct irdma_qp_host_ctx_info *ctx_info;
1115 struct irdma_roce_offload_info *roce_info;
1116 struct irdma_udp_offload_info *udp_info;
1117 struct irdma_modify_qp_info info = {};
1118 struct irdma_modify_qp_resp uresp = {};
1119 struct irdma_modify_qp_req ureq = {};
1120 unsigned long flags;
1121 u8 issue_modify_qp = 0;
1122 int ret = 0;
1123
1124 ctx_info = &iwqp->ctx_info;
1125 roce_info = &iwqp->roce_info;
1126 udp_info = &iwqp->udp_info;
1127
1128 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1129 return -EOPNOTSUPP;
1130
1131 if (attr_mask & IB_QP_DEST_QPN)
1132 roce_info->dest_qp = attr->dest_qp_num;
1133
1134 if (attr_mask & IB_QP_PKEY_INDEX) {
1135 ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1136 &roce_info->p_key);
1137 if (ret)
1138 return ret;
1139 }
1140
1141 if (attr_mask & IB_QP_QKEY)
1142 roce_info->qkey = attr->qkey;
1143
1144 if (attr_mask & IB_QP_PATH_MTU)
1145 udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1146
1147 if (attr_mask & IB_QP_SQ_PSN) {
1148 udp_info->psn_nxt = attr->sq_psn;
1149 udp_info->lsn = 0xffff;
1150 udp_info->psn_una = attr->sq_psn;
1151 udp_info->psn_max = attr->sq_psn;
1152 }
1153
1154 if (attr_mask & IB_QP_RQ_PSN)
1155 udp_info->epsn = attr->rq_psn;
1156
1157 if (attr_mask & IB_QP_RNR_RETRY)
1158 udp_info->rnr_nak_thresh = attr->rnr_retry;
1159
1160 if (attr_mask & IB_QP_RETRY_CNT)
1161 udp_info->rexmit_thresh = attr->retry_cnt;
1162
1163 ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1164
1165 if (attr_mask & IB_QP_AV) {
1166 struct irdma_av *av = &iwqp->roce_ah.av;
1167 const struct ib_gid_attr *sgid_attr;
1168 u16 vlan_id = VLAN_N_VID;
1169 u32 local_ip[4];
1170
1171 memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1172 if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1173 udp_info->ttl = attr->ah_attr.grh.hop_limit;
1174 udp_info->flow_label = attr->ah_attr.grh.flow_label;
1175 udp_info->tos = attr->ah_attr.grh.traffic_class;
1176 irdma_qp_rem_qos(&iwqp->sc_qp);
1177 dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1178 ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1179 iwqp->sc_qp.user_pri = ctx_info->user_pri;
1180 if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1181 return -ENOMEM;
1182 irdma_qp_add_qos(&iwqp->sc_qp);
1183 }
1184 sgid_attr = attr->ah_attr.grh.sgid_attr;
1185 ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1186 ctx_info->roce_info->mac_addr);
1187 if (ret)
1188 return ret;
1189
1190 if (vlan_id >= VLAN_N_VID && iwdev->dcb)
1191 vlan_id = 0;
1192 if (vlan_id < VLAN_N_VID) {
1193 udp_info->insert_vlan_tag = true;
1194 udp_info->vlan_tag = vlan_id |
1195 ctx_info->user_pri << VLAN_PRIO_SHIFT;
1196 } else {
1197 udp_info->insert_vlan_tag = false;
1198 }
1199
1200 av->attrs = attr->ah_attr;
1201 rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1202 rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1203 roce_info->local_qp = ibqp->qp_num;
1204 if (av->sgid_addr.saddr.sa_family == AF_INET6) {
1205 __be32 *daddr =
1206 av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1207 __be32 *saddr =
1208 av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1209
1210 irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1211 irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1212
1213 udp_info->ipv4 = false;
1214 irdma_copy_ip_ntohl(local_ip, daddr);
1215
1216 udp_info->arp_idx = irdma_arp_table(iwdev->rf,
1217 &local_ip[0],
1218 false, NULL,
1219 IRDMA_ARP_RESOLVE);
1220 } else {
1221 __be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1222 __be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1223
1224 local_ip[0] = ntohl(daddr);
1225
1226 udp_info->ipv4 = true;
1227 udp_info->dest_ip_addr[0] = 0;
1228 udp_info->dest_ip_addr[1] = 0;
1229 udp_info->dest_ip_addr[2] = 0;
1230 udp_info->dest_ip_addr[3] = local_ip[0];
1231
1232 udp_info->local_ipaddr[0] = 0;
1233 udp_info->local_ipaddr[1] = 0;
1234 udp_info->local_ipaddr[2] = 0;
1235 udp_info->local_ipaddr[3] = ntohl(saddr);
1236 }
1237 udp_info->arp_idx =
1238 irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1239 attr->ah_attr.roce.dmac);
1240 }
1241
1242 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1243 if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1244 ibdev_err(&iwdev->ibdev,
1245 "rd_atomic = %d, above max_hw_ord=%d\n",
1246 attr->max_rd_atomic,
1247 dev->hw_attrs.max_hw_ord);
1248 return -EINVAL;
1249 }
1250 if (attr->max_rd_atomic)
1251 roce_info->ord_size = attr->max_rd_atomic;
1252 info.ord_valid = true;
1253 }
1254
1255 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1256 if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1257 ibdev_err(&iwdev->ibdev,
1258 "rd_atomic = %d, above max_hw_ird=%d\n",
1259 attr->max_rd_atomic,
1260 dev->hw_attrs.max_hw_ird);
1261 return -EINVAL;
1262 }
1263 if (attr->max_dest_rd_atomic)
1264 roce_info->ird_size = attr->max_dest_rd_atomic;
1265 }
1266
1267 if (attr_mask & IB_QP_ACCESS_FLAGS) {
1268 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1269 roce_info->wr_rdresp_en = true;
1270 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1271 roce_info->wr_rdresp_en = true;
1272 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1273 roce_info->rd_en = true;
1274 }
1275
1276 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1277
1278 ibdev_dbg(&iwdev->ibdev,
1279 "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1280 __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1281 iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1282
1283 spin_lock_irqsave(&iwqp->lock, flags);
1284 if (attr_mask & IB_QP_STATE) {
1285 if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1286 iwqp->ibqp.qp_type, attr_mask)) {
1287 ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1288 iwqp->ibqp.qp_num, iwqp->ibqp_state,
1289 attr->qp_state);
1290 ret = -EINVAL;
1291 goto exit;
1292 }
1293 info.curr_iwarp_state = iwqp->iwarp_state;
1294
1295 switch (attr->qp_state) {
1296 case IB_QPS_INIT:
1297 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1298 ret = -EINVAL;
1299 goto exit;
1300 }
1301
1302 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1303 info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1304 issue_modify_qp = 1;
1305 }
1306 break;
1307 case IB_QPS_RTR:
1308 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1309 ret = -EINVAL;
1310 goto exit;
1311 }
1312 info.arp_cache_idx_valid = true;
1313 info.cq_num_valid = true;
1314 info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1315 issue_modify_qp = 1;
1316 break;
1317 case IB_QPS_RTS:
1318 if (iwqp->ibqp_state < IB_QPS_RTR ||
1319 iwqp->ibqp_state == IB_QPS_ERR) {
1320 ret = -EINVAL;
1321 goto exit;
1322 }
1323
1324 info.arp_cache_idx_valid = true;
1325 info.cq_num_valid = true;
1326 info.ord_valid = true;
1327 info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1328 issue_modify_qp = 1;
1329 if (iwdev->push_mode && udata &&
1330 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1331 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1332 spin_unlock_irqrestore(&iwqp->lock, flags);
1333 irdma_alloc_push_page(iwqp);
1334 spin_lock_irqsave(&iwqp->lock, flags);
1335 }
1336 break;
1337 case IB_QPS_SQD:
1338 if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1339 goto exit;
1340
1341 if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1342 ret = -EINVAL;
1343 goto exit;
1344 }
1345
1346 info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1347 issue_modify_qp = 1;
1348 iwqp->suspend_pending = true;
1349 break;
1350 case IB_QPS_SQE:
1351 case IB_QPS_ERR:
1352 case IB_QPS_RESET:
1353 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1354 spin_unlock_irqrestore(&iwqp->lock, flags);
1355 if (udata) {
1356 if (ib_copy_from_udata(&ureq, udata,
1357 min(sizeof(ureq), udata->inlen)))
1358 return -EINVAL;
1359
1360 irdma_flush_wqes(iwqp,
1361 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1362 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1363 IRDMA_REFLUSH);
1364 }
1365 return 0;
1366 }
1367
1368 info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1369 issue_modify_qp = 1;
1370 break;
1371 default:
1372 ret = -EINVAL;
1373 goto exit;
1374 }
1375
1376 iwqp->ibqp_state = attr->qp_state;
1377 }
1378
1379 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1380 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1381 irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1382 spin_unlock_irqrestore(&iwqp->lock, flags);
1383
1384 if (attr_mask & IB_QP_STATE) {
1385 if (issue_modify_qp) {
1386 ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1387 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1388 return -EINVAL;
1389 if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
1390 ret = irdma_wait_for_suspend(iwqp);
1391 if (ret)
1392 return ret;
1393 }
1394 spin_lock_irqsave(&iwqp->lock, flags);
1395 if (iwqp->iwarp_state == info.curr_iwarp_state) {
1396 iwqp->iwarp_state = info.next_iwarp_state;
1397 iwqp->ibqp_state = attr->qp_state;
1398 }
1399 if (iwqp->ibqp_state > IB_QPS_RTS &&
1400 !iwqp->flush_issued) {
1401 spin_unlock_irqrestore(&iwqp->lock, flags);
1402 irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1403 IRDMA_FLUSH_RQ |
1404 IRDMA_FLUSH_WAIT);
1405 iwqp->flush_issued = 1;
1406 } else {
1407 spin_unlock_irqrestore(&iwqp->lock, flags);
1408 }
1409 } else {
1410 iwqp->ibqp_state = attr->qp_state;
1411 }
1412 if (udata && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1413 struct irdma_ucontext *ucontext;
1414
1415 ucontext = rdma_udata_to_drv_context(udata,
1416 struct irdma_ucontext, ibucontext);
1417 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1418 !iwqp->push_wqe_mmap_entry &&
1419 !irdma_setup_push_mmap_entries(ucontext, iwqp,
1420 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1421 uresp.push_valid = 1;
1422 uresp.push_offset = iwqp->sc_qp.push_offset;
1423 }
1424 ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1425 udata->outlen));
1426 if (ret) {
1427 irdma_remove_push_mmap_entries(iwqp);
1428 ibdev_dbg(&iwdev->ibdev,
1429 "VERBS: copy_to_udata failed\n");
1430 return ret;
1431 }
1432 }
1433 }
1434
1435 return 0;
1436 exit:
1437 spin_unlock_irqrestore(&iwqp->lock, flags);
1438
1439 return ret;
1440 }
1441
1442 /**
1443 * irdma_modify_qp - modify qp request
1444 * @ibqp: qp's pointer for modify
1445 * @attr: access attributes
1446 * @attr_mask: state mask
1447 * @udata: user data
1448 */
irdma_modify_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1449 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1450 struct ib_udata *udata)
1451 {
1452 struct irdma_qp *iwqp = to_iwqp(ibqp);
1453 struct irdma_device *iwdev = iwqp->iwdev;
1454 struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1455 struct irdma_qp_host_ctx_info *ctx_info;
1456 struct irdma_tcp_offload_info *tcp_info;
1457 struct irdma_iwarp_offload_info *offload_info;
1458 struct irdma_modify_qp_info info = {};
1459 struct irdma_modify_qp_resp uresp = {};
1460 struct irdma_modify_qp_req ureq = {};
1461 u8 issue_modify_qp = 0;
1462 u8 dont_wait = 0;
1463 int err;
1464 unsigned long flags;
1465
1466 if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1467 return -EOPNOTSUPP;
1468
1469 ctx_info = &iwqp->ctx_info;
1470 offload_info = &iwqp->iwarp_info;
1471 tcp_info = &iwqp->tcp_info;
1472 wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1473 ibdev_dbg(&iwdev->ibdev,
1474 "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1475 __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1476 iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1477 iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1478
1479 spin_lock_irqsave(&iwqp->lock, flags);
1480 if (attr_mask & IB_QP_STATE) {
1481 info.curr_iwarp_state = iwqp->iwarp_state;
1482 switch (attr->qp_state) {
1483 case IB_QPS_INIT:
1484 case IB_QPS_RTR:
1485 if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1486 err = -EINVAL;
1487 goto exit;
1488 }
1489
1490 if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1491 info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1492 issue_modify_qp = 1;
1493 }
1494 if (iwdev->push_mode && udata &&
1495 iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1496 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1497 spin_unlock_irqrestore(&iwqp->lock, flags);
1498 irdma_alloc_push_page(iwqp);
1499 spin_lock_irqsave(&iwqp->lock, flags);
1500 }
1501 break;
1502 case IB_QPS_RTS:
1503 if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1504 !iwqp->cm_id) {
1505 err = -EINVAL;
1506 goto exit;
1507 }
1508
1509 issue_modify_qp = 1;
1510 iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1511 iwqp->hte_added = 1;
1512 info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1513 info.tcp_ctx_valid = true;
1514 info.ord_valid = true;
1515 info.arp_cache_idx_valid = true;
1516 info.cq_num_valid = true;
1517 break;
1518 case IB_QPS_SQD:
1519 if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1520 err = 0;
1521 goto exit;
1522 }
1523
1524 if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1525 iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1526 err = 0;
1527 goto exit;
1528 }
1529
1530 if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1531 err = -EINVAL;
1532 goto exit;
1533 }
1534
1535 info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1536 issue_modify_qp = 1;
1537 break;
1538 case IB_QPS_SQE:
1539 if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1540 err = -EINVAL;
1541 goto exit;
1542 }
1543
1544 info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1545 issue_modify_qp = 1;
1546 break;
1547 case IB_QPS_ERR:
1548 case IB_QPS_RESET:
1549 if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1550 spin_unlock_irqrestore(&iwqp->lock, flags);
1551 if (udata) {
1552 if (ib_copy_from_udata(&ureq, udata,
1553 min(sizeof(ureq), udata->inlen)))
1554 return -EINVAL;
1555
1556 irdma_flush_wqes(iwqp,
1557 (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1558 (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1559 IRDMA_REFLUSH);
1560 }
1561 return 0;
1562 }
1563
1564 if (iwqp->sc_qp.term_flags) {
1565 spin_unlock_irqrestore(&iwqp->lock, flags);
1566 irdma_terminate_del_timer(&iwqp->sc_qp);
1567 spin_lock_irqsave(&iwqp->lock, flags);
1568 }
1569 info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1570 if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1571 iwdev->iw_status &&
1572 iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1573 info.reset_tcp_conn = true;
1574 else
1575 dont_wait = 1;
1576
1577 issue_modify_qp = 1;
1578 info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1579 break;
1580 default:
1581 err = -EINVAL;
1582 goto exit;
1583 }
1584
1585 iwqp->ibqp_state = attr->qp_state;
1586 }
1587 if (attr_mask & IB_QP_ACCESS_FLAGS) {
1588 ctx_info->iwarp_info_valid = true;
1589 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1590 offload_info->wr_rdresp_en = true;
1591 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1592 offload_info->wr_rdresp_en = true;
1593 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1594 offload_info->rd_en = true;
1595 }
1596
1597 if (ctx_info->iwarp_info_valid) {
1598 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1599 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1600 irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1601 }
1602 spin_unlock_irqrestore(&iwqp->lock, flags);
1603
1604 if (attr_mask & IB_QP_STATE) {
1605 if (issue_modify_qp) {
1606 ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1607 if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1608 return -EINVAL;
1609 }
1610
1611 spin_lock_irqsave(&iwqp->lock, flags);
1612 if (iwqp->iwarp_state == info.curr_iwarp_state) {
1613 iwqp->iwarp_state = info.next_iwarp_state;
1614 iwqp->ibqp_state = attr->qp_state;
1615 }
1616 spin_unlock_irqrestore(&iwqp->lock, flags);
1617 }
1618
1619 if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1620 if (dont_wait) {
1621 if (iwqp->hw_tcp_state) {
1622 spin_lock_irqsave(&iwqp->lock, flags);
1623 iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1624 iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1625 spin_unlock_irqrestore(&iwqp->lock, flags);
1626 }
1627 irdma_cm_disconn(iwqp);
1628 } else {
1629 int close_timer_started;
1630
1631 spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1632
1633 if (iwqp->cm_node) {
1634 refcount_inc(&iwqp->cm_node->refcnt);
1635 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1636 close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1637 if (iwqp->cm_id && close_timer_started == 1)
1638 irdma_schedule_cm_timer(iwqp->cm_node,
1639 (struct irdma_puda_buf *)iwqp,
1640 IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1641
1642 irdma_rem_ref_cm_node(iwqp->cm_node);
1643 } else {
1644 spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1645 }
1646 }
1647 }
1648 if (attr_mask & IB_QP_STATE && udata &&
1649 dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1650 struct irdma_ucontext *ucontext;
1651
1652 ucontext = rdma_udata_to_drv_context(udata,
1653 struct irdma_ucontext, ibucontext);
1654 if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1655 !iwqp->push_wqe_mmap_entry &&
1656 !irdma_setup_push_mmap_entries(ucontext, iwqp,
1657 &uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1658 uresp.push_valid = 1;
1659 uresp.push_offset = iwqp->sc_qp.push_offset;
1660 }
1661
1662 err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1663 udata->outlen));
1664 if (err) {
1665 irdma_remove_push_mmap_entries(iwqp);
1666 ibdev_dbg(&iwdev->ibdev,
1667 "VERBS: copy_to_udata failed\n");
1668 return err;
1669 }
1670 }
1671
1672 return 0;
1673 exit:
1674 spin_unlock_irqrestore(&iwqp->lock, flags);
1675
1676 return err;
1677 }
1678
1679 /**
1680 * irdma_cq_free_rsrc - free up resources for cq
1681 * @rf: RDMA PCI function
1682 * @iwcq: cq ptr
1683 */
irdma_cq_free_rsrc(struct irdma_pci_f * rf,struct irdma_cq * iwcq)1684 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1685 {
1686 struct irdma_sc_cq *cq = &iwcq->sc_cq;
1687
1688 if (!iwcq->user_mode) {
1689 dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1690 iwcq->kmem.va, iwcq->kmem.pa);
1691 iwcq->kmem.va = NULL;
1692 dma_free_coherent(rf->sc_dev.hw->device,
1693 iwcq->kmem_shadow.size,
1694 iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1695 iwcq->kmem_shadow.va = NULL;
1696 }
1697
1698 irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1699 }
1700
1701 /**
1702 * irdma_free_cqbuf - worker to free a cq buffer
1703 * @work: provides access to the cq buffer to free
1704 */
irdma_free_cqbuf(struct work_struct * work)1705 static void irdma_free_cqbuf(struct work_struct *work)
1706 {
1707 struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1708
1709 dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1710 cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1711 cq_buf->kmem_buf.va = NULL;
1712 kfree(cq_buf);
1713 }
1714
1715 /**
1716 * irdma_process_resize_list - remove resized cq buffers from the resize_list
1717 * @iwcq: cq which owns the resize_list
1718 * @iwdev: irdma device
1719 * @lcqe_buf: the buffer where the last cqe is received
1720 */
irdma_process_resize_list(struct irdma_cq * iwcq,struct irdma_device * iwdev,struct irdma_cq_buf * lcqe_buf)1721 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1722 struct irdma_device *iwdev,
1723 struct irdma_cq_buf *lcqe_buf)
1724 {
1725 struct list_head *tmp_node, *list_node;
1726 struct irdma_cq_buf *cq_buf;
1727 int cnt = 0;
1728
1729 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1730 cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1731 if (cq_buf == lcqe_buf)
1732 return cnt;
1733
1734 list_del(&cq_buf->list);
1735 queue_work(iwdev->cleanup_wq, &cq_buf->work);
1736 cnt++;
1737 }
1738
1739 return cnt;
1740 }
1741
1742 /**
1743 * irdma_destroy_cq - destroy cq
1744 * @ib_cq: cq pointer
1745 * @udata: user data
1746 */
irdma_destroy_cq(struct ib_cq * ib_cq,struct ib_udata * udata)1747 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1748 {
1749 struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1750 struct irdma_cq *iwcq = to_iwcq(ib_cq);
1751 struct irdma_sc_cq *cq = &iwcq->sc_cq;
1752 struct irdma_sc_dev *dev = cq->dev;
1753 struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1754 struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1755 unsigned long flags;
1756
1757 spin_lock_irqsave(&iwcq->lock, flags);
1758 if (!list_empty(&iwcq->cmpl_generated))
1759 irdma_remove_cmpls_list(iwcq);
1760 if (!list_empty(&iwcq->resize_list))
1761 irdma_process_resize_list(iwcq, iwdev, NULL);
1762 spin_unlock_irqrestore(&iwcq->lock, flags);
1763
1764 irdma_cq_wq_destroy(iwdev->rf, cq);
1765
1766 spin_lock_irqsave(&iwceq->ce_lock, flags);
1767 irdma_sc_cleanup_ceqes(cq, ceq);
1768 spin_unlock_irqrestore(&iwceq->ce_lock, flags);
1769 irdma_cq_free_rsrc(iwdev->rf, iwcq);
1770
1771 return 0;
1772 }
1773
1774 /**
1775 * irdma_resize_cq - resize cq
1776 * @ibcq: cq to be resized
1777 * @entries: desired cq size
1778 * @udata: user data
1779 */
irdma_resize_cq(struct ib_cq * ibcq,int entries,struct ib_udata * udata)1780 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
1781 struct ib_udata *udata)
1782 {
1783 struct irdma_cq *iwcq = to_iwcq(ibcq);
1784 struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
1785 struct irdma_cqp_request *cqp_request;
1786 struct cqp_cmds_info *cqp_info;
1787 struct irdma_modify_cq_info *m_info;
1788 struct irdma_modify_cq_info info = {};
1789 struct irdma_dma_mem kmem_buf;
1790 struct irdma_cq_mr *cqmr_buf;
1791 struct irdma_pbl *iwpbl_buf;
1792 struct irdma_device *iwdev;
1793 struct irdma_pci_f *rf;
1794 struct irdma_cq_buf *cq_buf = NULL;
1795 enum irdma_status_code status = 0;
1796 unsigned long flags;
1797 int ret;
1798
1799 iwdev = to_iwdev(ibcq->device);
1800 rf = iwdev->rf;
1801
1802 if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
1803 IRDMA_FEATURE_CQ_RESIZE))
1804 return -EOPNOTSUPP;
1805
1806 if (entries > rf->max_cqe)
1807 return -EINVAL;
1808
1809 if (!iwcq->user_mode) {
1810 entries++;
1811 if (rf->sc_dev.hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
1812 entries *= 2;
1813 }
1814
1815 info.cq_size = max(entries, 4);
1816
1817 if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
1818 return 0;
1819
1820 if (udata) {
1821 struct irdma_resize_cq_req req = {};
1822 struct irdma_ucontext *ucontext =
1823 rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1824 ibucontext);
1825
1826 /* CQ resize not supported with legacy GEN_1 libi40iw */
1827 if (ucontext->legacy_mode)
1828 return -EOPNOTSUPP;
1829
1830 if (ib_copy_from_udata(&req, udata,
1831 min(sizeof(req), udata->inlen)))
1832 return -EINVAL;
1833
1834 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1835 iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
1836 &ucontext->cq_reg_mem_list);
1837 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1838
1839 if (!iwpbl_buf)
1840 return -ENOMEM;
1841
1842 cqmr_buf = &iwpbl_buf->cq_mr;
1843 if (iwpbl_buf->pbl_allocated) {
1844 info.virtual_map = true;
1845 info.pbl_chunk_size = 1;
1846 info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
1847 } else {
1848 info.cq_pa = cqmr_buf->cq_pbl.addr;
1849 }
1850 } else {
1851 /* Kmode CQ resize */
1852 int rsize;
1853
1854 rsize = info.cq_size * sizeof(struct irdma_cqe);
1855 kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
1856 kmem_buf.va = dma_alloc_coherent(dev->hw->device,
1857 kmem_buf.size, &kmem_buf.pa,
1858 GFP_KERNEL);
1859 if (!kmem_buf.va)
1860 return -ENOMEM;
1861
1862 info.cq_base = kmem_buf.va;
1863 info.cq_pa = kmem_buf.pa;
1864 cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
1865 if (!cq_buf) {
1866 ret = -ENOMEM;
1867 goto error;
1868 }
1869 }
1870
1871 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
1872 if (!cqp_request) {
1873 ret = -ENOMEM;
1874 goto error;
1875 }
1876
1877 info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
1878 info.cq_resize = true;
1879
1880 cqp_info = &cqp_request->info;
1881 m_info = &cqp_info->in.u.cq_modify.info;
1882 memcpy(m_info, &info, sizeof(*m_info));
1883
1884 cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
1885 cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
1886 cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
1887 cqp_info->post_sq = 1;
1888 status = irdma_handle_cqp_op(rf, cqp_request);
1889 irdma_put_cqp_request(&rf->cqp, cqp_request);
1890 if (status) {
1891 ret = -EPROTO;
1892 goto error;
1893 }
1894
1895 spin_lock_irqsave(&iwcq->lock, flags);
1896 if (cq_buf) {
1897 cq_buf->kmem_buf = iwcq->kmem;
1898 cq_buf->hw = dev->hw;
1899 memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
1900 INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
1901 list_add_tail(&cq_buf->list, &iwcq->resize_list);
1902 iwcq->kmem = kmem_buf;
1903 }
1904
1905 irdma_sc_cq_resize(&iwcq->sc_cq, &info);
1906 ibcq->cqe = info.cq_size - 1;
1907 spin_unlock_irqrestore(&iwcq->lock, flags);
1908
1909 return 0;
1910 error:
1911 if (!udata) {
1912 dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
1913 kmem_buf.pa);
1914 kmem_buf.va = NULL;
1915 }
1916 kfree(cq_buf);
1917
1918 return ret;
1919 }
1920
cq_validate_flags(u32 flags,u8 hw_rev)1921 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
1922 {
1923 /* GEN1 does not support CQ create flags */
1924 if (hw_rev == IRDMA_GEN_1)
1925 return flags ? -EOPNOTSUPP : 0;
1926
1927 return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
1928 }
1929
1930 /**
1931 * irdma_create_cq - create cq
1932 * @ibcq: CQ allocated
1933 * @attr: attributes for cq
1934 * @udata: user data
1935 */
irdma_create_cq(struct ib_cq * ibcq,const struct ib_cq_init_attr * attr,struct ib_udata * udata)1936 static int irdma_create_cq(struct ib_cq *ibcq,
1937 const struct ib_cq_init_attr *attr,
1938 struct ib_udata *udata)
1939 {
1940 struct ib_device *ibdev = ibcq->device;
1941 struct irdma_device *iwdev = to_iwdev(ibdev);
1942 struct irdma_pci_f *rf = iwdev->rf;
1943 struct irdma_cq *iwcq = to_iwcq(ibcq);
1944 u32 cq_num = 0;
1945 struct irdma_sc_cq *cq;
1946 struct irdma_sc_dev *dev = &rf->sc_dev;
1947 struct irdma_cq_init_info info = {};
1948 enum irdma_status_code status;
1949 struct irdma_cqp_request *cqp_request;
1950 struct cqp_cmds_info *cqp_info;
1951 struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1952 unsigned long flags;
1953 int err_code;
1954 int entries = attr->cqe;
1955
1956 err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
1957 if (err_code)
1958 return err_code;
1959 err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
1960 &rf->next_cq);
1961 if (err_code)
1962 return err_code;
1963
1964 cq = &iwcq->sc_cq;
1965 cq->back_cq = iwcq;
1966 spin_lock_init(&iwcq->lock);
1967 INIT_LIST_HEAD(&iwcq->resize_list);
1968 INIT_LIST_HEAD(&iwcq->cmpl_generated);
1969 info.dev = dev;
1970 ukinfo->cq_size = max(entries, 4);
1971 ukinfo->cq_id = cq_num;
1972 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1973 if (attr->comp_vector < rf->ceqs_count)
1974 info.ceq_id = attr->comp_vector;
1975 info.ceq_id_valid = true;
1976 info.ceqe_mask = 1;
1977 info.type = IRDMA_CQ_TYPE_IWARP;
1978 info.vsi = &iwdev->vsi;
1979
1980 if (udata) {
1981 struct irdma_ucontext *ucontext;
1982 struct irdma_create_cq_req req = {};
1983 struct irdma_cq_mr *cqmr;
1984 struct irdma_pbl *iwpbl;
1985 struct irdma_pbl *iwpbl_shadow;
1986 struct irdma_cq_mr *cqmr_shadow;
1987
1988 iwcq->user_mode = true;
1989 ucontext =
1990 rdma_udata_to_drv_context(udata, struct irdma_ucontext,
1991 ibucontext);
1992 if (ib_copy_from_udata(&req, udata,
1993 min(sizeof(req), udata->inlen))) {
1994 err_code = -EFAULT;
1995 goto cq_free_rsrc;
1996 }
1997
1998 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1999 iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
2000 &ucontext->cq_reg_mem_list);
2001 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2002 if (!iwpbl) {
2003 err_code = -EPROTO;
2004 goto cq_free_rsrc;
2005 }
2006
2007 iwcq->iwpbl = iwpbl;
2008 iwcq->cq_mem_size = 0;
2009 cqmr = &iwpbl->cq_mr;
2010
2011 if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2012 IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2013 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2014 iwpbl_shadow = irdma_get_pbl(
2015 (unsigned long)req.user_shadow_area,
2016 &ucontext->cq_reg_mem_list);
2017 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2018
2019 if (!iwpbl_shadow) {
2020 err_code = -EPROTO;
2021 goto cq_free_rsrc;
2022 }
2023 iwcq->iwpbl_shadow = iwpbl_shadow;
2024 cqmr_shadow = &iwpbl_shadow->cq_mr;
2025 info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2026 cqmr->split = true;
2027 } else {
2028 info.shadow_area_pa = cqmr->shadow;
2029 }
2030 if (iwpbl->pbl_allocated) {
2031 info.virtual_map = true;
2032 info.pbl_chunk_size = 1;
2033 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2034 } else {
2035 info.cq_base_pa = cqmr->cq_pbl.addr;
2036 }
2037 } else {
2038 /* Kmode allocations */
2039 int rsize;
2040
2041 if (entries < 1 || entries > rf->max_cqe) {
2042 err_code = -EINVAL;
2043 goto cq_free_rsrc;
2044 }
2045
2046 entries++;
2047 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2048 entries *= 2;
2049 ukinfo->cq_size = entries;
2050
2051 rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2052 iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2053 iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2054 iwcq->kmem.size,
2055 &iwcq->kmem.pa, GFP_KERNEL);
2056 if (!iwcq->kmem.va) {
2057 err_code = -ENOMEM;
2058 goto cq_free_rsrc;
2059 }
2060
2061 iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2062 64);
2063 iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2064 iwcq->kmem_shadow.size,
2065 &iwcq->kmem_shadow.pa,
2066 GFP_KERNEL);
2067 if (!iwcq->kmem_shadow.va) {
2068 err_code = -ENOMEM;
2069 goto cq_free_rsrc;
2070 }
2071 info.shadow_area_pa = iwcq->kmem_shadow.pa;
2072 ukinfo->shadow_area = iwcq->kmem_shadow.va;
2073 ukinfo->cq_base = iwcq->kmem.va;
2074 info.cq_base_pa = iwcq->kmem.pa;
2075 }
2076
2077 if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2078 info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2079 (u32)IRDMA_MAX_CQ_READ_THRESH);
2080
2081 if (irdma_sc_cq_init(cq, &info)) {
2082 ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2083 err_code = -EPROTO;
2084 goto cq_free_rsrc;
2085 }
2086
2087 cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2088 if (!cqp_request) {
2089 err_code = -ENOMEM;
2090 goto cq_free_rsrc;
2091 }
2092
2093 cqp_info = &cqp_request->info;
2094 cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2095 cqp_info->post_sq = 1;
2096 cqp_info->in.u.cq_create.cq = cq;
2097 cqp_info->in.u.cq_create.check_overflow = true;
2098 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2099 status = irdma_handle_cqp_op(rf, cqp_request);
2100 irdma_put_cqp_request(&rf->cqp, cqp_request);
2101 if (status) {
2102 err_code = -ENOMEM;
2103 goto cq_free_rsrc;
2104 }
2105
2106 if (udata) {
2107 struct irdma_create_cq_resp resp = {};
2108
2109 resp.cq_id = info.cq_uk_init_info.cq_id;
2110 resp.cq_size = info.cq_uk_init_info.cq_size;
2111 if (ib_copy_to_udata(udata, &resp,
2112 min(sizeof(resp), udata->outlen))) {
2113 ibdev_dbg(&iwdev->ibdev,
2114 "VERBS: copy to user data\n");
2115 err_code = -EPROTO;
2116 goto cq_destroy;
2117 }
2118 }
2119 return 0;
2120 cq_destroy:
2121 irdma_cq_wq_destroy(rf, cq);
2122 cq_free_rsrc:
2123 irdma_cq_free_rsrc(rf, iwcq);
2124
2125 return err_code;
2126 }
2127
2128 /**
2129 * irdma_get_mr_access - get hw MR access permissions from IB access flags
2130 * @access: IB access flags
2131 */
irdma_get_mr_access(int access)2132 static inline u16 irdma_get_mr_access(int access)
2133 {
2134 u16 hw_access = 0;
2135
2136 hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2137 IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2138 hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2139 IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2140 hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2141 IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2142 hw_access |= (access & IB_ACCESS_MW_BIND) ?
2143 IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2144 hw_access |= (access & IB_ZERO_BASED) ?
2145 IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2146 hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2147
2148 return hw_access;
2149 }
2150
2151 /**
2152 * irdma_free_stag - free stag resource
2153 * @iwdev: irdma device
2154 * @stag: stag to free
2155 */
irdma_free_stag(struct irdma_device * iwdev,u32 stag)2156 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2157 {
2158 u32 stag_idx;
2159
2160 stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2161 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2162 }
2163
2164 /**
2165 * irdma_create_stag - create random stag
2166 * @iwdev: irdma device
2167 */
irdma_create_stag(struct irdma_device * iwdev)2168 static u32 irdma_create_stag(struct irdma_device *iwdev)
2169 {
2170 u32 stag = 0;
2171 u32 stag_index = 0;
2172 u32 next_stag_index;
2173 u32 driver_key;
2174 u32 random;
2175 u8 consumer_key;
2176 int ret;
2177
2178 get_random_bytes(&random, sizeof(random));
2179 consumer_key = (u8)random;
2180
2181 driver_key = random & ~iwdev->rf->mr_stagmask;
2182 next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2183 next_stag_index %= iwdev->rf->max_mr;
2184
2185 ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2186 iwdev->rf->max_mr, &stag_index,
2187 &next_stag_index);
2188 if (ret)
2189 return stag;
2190 stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2191 stag |= driver_key;
2192 stag += (u32)consumer_key;
2193
2194 return stag;
2195 }
2196
2197 /**
2198 * irdma_next_pbl_addr - Get next pbl address
2199 * @pbl: pointer to a pble
2200 * @pinfo: info pointer
2201 * @idx: index
2202 */
irdma_next_pbl_addr(u64 * pbl,struct irdma_pble_info ** pinfo,u32 * idx)2203 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2204 u32 *idx)
2205 {
2206 *idx += 1;
2207 if (!(*pinfo) || *idx != (*pinfo)->cnt)
2208 return ++pbl;
2209 *idx = 0;
2210 (*pinfo)++;
2211
2212 return (*pinfo)->addr;
2213 }
2214
2215 /**
2216 * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2217 * @iwmr: iwmr for IB's user page addresses
2218 * @pbl: ple pointer to save 1 level or 0 level pble
2219 * @level: indicated level 0, 1 or 2
2220 */
irdma_copy_user_pgaddrs(struct irdma_mr * iwmr,u64 * pbl,enum irdma_pble_level level)2221 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2222 enum irdma_pble_level level)
2223 {
2224 struct ib_umem *region = iwmr->region;
2225 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2226 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2227 struct irdma_pble_info *pinfo;
2228 struct ib_block_iter biter;
2229 u32 idx = 0;
2230 u32 pbl_cnt = 0;
2231
2232 pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2233
2234 if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2235 iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2236
2237 rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2238 *pbl = rdma_block_iter_dma_address(&biter);
2239 if (++pbl_cnt == palloc->total_cnt)
2240 break;
2241 pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2242 }
2243 }
2244
2245 /**
2246 * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2247 * @arr: lvl1 pbl array
2248 * @npages: page count
2249 * @pg_size: page size
2250 *
2251 */
irdma_check_mem_contiguous(u64 * arr,u32 npages,u32 pg_size)2252 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2253 {
2254 u32 pg_idx;
2255
2256 for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2257 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2258 return false;
2259 }
2260
2261 return true;
2262 }
2263
2264 /**
2265 * irdma_check_mr_contiguous - check if MR is physically contiguous
2266 * @palloc: pbl allocation struct
2267 * @pg_size: page size
2268 */
irdma_check_mr_contiguous(struct irdma_pble_alloc * palloc,u32 pg_size)2269 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2270 u32 pg_size)
2271 {
2272 struct irdma_pble_level2 *lvl2 = &palloc->level2;
2273 struct irdma_pble_info *leaf = lvl2->leaf;
2274 u64 *arr = NULL;
2275 u64 *start_addr = NULL;
2276 int i;
2277 bool ret;
2278
2279 if (palloc->level == PBLE_LEVEL_1) {
2280 arr = palloc->level1.addr;
2281 ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2282 pg_size);
2283 return ret;
2284 }
2285
2286 start_addr = leaf->addr;
2287
2288 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2289 arr = leaf->addr;
2290 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2291 return false;
2292 ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2293 if (!ret)
2294 return false;
2295 }
2296
2297 return true;
2298 }
2299
2300 /**
2301 * irdma_setup_pbles - copy user pg address to pble's
2302 * @rf: RDMA PCI function
2303 * @iwmr: mr pointer for this memory registration
2304 * @use_pbles: flag if to use pble's
2305 * @lvl_1_only: request only level 1 pble if true
2306 */
irdma_setup_pbles(struct irdma_pci_f * rf,struct irdma_mr * iwmr,bool use_pbles,bool lvl_1_only)2307 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2308 bool use_pbles, bool lvl_1_only)
2309 {
2310 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2311 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2312 struct irdma_pble_info *pinfo;
2313 u64 *pbl;
2314 enum irdma_status_code status;
2315 enum irdma_pble_level level = PBLE_LEVEL_1;
2316
2317 if (use_pbles) {
2318 status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2319 lvl_1_only);
2320 if (status)
2321 return -ENOMEM;
2322
2323 iwpbl->pbl_allocated = true;
2324 level = palloc->level;
2325 pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2326 palloc->level2.leaf;
2327 pbl = pinfo->addr;
2328 } else {
2329 pbl = iwmr->pgaddrmem;
2330 }
2331
2332 irdma_copy_user_pgaddrs(iwmr, pbl, level);
2333
2334 if (use_pbles)
2335 iwmr->pgaddrmem[0] = *pbl;
2336
2337 return 0;
2338 }
2339
2340 /**
2341 * irdma_handle_q_mem - handle memory for qp and cq
2342 * @iwdev: irdma device
2343 * @req: information for q memory management
2344 * @iwpbl: pble struct
2345 * @use_pbles: flag to use pble
2346 */
irdma_handle_q_mem(struct irdma_device * iwdev,struct irdma_mem_reg_req * req,struct irdma_pbl * iwpbl,bool use_pbles)2347 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2348 struct irdma_mem_reg_req *req,
2349 struct irdma_pbl *iwpbl, bool use_pbles)
2350 {
2351 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2352 struct irdma_mr *iwmr = iwpbl->iwmr;
2353 struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2354 struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2355 struct irdma_hmc_pble *hmc_p;
2356 u64 *arr = iwmr->pgaddrmem;
2357 u32 pg_size, total;
2358 int err = 0;
2359 bool ret = true;
2360
2361 pg_size = iwmr->page_size;
2362 err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles, true);
2363 if (err)
2364 return err;
2365
2366 if (use_pbles)
2367 arr = palloc->level1.addr;
2368
2369 switch (iwmr->type) {
2370 case IRDMA_MEMREG_TYPE_QP:
2371 total = req->sq_pages + req->rq_pages;
2372 hmc_p = &qpmr->sq_pbl;
2373 qpmr->shadow = (dma_addr_t)arr[total];
2374
2375 if (use_pbles) {
2376 ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2377 pg_size);
2378 if (ret)
2379 ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2380 req->rq_pages,
2381 pg_size);
2382 }
2383
2384 if (!ret) {
2385 hmc_p->idx = palloc->level1.idx;
2386 hmc_p = &qpmr->rq_pbl;
2387 hmc_p->idx = palloc->level1.idx + req->sq_pages;
2388 } else {
2389 hmc_p->addr = arr[0];
2390 hmc_p = &qpmr->rq_pbl;
2391 hmc_p->addr = arr[req->sq_pages];
2392 }
2393 break;
2394 case IRDMA_MEMREG_TYPE_CQ:
2395 hmc_p = &cqmr->cq_pbl;
2396
2397 if (!cqmr->split)
2398 cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2399
2400 if (use_pbles)
2401 ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2402 pg_size);
2403
2404 if (!ret)
2405 hmc_p->idx = palloc->level1.idx;
2406 else
2407 hmc_p->addr = arr[0];
2408 break;
2409 default:
2410 ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2411 err = -EINVAL;
2412 }
2413
2414 if (use_pbles && ret) {
2415 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2416 iwpbl->pbl_allocated = false;
2417 }
2418
2419 return err;
2420 }
2421
2422 /**
2423 * irdma_hw_alloc_mw - create the hw memory window
2424 * @iwdev: irdma device
2425 * @iwmr: pointer to memory window info
2426 */
irdma_hw_alloc_mw(struct irdma_device * iwdev,struct irdma_mr * iwmr)2427 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
2428 {
2429 struct irdma_mw_alloc_info *info;
2430 struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
2431 struct irdma_cqp_request *cqp_request;
2432 struct cqp_cmds_info *cqp_info;
2433 enum irdma_status_code status;
2434
2435 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2436 if (!cqp_request)
2437 return -ENOMEM;
2438
2439 cqp_info = &cqp_request->info;
2440 info = &cqp_info->in.u.mw_alloc.info;
2441 memset(info, 0, sizeof(*info));
2442 if (iwmr->ibmw.type == IB_MW_TYPE_1)
2443 info->mw_wide = true;
2444
2445 info->page_size = PAGE_SIZE;
2446 info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2447 info->pd_id = iwpd->sc_pd.pd_id;
2448 info->remote_access = true;
2449 cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
2450 cqp_info->post_sq = 1;
2451 cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
2452 cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
2453 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2454 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2455
2456 return status ? -ENOMEM : 0;
2457 }
2458
2459 /**
2460 * irdma_alloc_mw - Allocate memory window
2461 * @ibmw: Memory Window
2462 * @udata: user data pointer
2463 */
irdma_alloc_mw(struct ib_mw * ibmw,struct ib_udata * udata)2464 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
2465 {
2466 struct irdma_device *iwdev = to_iwdev(ibmw->device);
2467 struct irdma_mr *iwmr = to_iwmw(ibmw);
2468 int err_code;
2469 u32 stag;
2470
2471 stag = irdma_create_stag(iwdev);
2472 if (!stag)
2473 return -ENOMEM;
2474
2475 iwmr->stag = stag;
2476 ibmw->rkey = stag;
2477
2478 err_code = irdma_hw_alloc_mw(iwdev, iwmr);
2479 if (err_code) {
2480 irdma_free_stag(iwdev, stag);
2481 return err_code;
2482 }
2483
2484 return 0;
2485 }
2486
2487 /**
2488 * irdma_dealloc_mw - Dealloc memory window
2489 * @ibmw: memory window structure.
2490 */
irdma_dealloc_mw(struct ib_mw * ibmw)2491 static int irdma_dealloc_mw(struct ib_mw *ibmw)
2492 {
2493 struct ib_pd *ibpd = ibmw->pd;
2494 struct irdma_pd *iwpd = to_iwpd(ibpd);
2495 struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
2496 struct irdma_device *iwdev = to_iwdev(ibmw->device);
2497 struct irdma_cqp_request *cqp_request;
2498 struct cqp_cmds_info *cqp_info;
2499 struct irdma_dealloc_stag_info *info;
2500
2501 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2502 if (!cqp_request)
2503 return -ENOMEM;
2504
2505 cqp_info = &cqp_request->info;
2506 info = &cqp_info->in.u.dealloc_stag.info;
2507 memset(info, 0, sizeof(*info));
2508 info->pd_id = iwpd->sc_pd.pd_id;
2509 info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
2510 info->mr = false;
2511 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
2512 cqp_info->post_sq = 1;
2513 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
2514 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2515 irdma_handle_cqp_op(iwdev->rf, cqp_request);
2516 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2517 irdma_free_stag(iwdev, iwmr->stag);
2518
2519 return 0;
2520 }
2521
2522 /**
2523 * irdma_hw_alloc_stag - cqp command to allocate stag
2524 * @iwdev: irdma device
2525 * @iwmr: irdma mr pointer
2526 */
irdma_hw_alloc_stag(struct irdma_device * iwdev,struct irdma_mr * iwmr)2527 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
2528 struct irdma_mr *iwmr)
2529 {
2530 struct irdma_allocate_stag_info *info;
2531 struct ib_pd *pd = iwmr->ibmr.pd;
2532 struct irdma_pd *iwpd = to_iwpd(pd);
2533 enum irdma_status_code status;
2534 int err = 0;
2535 struct irdma_cqp_request *cqp_request;
2536 struct cqp_cmds_info *cqp_info;
2537
2538 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2539 if (!cqp_request)
2540 return -ENOMEM;
2541
2542 cqp_info = &cqp_request->info;
2543 info = &cqp_info->in.u.alloc_stag.info;
2544 memset(info, 0, sizeof(*info));
2545 info->page_size = PAGE_SIZE;
2546 info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2547 info->pd_id = iwpd->sc_pd.pd_id;
2548 info->total_len = iwmr->len;
2549 info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
2550 info->remote_access = true;
2551 cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
2552 cqp_info->post_sq = 1;
2553 cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
2554 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
2555 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2556 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2557 if (status)
2558 err = -ENOMEM;
2559
2560 return err;
2561 }
2562
2563 /**
2564 * irdma_alloc_mr - register stag for fast memory registration
2565 * @pd: ibpd pointer
2566 * @mr_type: memory for stag registrion
2567 * @max_num_sg: man number of pages
2568 */
irdma_alloc_mr(struct ib_pd * pd,enum ib_mr_type mr_type,u32 max_num_sg)2569 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
2570 u32 max_num_sg)
2571 {
2572 struct irdma_device *iwdev = to_iwdev(pd->device);
2573 struct irdma_pble_alloc *palloc;
2574 struct irdma_pbl *iwpbl;
2575 struct irdma_mr *iwmr;
2576 enum irdma_status_code status;
2577 u32 stag;
2578 int err_code = -ENOMEM;
2579
2580 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2581 if (!iwmr)
2582 return ERR_PTR(-ENOMEM);
2583
2584 stag = irdma_create_stag(iwdev);
2585 if (!stag) {
2586 err_code = -ENOMEM;
2587 goto err;
2588 }
2589
2590 iwmr->stag = stag;
2591 iwmr->ibmr.rkey = stag;
2592 iwmr->ibmr.lkey = stag;
2593 iwmr->ibmr.pd = pd;
2594 iwmr->ibmr.device = pd->device;
2595 iwpbl = &iwmr->iwpbl;
2596 iwpbl->iwmr = iwmr;
2597 iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2598 palloc = &iwpbl->pble_alloc;
2599 iwmr->page_cnt = max_num_sg;
2600 /* Use system PAGE_SIZE as the sg page sizes are unknown at this point */
2601 iwmr->len = max_num_sg * PAGE_SIZE;
2602 status = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
2603 true);
2604 if (status)
2605 goto err_get_pble;
2606
2607 err_code = irdma_hw_alloc_stag(iwdev, iwmr);
2608 if (err_code)
2609 goto err_alloc_stag;
2610
2611 iwpbl->pbl_allocated = true;
2612
2613 return &iwmr->ibmr;
2614 err_alloc_stag:
2615 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2616 err_get_pble:
2617 irdma_free_stag(iwdev, stag);
2618 err:
2619 kfree(iwmr);
2620
2621 return ERR_PTR(err_code);
2622 }
2623
2624 /**
2625 * irdma_set_page - populate pbl list for fmr
2626 * @ibmr: ib mem to access iwarp mr pointer
2627 * @addr: page dma address fro pbl list
2628 */
irdma_set_page(struct ib_mr * ibmr,u64 addr)2629 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
2630 {
2631 struct irdma_mr *iwmr = to_iwmr(ibmr);
2632 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2633 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2634 u64 *pbl;
2635
2636 if (unlikely(iwmr->npages == iwmr->page_cnt))
2637 return -ENOMEM;
2638
2639 pbl = palloc->level1.addr;
2640 pbl[iwmr->npages++] = addr;
2641
2642 return 0;
2643 }
2644
2645 /**
2646 * irdma_map_mr_sg - map of sg list for fmr
2647 * @ibmr: ib mem to access iwarp mr pointer
2648 * @sg: scatter gather list
2649 * @sg_nents: number of sg pages
2650 * @sg_offset: scatter gather list for fmr
2651 */
irdma_map_mr_sg(struct ib_mr * ibmr,struct scatterlist * sg,int sg_nents,unsigned int * sg_offset)2652 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
2653 int sg_nents, unsigned int *sg_offset)
2654 {
2655 struct irdma_mr *iwmr = to_iwmr(ibmr);
2656
2657 iwmr->npages = 0;
2658
2659 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
2660 }
2661
2662 /**
2663 * irdma_hwreg_mr - send cqp command for memory registration
2664 * @iwdev: irdma device
2665 * @iwmr: irdma mr pointer
2666 * @access: access for MR
2667 */
irdma_hwreg_mr(struct irdma_device * iwdev,struct irdma_mr * iwmr,u16 access)2668 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
2669 u16 access)
2670 {
2671 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2672 struct irdma_reg_ns_stag_info *stag_info;
2673 struct ib_pd *pd = iwmr->ibmr.pd;
2674 struct irdma_pd *iwpd = to_iwpd(pd);
2675 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2676 enum irdma_status_code status;
2677 int err = 0;
2678 struct irdma_cqp_request *cqp_request;
2679 struct cqp_cmds_info *cqp_info;
2680
2681 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
2682 if (!cqp_request)
2683 return -ENOMEM;
2684
2685 cqp_info = &cqp_request->info;
2686 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
2687 memset(stag_info, 0, sizeof(*stag_info));
2688 stag_info->va = iwpbl->user_base;
2689 stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
2690 stag_info->stag_key = (u8)iwmr->stag;
2691 stag_info->total_len = iwmr->len;
2692 stag_info->access_rights = irdma_get_mr_access(access);
2693 stag_info->pd_id = iwpd->sc_pd.pd_id;
2694 stag_info->all_memory = pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY;
2695 if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
2696 stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
2697 else
2698 stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
2699 stag_info->page_size = iwmr->page_size;
2700
2701 if (iwpbl->pbl_allocated) {
2702 if (palloc->level == PBLE_LEVEL_1) {
2703 stag_info->first_pm_pbl_index = palloc->level1.idx;
2704 stag_info->chunk_size = 1;
2705 } else {
2706 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
2707 stag_info->chunk_size = 3;
2708 }
2709 } else {
2710 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
2711 }
2712
2713 cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
2714 cqp_info->post_sq = 1;
2715 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
2716 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
2717 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
2718 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
2719 if (status)
2720 err = -ENOMEM;
2721
2722 return err;
2723 }
2724
2725 /**
2726 * irdma_reg_user_mr - Register a user memory region
2727 * @pd: ptr of pd
2728 * @start: virtual start address
2729 * @len: length of mr
2730 * @virt: virtual address
2731 * @access: access of mr
2732 * @udata: user data
2733 */
irdma_reg_user_mr(struct ib_pd * pd,u64 start,u64 len,u64 virt,int access,struct ib_udata * udata)2734 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
2735 u64 virt, int access,
2736 struct ib_udata *udata)
2737 {
2738 struct irdma_device *iwdev = to_iwdev(pd->device);
2739 struct irdma_ucontext *ucontext;
2740 struct irdma_pble_alloc *palloc;
2741 struct irdma_pbl *iwpbl;
2742 struct irdma_mr *iwmr;
2743 struct ib_umem *region;
2744 struct irdma_mem_reg_req req;
2745 u32 total, stag = 0;
2746 u8 shadow_pgcnt = 1;
2747 bool use_pbles = false;
2748 unsigned long flags;
2749 int err = -EINVAL;
2750 int ret;
2751
2752 if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
2753 return ERR_PTR(-EINVAL);
2754
2755 region = ib_umem_get(pd->device, start, len, access);
2756
2757 if (IS_ERR(region)) {
2758 ibdev_dbg(&iwdev->ibdev,
2759 "VERBS: Failed to create ib_umem region\n");
2760 return (struct ib_mr *)region;
2761 }
2762
2763 if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
2764 ib_umem_release(region);
2765 return ERR_PTR(-EFAULT);
2766 }
2767
2768 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2769 if (!iwmr) {
2770 ib_umem_release(region);
2771 return ERR_PTR(-ENOMEM);
2772 }
2773
2774 iwpbl = &iwmr->iwpbl;
2775 iwpbl->iwmr = iwmr;
2776 iwmr->region = region;
2777 iwmr->ibmr.pd = pd;
2778 iwmr->ibmr.device = pd->device;
2779 iwmr->ibmr.iova = virt;
2780 iwmr->page_size = PAGE_SIZE;
2781
2782 if (req.reg_type == IRDMA_MEMREG_TYPE_MEM) {
2783 iwmr->page_size = ib_umem_find_best_pgsz(region,
2784 iwdev->rf->sc_dev.hw_attrs.page_size_cap,
2785 virt);
2786 if (unlikely(!iwmr->page_size)) {
2787 kfree(iwmr);
2788 ib_umem_release(region);
2789 return ERR_PTR(-EOPNOTSUPP);
2790 }
2791 }
2792 iwmr->len = region->length;
2793 iwpbl->user_base = virt;
2794 palloc = &iwpbl->pble_alloc;
2795 iwmr->type = req.reg_type;
2796 iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
2797
2798 switch (req.reg_type) {
2799 case IRDMA_MEMREG_TYPE_QP:
2800 total = req.sq_pages + req.rq_pages + shadow_pgcnt;
2801 if (total > iwmr->page_cnt) {
2802 err = -EINVAL;
2803 goto error;
2804 }
2805 total = req.sq_pages + req.rq_pages;
2806 use_pbles = (total > 2);
2807 err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2808 if (err)
2809 goto error;
2810
2811 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2812 ibucontext);
2813 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2814 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
2815 iwpbl->on_list = true;
2816 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2817 break;
2818 case IRDMA_MEMREG_TYPE_CQ:
2819 if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
2820 shadow_pgcnt = 0;
2821 total = req.cq_pages + shadow_pgcnt;
2822 if (total > iwmr->page_cnt) {
2823 err = -EINVAL;
2824 goto error;
2825 }
2826
2827 use_pbles = (req.cq_pages > 1);
2828 err = irdma_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
2829 if (err)
2830 goto error;
2831
2832 ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2833 ibucontext);
2834 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2835 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
2836 iwpbl->on_list = true;
2837 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2838 break;
2839 case IRDMA_MEMREG_TYPE_MEM:
2840 use_pbles = (iwmr->page_cnt != 1);
2841
2842 err = irdma_setup_pbles(iwdev->rf, iwmr, use_pbles, false);
2843 if (err)
2844 goto error;
2845
2846 if (use_pbles) {
2847 ret = irdma_check_mr_contiguous(palloc,
2848 iwmr->page_size);
2849 if (ret) {
2850 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2851 iwpbl->pbl_allocated = false;
2852 }
2853 }
2854
2855 stag = irdma_create_stag(iwdev);
2856 if (!stag) {
2857 err = -ENOMEM;
2858 goto error;
2859 }
2860
2861 iwmr->stag = stag;
2862 iwmr->ibmr.rkey = stag;
2863 iwmr->ibmr.lkey = stag;
2864 err = irdma_hwreg_mr(iwdev, iwmr, access);
2865 if (err) {
2866 irdma_free_stag(iwdev, stag);
2867 goto error;
2868 }
2869
2870 break;
2871 default:
2872 goto error;
2873 }
2874
2875 iwmr->type = req.reg_type;
2876
2877 return &iwmr->ibmr;
2878
2879 error:
2880 if (palloc->level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
2881 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2882 ib_umem_release(region);
2883 kfree(iwmr);
2884
2885 return ERR_PTR(err);
2886 }
2887
2888 /**
2889 * irdma_reg_phys_mr - register kernel physical memory
2890 * @pd: ibpd pointer
2891 * @addr: physical address of memory to register
2892 * @size: size of memory to register
2893 * @access: Access rights
2894 * @iova_start: start of virtual address for physical buffers
2895 */
irdma_reg_phys_mr(struct ib_pd * pd,u64 addr,u64 size,int access,u64 * iova_start)2896 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
2897 u64 *iova_start)
2898 {
2899 struct irdma_device *iwdev = to_iwdev(pd->device);
2900 struct irdma_pbl *iwpbl;
2901 struct irdma_mr *iwmr;
2902 enum irdma_status_code status;
2903 u32 stag;
2904 int ret;
2905
2906 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
2907 if (!iwmr)
2908 return ERR_PTR(-ENOMEM);
2909
2910 iwmr->ibmr.pd = pd;
2911 iwmr->ibmr.device = pd->device;
2912 iwpbl = &iwmr->iwpbl;
2913 iwpbl->iwmr = iwmr;
2914 iwmr->type = IRDMA_MEMREG_TYPE_MEM;
2915 iwpbl->user_base = *iova_start;
2916 stag = irdma_create_stag(iwdev);
2917 if (!stag) {
2918 ret = -ENOMEM;
2919 goto err;
2920 }
2921
2922 iwmr->stag = stag;
2923 iwmr->ibmr.iova = *iova_start;
2924 iwmr->ibmr.rkey = stag;
2925 iwmr->ibmr.lkey = stag;
2926 iwmr->page_cnt = 1;
2927 iwmr->pgaddrmem[0] = addr;
2928 iwmr->len = size;
2929 iwmr->page_size = SZ_4K;
2930 status = irdma_hwreg_mr(iwdev, iwmr, access);
2931 if (status) {
2932 irdma_free_stag(iwdev, stag);
2933 ret = -ENOMEM;
2934 goto err;
2935 }
2936
2937 return &iwmr->ibmr;
2938
2939 err:
2940 kfree(iwmr);
2941
2942 return ERR_PTR(ret);
2943 }
2944
2945 /**
2946 * irdma_get_dma_mr - register physical mem
2947 * @pd: ptr of pd
2948 * @acc: access for memory
2949 */
irdma_get_dma_mr(struct ib_pd * pd,int acc)2950 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
2951 {
2952 u64 kva = 0;
2953
2954 return irdma_reg_phys_mr(pd, 0, 0, acc, &kva);
2955 }
2956
2957 /**
2958 * irdma_del_memlist - Deleting pbl list entries for CQ/QP
2959 * @iwmr: iwmr for IB's user page addresses
2960 * @ucontext: ptr to user context
2961 */
irdma_del_memlist(struct irdma_mr * iwmr,struct irdma_ucontext * ucontext)2962 static void irdma_del_memlist(struct irdma_mr *iwmr,
2963 struct irdma_ucontext *ucontext)
2964 {
2965 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2966 unsigned long flags;
2967
2968 switch (iwmr->type) {
2969 case IRDMA_MEMREG_TYPE_CQ:
2970 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2971 if (iwpbl->on_list) {
2972 iwpbl->on_list = false;
2973 list_del(&iwpbl->list);
2974 }
2975 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2976 break;
2977 case IRDMA_MEMREG_TYPE_QP:
2978 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2979 if (iwpbl->on_list) {
2980 iwpbl->on_list = false;
2981 list_del(&iwpbl->list);
2982 }
2983 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2984 break;
2985 default:
2986 break;
2987 }
2988 }
2989
2990 /**
2991 * irdma_dereg_mr - deregister mr
2992 * @ib_mr: mr ptr for dereg
2993 * @udata: user data
2994 */
irdma_dereg_mr(struct ib_mr * ib_mr,struct ib_udata * udata)2995 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
2996 {
2997 struct ib_pd *ibpd = ib_mr->pd;
2998 struct irdma_pd *iwpd = to_iwpd(ibpd);
2999 struct irdma_mr *iwmr = to_iwmr(ib_mr);
3000 struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3001 struct irdma_dealloc_stag_info *info;
3002 struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3003 struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3004 struct irdma_cqp_request *cqp_request;
3005 struct cqp_cmds_info *cqp_info;
3006
3007 if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3008 if (iwmr->region) {
3009 struct irdma_ucontext *ucontext;
3010
3011 ucontext = rdma_udata_to_drv_context(udata,
3012 struct irdma_ucontext,
3013 ibucontext);
3014 irdma_del_memlist(iwmr, ucontext);
3015 }
3016 goto done;
3017 }
3018
3019 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3020 if (!cqp_request)
3021 return -ENOMEM;
3022
3023 cqp_info = &cqp_request->info;
3024 info = &cqp_info->in.u.dealloc_stag.info;
3025 memset(info, 0, sizeof(*info));
3026 info->pd_id = iwpd->sc_pd.pd_id;
3027 info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3028 info->mr = true;
3029 if (iwpbl->pbl_allocated)
3030 info->dealloc_pbl = true;
3031
3032 cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3033 cqp_info->post_sq = 1;
3034 cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3035 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3036 irdma_handle_cqp_op(iwdev->rf, cqp_request);
3037 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3038 irdma_free_stag(iwdev, iwmr->stag);
3039 done:
3040 if (iwpbl->pbl_allocated)
3041 irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3042 ib_umem_release(iwmr->region);
3043 kfree(iwmr);
3044
3045 return 0;
3046 }
3047
3048 /**
3049 * irdma_copy_sg_list - copy sg list for qp
3050 * @sg_list: copied into sg_list
3051 * @sgl: copy from sgl
3052 * @num_sges: count of sg entries
3053 */
irdma_copy_sg_list(struct irdma_sge * sg_list,struct ib_sge * sgl,int num_sges)3054 static void irdma_copy_sg_list(struct irdma_sge *sg_list, struct ib_sge *sgl,
3055 int num_sges)
3056 {
3057 unsigned int i;
3058
3059 for (i = 0; (i < num_sges) && (i < IRDMA_MAX_WQ_FRAGMENT_COUNT); i++) {
3060 sg_list[i].tag_off = sgl[i].addr;
3061 sg_list[i].len = sgl[i].length;
3062 sg_list[i].stag = sgl[i].lkey;
3063 }
3064 }
3065
3066 /**
3067 * irdma_post_send - kernel application wr
3068 * @ibqp: qp ptr for wr
3069 * @ib_wr: work request ptr
3070 * @bad_wr: return of bad wr if err
3071 */
irdma_post_send(struct ib_qp * ibqp,const struct ib_send_wr * ib_wr,const struct ib_send_wr ** bad_wr)3072 static int irdma_post_send(struct ib_qp *ibqp,
3073 const struct ib_send_wr *ib_wr,
3074 const struct ib_send_wr **bad_wr)
3075 {
3076 struct irdma_qp *iwqp;
3077 struct irdma_qp_uk *ukqp;
3078 struct irdma_sc_dev *dev;
3079 struct irdma_post_sq_info info;
3080 enum irdma_status_code ret;
3081 int err = 0;
3082 unsigned long flags;
3083 bool inv_stag;
3084 struct irdma_ah *ah;
3085
3086 iwqp = to_iwqp(ibqp);
3087 ukqp = &iwqp->sc_qp.qp_uk;
3088 dev = &iwqp->iwdev->rf->sc_dev;
3089
3090 spin_lock_irqsave(&iwqp->lock, flags);
3091 while (ib_wr) {
3092 memset(&info, 0, sizeof(info));
3093 inv_stag = false;
3094 info.wr_id = (ib_wr->wr_id);
3095 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3096 info.signaled = true;
3097 if (ib_wr->send_flags & IB_SEND_FENCE)
3098 info.read_fence = true;
3099 switch (ib_wr->opcode) {
3100 case IB_WR_SEND_WITH_IMM:
3101 if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
3102 info.imm_data_valid = true;
3103 info.imm_data = ntohl(ib_wr->ex.imm_data);
3104 } else {
3105 err = -EINVAL;
3106 break;
3107 }
3108 fallthrough;
3109 case IB_WR_SEND:
3110 case IB_WR_SEND_WITH_INV:
3111 if (ib_wr->opcode == IB_WR_SEND ||
3112 ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
3113 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3114 info.op_type = IRDMA_OP_TYPE_SEND_SOL;
3115 else
3116 info.op_type = IRDMA_OP_TYPE_SEND;
3117 } else {
3118 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3119 info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
3120 else
3121 info.op_type = IRDMA_OP_TYPE_SEND_INV;
3122 info.stag_to_inv = ib_wr->ex.invalidate_rkey;
3123 }
3124
3125 if (ib_wr->send_flags & IB_SEND_INLINE) {
3126 info.op.inline_send.data = (void *)(unsigned long)
3127 ib_wr->sg_list[0].addr;
3128 info.op.inline_send.len = ib_wr->sg_list[0].length;
3129 if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3130 iwqp->ibqp.qp_type == IB_QPT_GSI) {
3131 ah = to_iwah(ud_wr(ib_wr)->ah);
3132 info.op.inline_send.ah_id = ah->sc_ah.ah_info.ah_idx;
3133 info.op.inline_send.qkey = ud_wr(ib_wr)->remote_qkey;
3134 info.op.inline_send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3135 }
3136 ret = irdma_uk_inline_send(ukqp, &info, false);
3137 } else {
3138 info.op.send.num_sges = ib_wr->num_sge;
3139 info.op.send.sg_list = (struct irdma_sge *)
3140 ib_wr->sg_list;
3141 if (iwqp->ibqp.qp_type == IB_QPT_UD ||
3142 iwqp->ibqp.qp_type == IB_QPT_GSI) {
3143 ah = to_iwah(ud_wr(ib_wr)->ah);
3144 info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
3145 info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
3146 info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
3147 }
3148 ret = irdma_uk_send(ukqp, &info, false);
3149 }
3150
3151 if (ret) {
3152 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3153 err = -ENOMEM;
3154 else
3155 err = -EINVAL;
3156 }
3157 break;
3158 case IB_WR_RDMA_WRITE_WITH_IMM:
3159 if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
3160 info.imm_data_valid = true;
3161 info.imm_data = ntohl(ib_wr->ex.imm_data);
3162 } else {
3163 err = -EINVAL;
3164 break;
3165 }
3166 fallthrough;
3167 case IB_WR_RDMA_WRITE:
3168 if (ib_wr->send_flags & IB_SEND_SOLICITED)
3169 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
3170 else
3171 info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
3172
3173 if (ib_wr->send_flags & IB_SEND_INLINE) {
3174 info.op.inline_rdma_write.data = (void *)(uintptr_t)ib_wr->sg_list[0].addr;
3175 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
3176 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3177 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3178 ret = irdma_uk_inline_rdma_write(ukqp, &info, false);
3179 } else {
3180 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
3181 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
3182 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3183 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3184 ret = irdma_uk_rdma_write(ukqp, &info, false);
3185 }
3186
3187 if (ret) {
3188 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3189 err = -ENOMEM;
3190 else
3191 err = -EINVAL;
3192 }
3193 break;
3194 case IB_WR_RDMA_READ_WITH_INV:
3195 inv_stag = true;
3196 fallthrough;
3197 case IB_WR_RDMA_READ:
3198 if (ib_wr->num_sge >
3199 dev->hw_attrs.uk_attrs.max_hw_read_sges) {
3200 err = -EINVAL;
3201 break;
3202 }
3203 info.op_type = IRDMA_OP_TYPE_RDMA_READ;
3204 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
3205 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
3206 info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
3207 info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
3208
3209 ret = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
3210 if (ret) {
3211 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3212 err = -ENOMEM;
3213 else
3214 err = -EINVAL;
3215 }
3216 break;
3217 case IB_WR_LOCAL_INV:
3218 info.op_type = IRDMA_OP_TYPE_INV_STAG;
3219 info.local_fence = info.read_fence;
3220 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
3221 ret = irdma_uk_stag_local_invalidate(ukqp, &info, true);
3222 if (ret)
3223 err = -ENOMEM;
3224 break;
3225 case IB_WR_REG_MR: {
3226 struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
3227 struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
3228 struct irdma_fast_reg_stag_info stag_info = {};
3229
3230 stag_info.signaled = info.signaled;
3231 stag_info.read_fence = info.read_fence;
3232 stag_info.access_rights = irdma_get_mr_access(reg_wr(ib_wr)->access);
3233 stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
3234 stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
3235 stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
3236 stag_info.wr_id = ib_wr->wr_id;
3237 stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3238 stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
3239 stag_info.total_len = iwmr->ibmr.length;
3240 stag_info.reg_addr_pa = *palloc->level1.addr;
3241 stag_info.first_pm_pbl_index = palloc->level1.idx;
3242 stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
3243 if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
3244 stag_info.chunk_size = 1;
3245 ret = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
3246 true);
3247 if (ret)
3248 err = -ENOMEM;
3249 break;
3250 }
3251 default:
3252 err = -EINVAL;
3253 ibdev_dbg(&iwqp->iwdev->ibdev,
3254 "VERBS: upost_send bad opcode = 0x%x\n",
3255 ib_wr->opcode);
3256 break;
3257 }
3258
3259 if (err)
3260 break;
3261 ib_wr = ib_wr->next;
3262 }
3263
3264 if (!iwqp->flush_issued) {
3265 if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS)
3266 irdma_uk_qp_post_wr(ukqp);
3267 spin_unlock_irqrestore(&iwqp->lock, flags);
3268 } else {
3269 spin_unlock_irqrestore(&iwqp->lock, flags);
3270 mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
3271 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
3272 }
3273 if (err)
3274 *bad_wr = ib_wr;
3275
3276 return err;
3277 }
3278
3279 /**
3280 * irdma_post_recv - post receive wr for kernel application
3281 * @ibqp: ib qp pointer
3282 * @ib_wr: work request for receive
3283 * @bad_wr: bad wr caused an error
3284 */
irdma_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * ib_wr,const struct ib_recv_wr ** bad_wr)3285 static int irdma_post_recv(struct ib_qp *ibqp,
3286 const struct ib_recv_wr *ib_wr,
3287 const struct ib_recv_wr **bad_wr)
3288 {
3289 struct irdma_qp *iwqp;
3290 struct irdma_qp_uk *ukqp;
3291 struct irdma_post_rq_info post_recv = {};
3292 struct irdma_sge sg_list[IRDMA_MAX_WQ_FRAGMENT_COUNT];
3293 enum irdma_status_code ret = 0;
3294 unsigned long flags;
3295 int err = 0;
3296
3297 iwqp = to_iwqp(ibqp);
3298 ukqp = &iwqp->sc_qp.qp_uk;
3299
3300 spin_lock_irqsave(&iwqp->lock, flags);
3301 while (ib_wr) {
3302 post_recv.num_sges = ib_wr->num_sge;
3303 post_recv.wr_id = ib_wr->wr_id;
3304 irdma_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
3305 post_recv.sg_list = sg_list;
3306 ret = irdma_uk_post_receive(ukqp, &post_recv);
3307 if (ret) {
3308 ibdev_dbg(&iwqp->iwdev->ibdev,
3309 "VERBS: post_recv err %d\n", ret);
3310 if (ret == IRDMA_ERR_QP_TOOMANY_WRS_POSTED)
3311 err = -ENOMEM;
3312 else
3313 err = -EINVAL;
3314 goto out;
3315 }
3316
3317 ib_wr = ib_wr->next;
3318 }
3319
3320 out:
3321 spin_unlock_irqrestore(&iwqp->lock, flags);
3322 if (iwqp->flush_issued)
3323 mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
3324 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
3325
3326 if (err)
3327 *bad_wr = ib_wr;
3328
3329 return err;
3330 }
3331
3332 /**
3333 * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
3334 * @opcode: iwarp flush code
3335 */
irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)3336 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
3337 {
3338 switch (opcode) {
3339 case FLUSH_PROT_ERR:
3340 return IB_WC_LOC_PROT_ERR;
3341 case FLUSH_REM_ACCESS_ERR:
3342 return IB_WC_REM_ACCESS_ERR;
3343 case FLUSH_LOC_QP_OP_ERR:
3344 return IB_WC_LOC_QP_OP_ERR;
3345 case FLUSH_REM_OP_ERR:
3346 return IB_WC_REM_OP_ERR;
3347 case FLUSH_LOC_LEN_ERR:
3348 return IB_WC_LOC_LEN_ERR;
3349 case FLUSH_GENERAL_ERR:
3350 return IB_WC_WR_FLUSH_ERR;
3351 case FLUSH_RETRY_EXC_ERR:
3352 return IB_WC_RETRY_EXC_ERR;
3353 case FLUSH_MW_BIND_ERR:
3354 return IB_WC_MW_BIND_ERR;
3355 case FLUSH_REM_INV_REQ_ERR:
3356 return IB_WC_REM_INV_REQ_ERR;
3357 case FLUSH_FATAL_ERR:
3358 default:
3359 return IB_WC_FATAL_ERR;
3360 }
3361 }
3362
3363 /**
3364 * irdma_process_cqe - process cqe info
3365 * @entry: processed cqe
3366 * @cq_poll_info: cqe info
3367 */
irdma_process_cqe(struct ib_wc * entry,struct irdma_cq_poll_info * cq_poll_info)3368 static void irdma_process_cqe(struct ib_wc *entry,
3369 struct irdma_cq_poll_info *cq_poll_info)
3370 {
3371 struct irdma_qp *iwqp;
3372 struct irdma_sc_qp *qp;
3373
3374 entry->wc_flags = 0;
3375 entry->pkey_index = 0;
3376 entry->wr_id = cq_poll_info->wr_id;
3377
3378 qp = cq_poll_info->qp_handle;
3379 iwqp = qp->qp_uk.back_qp;
3380 entry->qp = qp->qp_uk.back_qp;
3381
3382 if (cq_poll_info->error) {
3383 entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
3384 irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
3385
3386 entry->vendor_err = cq_poll_info->major_err << 16 |
3387 cq_poll_info->minor_err;
3388 } else {
3389 entry->status = IB_WC_SUCCESS;
3390 if (cq_poll_info->imm_valid) {
3391 entry->ex.imm_data = htonl(cq_poll_info->imm_data);
3392 entry->wc_flags |= IB_WC_WITH_IMM;
3393 }
3394 if (cq_poll_info->ud_smac_valid) {
3395 ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
3396 entry->wc_flags |= IB_WC_WITH_SMAC;
3397 }
3398
3399 if (cq_poll_info->ud_vlan_valid) {
3400 u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
3401
3402 entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
3403 if (vlan) {
3404 entry->vlan_id = vlan;
3405 entry->wc_flags |= IB_WC_WITH_VLAN;
3406 }
3407 } else {
3408 entry->sl = 0;
3409 }
3410 }
3411
3412 switch (cq_poll_info->op_type) {
3413 case IRDMA_OP_TYPE_RDMA_WRITE:
3414 case IRDMA_OP_TYPE_RDMA_WRITE_SOL:
3415 entry->opcode = IB_WC_RDMA_WRITE;
3416 break;
3417 case IRDMA_OP_TYPE_RDMA_READ_INV_STAG:
3418 case IRDMA_OP_TYPE_RDMA_READ:
3419 entry->opcode = IB_WC_RDMA_READ;
3420 break;
3421 case IRDMA_OP_TYPE_SEND_INV:
3422 case IRDMA_OP_TYPE_SEND_SOL:
3423 case IRDMA_OP_TYPE_SEND_SOL_INV:
3424 case IRDMA_OP_TYPE_SEND:
3425 entry->opcode = IB_WC_SEND;
3426 break;
3427 case IRDMA_OP_TYPE_FAST_REG_NSMR:
3428 entry->opcode = IB_WC_REG_MR;
3429 break;
3430 case IRDMA_OP_TYPE_INV_STAG:
3431 entry->opcode = IB_WC_LOCAL_INV;
3432 break;
3433 case IRDMA_OP_TYPE_REC_IMM:
3434 case IRDMA_OP_TYPE_REC:
3435 entry->opcode = cq_poll_info->op_type == IRDMA_OP_TYPE_REC_IMM ?
3436 IB_WC_RECV_RDMA_WITH_IMM : IB_WC_RECV;
3437 if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
3438 cq_poll_info->stag_invalid_set) {
3439 entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
3440 entry->wc_flags |= IB_WC_WITH_INVALIDATE;
3441 }
3442 break;
3443 default:
3444 ibdev_err(&iwqp->iwdev->ibdev,
3445 "Invalid opcode = %d in CQE\n", cq_poll_info->op_type);
3446 entry->status = IB_WC_GENERAL_ERR;
3447 return;
3448 }
3449
3450 if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
3451 entry->src_qp = cq_poll_info->ud_src_qpn;
3452 entry->slid = 0;
3453 entry->wc_flags |=
3454 (IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
3455 entry->network_hdr_type = cq_poll_info->ipv4 ?
3456 RDMA_NETWORK_IPV4 :
3457 RDMA_NETWORK_IPV6;
3458 } else {
3459 entry->src_qp = cq_poll_info->qp_id;
3460 }
3461
3462 entry->byte_len = cq_poll_info->bytes_xfered;
3463 }
3464
3465 /**
3466 * irdma_poll_one - poll one entry of the CQ
3467 * @ukcq: ukcq to poll
3468 * @cur_cqe: current CQE info to be filled in
3469 * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
3470 *
3471 * Returns the internal irdma device error code or 0 on success
3472 */
irdma_poll_one(struct irdma_cq_uk * ukcq,struct irdma_cq_poll_info * cur_cqe,struct ib_wc * entry)3473 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
3474 struct irdma_cq_poll_info *cur_cqe,
3475 struct ib_wc *entry)
3476 {
3477 int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
3478
3479 if (ret)
3480 return ret;
3481
3482 irdma_process_cqe(entry, cur_cqe);
3483
3484 return 0;
3485 }
3486
3487 /**
3488 * __irdma_poll_cq - poll cq for completion (kernel apps)
3489 * @iwcq: cq to poll
3490 * @num_entries: number of entries to poll
3491 * @entry: wr of a completed entry
3492 */
__irdma_poll_cq(struct irdma_cq * iwcq,int num_entries,struct ib_wc * entry)3493 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
3494 {
3495 struct list_head *tmp_node, *list_node;
3496 struct irdma_cq_buf *last_buf = NULL;
3497 struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
3498 struct irdma_cq_buf *cq_buf;
3499 enum irdma_status_code ret;
3500 struct irdma_device *iwdev;
3501 struct irdma_cq_uk *ukcq;
3502 bool cq_new_cqe = false;
3503 int resized_bufs = 0;
3504 int npolled = 0;
3505
3506 iwdev = to_iwdev(iwcq->ibcq.device);
3507 ukcq = &iwcq->sc_cq.cq_uk;
3508
3509 /* go through the list of previously resized CQ buffers */
3510 list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
3511 cq_buf = container_of(list_node, struct irdma_cq_buf, list);
3512 while (npolled < num_entries) {
3513 ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
3514 if (!ret) {
3515 ++npolled;
3516 cq_new_cqe = true;
3517 continue;
3518 }
3519 if (ret == IRDMA_ERR_Q_EMPTY)
3520 break;
3521 /* QP using the CQ is destroyed. Skip reporting this CQE */
3522 if (ret == IRDMA_ERR_Q_DESTROYED) {
3523 cq_new_cqe = true;
3524 continue;
3525 }
3526 goto error;
3527 }
3528
3529 /* save the resized CQ buffer which received the last cqe */
3530 if (cq_new_cqe)
3531 last_buf = cq_buf;
3532 cq_new_cqe = false;
3533 }
3534
3535 /* check the current CQ for new cqes */
3536 while (npolled < num_entries) {
3537 ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
3538 if (ret == -ENOENT) {
3539 ret = irdma_generated_cmpls(iwcq, cur_cqe);
3540 if (!ret)
3541 irdma_process_cqe(entry + npolled, cur_cqe);
3542 }
3543 if (!ret) {
3544 ++npolled;
3545 cq_new_cqe = true;
3546 continue;
3547 }
3548
3549 if (ret == IRDMA_ERR_Q_EMPTY)
3550 break;
3551 /* QP using the CQ is destroyed. Skip reporting this CQE */
3552 if (ret == IRDMA_ERR_Q_DESTROYED) {
3553 cq_new_cqe = true;
3554 continue;
3555 }
3556 goto error;
3557 }
3558
3559 if (cq_new_cqe)
3560 /* all previous CQ resizes are complete */
3561 resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
3562 else if (last_buf)
3563 /* only CQ resizes up to the last_buf are complete */
3564 resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
3565 if (resized_bufs)
3566 /* report to the HW the number of complete CQ resizes */
3567 irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
3568
3569 return npolled;
3570 error:
3571 ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
3572 __func__, ret);
3573
3574 return -EINVAL;
3575 }
3576
3577 /**
3578 * irdma_poll_cq - poll cq for completion (kernel apps)
3579 * @ibcq: cq to poll
3580 * @num_entries: number of entries to poll
3581 * @entry: wr of a completed entry
3582 */
irdma_poll_cq(struct ib_cq * ibcq,int num_entries,struct ib_wc * entry)3583 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
3584 struct ib_wc *entry)
3585 {
3586 struct irdma_cq *iwcq;
3587 unsigned long flags;
3588 int ret;
3589
3590 iwcq = to_iwcq(ibcq);
3591
3592 spin_lock_irqsave(&iwcq->lock, flags);
3593 ret = __irdma_poll_cq(iwcq, num_entries, entry);
3594 spin_unlock_irqrestore(&iwcq->lock, flags);
3595
3596 return ret;
3597 }
3598
3599 /**
3600 * irdma_req_notify_cq - arm cq kernel application
3601 * @ibcq: cq to arm
3602 * @notify_flags: notofication flags
3603 */
irdma_req_notify_cq(struct ib_cq * ibcq,enum ib_cq_notify_flags notify_flags)3604 static int irdma_req_notify_cq(struct ib_cq *ibcq,
3605 enum ib_cq_notify_flags notify_flags)
3606 {
3607 struct irdma_cq *iwcq;
3608 struct irdma_cq_uk *ukcq;
3609 unsigned long flags;
3610 enum irdma_cmpl_notify cq_notify;
3611 bool promo_event = false;
3612 int ret = 0;
3613
3614 cq_notify = notify_flags == IB_CQ_SOLICITED ?
3615 IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
3616 iwcq = to_iwcq(ibcq);
3617 ukcq = &iwcq->sc_cq.cq_uk;
3618
3619 spin_lock_irqsave(&iwcq->lock, flags);
3620 /* Only promote to arm the CQ for any event if the last arm event was solicited. */
3621 if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
3622 promo_event = true;
3623
3624 if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) {
3625 iwcq->last_notify = cq_notify;
3626 irdma_uk_cq_request_notification(ukcq, cq_notify);
3627 }
3628
3629 if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
3630 (!irdma_cq_empty(iwcq) || !list_empty(&iwcq->cmpl_generated)))
3631 ret = 1;
3632 spin_unlock_irqrestore(&iwcq->lock, flags);
3633
3634 return ret;
3635 }
3636
irdma_roce_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)3637 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
3638 struct ib_port_immutable *immutable)
3639 {
3640 struct ib_port_attr attr;
3641 int err;
3642
3643 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
3644 err = ib_query_port(ibdev, port_num, &attr);
3645 if (err)
3646 return err;
3647
3648 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
3649 immutable->pkey_tbl_len = attr.pkey_tbl_len;
3650 immutable->gid_tbl_len = attr.gid_tbl_len;
3651
3652 return 0;
3653 }
3654
irdma_iw_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)3655 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
3656 struct ib_port_immutable *immutable)
3657 {
3658 struct ib_port_attr attr;
3659 int err;
3660
3661 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
3662 err = ib_query_port(ibdev, port_num, &attr);
3663 if (err)
3664 return err;
3665 immutable->gid_tbl_len = attr.gid_tbl_len;
3666
3667 return 0;
3668 }
3669
3670 static const char *const irdma_hw_stat_names[] = {
3671 /* 32bit names */
3672 [IRDMA_HW_STAT_INDEX_RXVLANERR] = "rxVlanErrors",
3673 [IRDMA_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
3674 [IRDMA_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
3675 [IRDMA_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
3676 [IRDMA_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
3677 [IRDMA_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
3678 [IRDMA_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
3679 [IRDMA_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
3680 [IRDMA_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
3681 [IRDMA_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
3682 [IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED] = "cnpHandled",
3683 [IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED] = "cnpIgnored",
3684 [IRDMA_HW_STAT_INDEX_TXNPCNPSENT] = "cnpSent",
3685
3686 /* 64bit names */
3687 [IRDMA_HW_STAT_INDEX_IP4RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3688 "ip4InOctets",
3689 [IRDMA_HW_STAT_INDEX_IP4RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3690 "ip4InPkts",
3691 [IRDMA_HW_STAT_INDEX_IP4RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3692 "ip4InReasmRqd",
3693 [IRDMA_HW_STAT_INDEX_IP4RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3694 "ip4InMcastOctets",
3695 [IRDMA_HW_STAT_INDEX_IP4RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3696 "ip4InMcastPkts",
3697 [IRDMA_HW_STAT_INDEX_IP4TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3698 "ip4OutOctets",
3699 [IRDMA_HW_STAT_INDEX_IP4TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3700 "ip4OutPkts",
3701 [IRDMA_HW_STAT_INDEX_IP4TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3702 "ip4OutSegRqd",
3703 [IRDMA_HW_STAT_INDEX_IP4TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3704 "ip4OutMcastOctets",
3705 [IRDMA_HW_STAT_INDEX_IP4TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3706 "ip4OutMcastPkts",
3707 [IRDMA_HW_STAT_INDEX_IP6RXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3708 "ip6InOctets",
3709 [IRDMA_HW_STAT_INDEX_IP6RXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3710 "ip6InPkts",
3711 [IRDMA_HW_STAT_INDEX_IP6RXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3712 "ip6InReasmRqd",
3713 [IRDMA_HW_STAT_INDEX_IP6RXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3714 "ip6InMcastOctets",
3715 [IRDMA_HW_STAT_INDEX_IP6RXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3716 "ip6InMcastPkts",
3717 [IRDMA_HW_STAT_INDEX_IP6TXOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3718 "ip6OutOctets",
3719 [IRDMA_HW_STAT_INDEX_IP6TXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3720 "ip6OutPkts",
3721 [IRDMA_HW_STAT_INDEX_IP6TXFRAGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3722 "ip6OutSegRqd",
3723 [IRDMA_HW_STAT_INDEX_IP6TXMCOCTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3724 "ip6OutMcastOctets",
3725 [IRDMA_HW_STAT_INDEX_IP6TXMCPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3726 "ip6OutMcastPkts",
3727 [IRDMA_HW_STAT_INDEX_TCPRXSEGS + IRDMA_HW_STAT_INDEX_MAX_32] =
3728 "tcpInSegs",
3729 [IRDMA_HW_STAT_INDEX_TCPTXSEG + IRDMA_HW_STAT_INDEX_MAX_32] =
3730 "tcpOutSegs",
3731 [IRDMA_HW_STAT_INDEX_RDMARXRDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3732 "iwInRdmaReads",
3733 [IRDMA_HW_STAT_INDEX_RDMARXSNDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3734 "iwInRdmaSends",
3735 [IRDMA_HW_STAT_INDEX_RDMARXWRS + IRDMA_HW_STAT_INDEX_MAX_32] =
3736 "iwInRdmaWrites",
3737 [IRDMA_HW_STAT_INDEX_RDMATXRDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3738 "iwOutRdmaReads",
3739 [IRDMA_HW_STAT_INDEX_RDMATXSNDS + IRDMA_HW_STAT_INDEX_MAX_32] =
3740 "iwOutRdmaSends",
3741 [IRDMA_HW_STAT_INDEX_RDMATXWRS + IRDMA_HW_STAT_INDEX_MAX_32] =
3742 "iwOutRdmaWrites",
3743 [IRDMA_HW_STAT_INDEX_RDMAVBND + IRDMA_HW_STAT_INDEX_MAX_32] =
3744 "iwRdmaBnd",
3745 [IRDMA_HW_STAT_INDEX_RDMAVINV + IRDMA_HW_STAT_INDEX_MAX_32] =
3746 "iwRdmaInv",
3747 [IRDMA_HW_STAT_INDEX_UDPRXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3748 "RxUDP",
3749 [IRDMA_HW_STAT_INDEX_UDPTXPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3750 "TxUDP",
3751 [IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS + IRDMA_HW_STAT_INDEX_MAX_32] =
3752 "RxECNMrkd",
3753 };
3754
irdma_get_dev_fw_str(struct ib_device * dev,char * str)3755 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
3756 {
3757 struct irdma_device *iwdev = to_iwdev(dev);
3758
3759 snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
3760 irdma_fw_major_ver(&iwdev->rf->sc_dev),
3761 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
3762 }
3763
3764 /**
3765 * irdma_alloc_hw_port_stats - Allocate a hw stats structure
3766 * @ibdev: device pointer from stack
3767 * @port_num: port number
3768 */
irdma_alloc_hw_port_stats(struct ib_device * ibdev,u32 port_num)3769 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
3770 u32 port_num)
3771 {
3772 int num_counters = IRDMA_HW_STAT_INDEX_MAX_32 +
3773 IRDMA_HW_STAT_INDEX_MAX_64;
3774 unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
3775
3776 BUILD_BUG_ON(ARRAY_SIZE(irdma_hw_stat_names) !=
3777 (IRDMA_HW_STAT_INDEX_MAX_32 + IRDMA_HW_STAT_INDEX_MAX_64));
3778
3779 return rdma_alloc_hw_stats_struct(irdma_hw_stat_names, num_counters,
3780 lifespan);
3781 }
3782
3783 /**
3784 * irdma_get_hw_stats - Populates the rdma_hw_stats structure
3785 * @ibdev: device pointer from stack
3786 * @stats: stats pointer from stack
3787 * @port_num: port number
3788 * @index: which hw counter the stack is requesting we update
3789 */
irdma_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u32 port_num,int index)3790 static int irdma_get_hw_stats(struct ib_device *ibdev,
3791 struct rdma_hw_stats *stats, u32 port_num,
3792 int index)
3793 {
3794 struct irdma_device *iwdev = to_iwdev(ibdev);
3795 struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
3796
3797 if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
3798 irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
3799 else
3800 irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
3801
3802 memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
3803
3804 return stats->num_counters;
3805 }
3806
3807 /**
3808 * irdma_query_gid - Query port GID
3809 * @ibdev: device pointer from stack
3810 * @port: port number
3811 * @index: Entry index
3812 * @gid: Global ID
3813 */
irdma_query_gid(struct ib_device * ibdev,u32 port,int index,union ib_gid * gid)3814 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
3815 union ib_gid *gid)
3816 {
3817 struct irdma_device *iwdev = to_iwdev(ibdev);
3818
3819 memset(gid->raw, 0, sizeof(gid->raw));
3820 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
3821
3822 return 0;
3823 }
3824
3825 /**
3826 * mcast_list_add - Add a new mcast item to list
3827 * @rf: RDMA PCI function
3828 * @new_elem: pointer to element to add
3829 */
mcast_list_add(struct irdma_pci_f * rf,struct mc_table_list * new_elem)3830 static void mcast_list_add(struct irdma_pci_f *rf,
3831 struct mc_table_list *new_elem)
3832 {
3833 list_add(&new_elem->list, &rf->mc_qht_list.list);
3834 }
3835
3836 /**
3837 * mcast_list_del - Remove an mcast item from list
3838 * @mc_qht_elem: pointer to mcast table list element
3839 */
mcast_list_del(struct mc_table_list * mc_qht_elem)3840 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
3841 {
3842 if (mc_qht_elem)
3843 list_del(&mc_qht_elem->list);
3844 }
3845
3846 /**
3847 * mcast_list_lookup_ip - Search mcast list for address
3848 * @rf: RDMA PCI function
3849 * @ip_mcast: pointer to mcast IP address
3850 */
mcast_list_lookup_ip(struct irdma_pci_f * rf,u32 * ip_mcast)3851 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
3852 u32 *ip_mcast)
3853 {
3854 struct mc_table_list *mc_qht_el;
3855 struct list_head *pos, *q;
3856
3857 list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
3858 mc_qht_el = list_entry(pos, struct mc_table_list, list);
3859 if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
3860 sizeof(mc_qht_el->mc_info.dest_ip)))
3861 return mc_qht_el;
3862 }
3863
3864 return NULL;
3865 }
3866
3867 /**
3868 * irdma_mcast_cqp_op - perform a mcast cqp operation
3869 * @iwdev: irdma device
3870 * @mc_grp_ctx: mcast group info
3871 * @op: operation
3872 *
3873 * returns error status
3874 */
irdma_mcast_cqp_op(struct irdma_device * iwdev,struct irdma_mcast_grp_info * mc_grp_ctx,u8 op)3875 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
3876 struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
3877 {
3878 struct cqp_cmds_info *cqp_info;
3879 struct irdma_cqp_request *cqp_request;
3880 enum irdma_status_code status;
3881
3882 cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3883 if (!cqp_request)
3884 return -ENOMEM;
3885
3886 cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
3887 cqp_info = &cqp_request->info;
3888 cqp_info->cqp_cmd = op;
3889 cqp_info->post_sq = 1;
3890 cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
3891 cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
3892 status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3893 irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3894 if (status)
3895 return -ENOMEM;
3896
3897 return 0;
3898 }
3899
3900 /**
3901 * irdma_mcast_mac - Get the multicast MAC for an IP address
3902 * @ip_addr: IPv4 or IPv6 address
3903 * @mac: pointer to result MAC address
3904 * @ipv4: flag indicating IPv4 or IPv6
3905 *
3906 */
irdma_mcast_mac(u32 * ip_addr,u8 * mac,bool ipv4)3907 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
3908 {
3909 u8 *ip = (u8 *)ip_addr;
3910
3911 if (ipv4) {
3912 unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
3913 0x00, 0x00};
3914
3915 mac4[3] = ip[2] & 0x7F;
3916 mac4[4] = ip[1];
3917 mac4[5] = ip[0];
3918 ether_addr_copy(mac, mac4);
3919 } else {
3920 unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
3921 0x00, 0x00};
3922
3923 mac6[2] = ip[3];
3924 mac6[3] = ip[2];
3925 mac6[4] = ip[1];
3926 mac6[5] = ip[0];
3927 ether_addr_copy(mac, mac6);
3928 }
3929 }
3930
3931 /**
3932 * irdma_attach_mcast - attach a qp to a multicast group
3933 * @ibqp: ptr to qp
3934 * @ibgid: pointer to global ID
3935 * @lid: local ID
3936 *
3937 * returns error status
3938 */
irdma_attach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)3939 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
3940 {
3941 struct irdma_qp *iwqp = to_iwqp(ibqp);
3942 struct irdma_device *iwdev = iwqp->iwdev;
3943 struct irdma_pci_f *rf = iwdev->rf;
3944 struct mc_table_list *mc_qht_elem;
3945 struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
3946 unsigned long flags;
3947 u32 ip_addr[4] = {};
3948 u32 mgn;
3949 u32 no_mgs;
3950 int ret = 0;
3951 bool ipv4;
3952 u16 vlan_id;
3953 union {
3954 struct sockaddr saddr;
3955 struct sockaddr_in saddr_in;
3956 struct sockaddr_in6 saddr_in6;
3957 } sgid_addr;
3958 unsigned char dmac[ETH_ALEN];
3959
3960 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
3961
3962 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
3963 irdma_copy_ip_ntohl(ip_addr,
3964 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
3965 irdma_netdev_vlan_ipv6(ip_addr, &vlan_id, NULL);
3966 ipv4 = false;
3967 ibdev_dbg(&iwdev->ibdev,
3968 "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
3969 ip_addr);
3970 irdma_mcast_mac(ip_addr, dmac, false);
3971 } else {
3972 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
3973 ipv4 = true;
3974 vlan_id = irdma_get_vlan_ipv4(ip_addr);
3975 irdma_mcast_mac(ip_addr, dmac, true);
3976 ibdev_dbg(&iwdev->ibdev,
3977 "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
3978 ibqp->qp_num, ip_addr, dmac);
3979 }
3980
3981 spin_lock_irqsave(&rf->qh_list_lock, flags);
3982 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
3983 if (!mc_qht_elem) {
3984 struct irdma_dma_mem *dma_mem_mc;
3985
3986 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
3987 mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
3988 if (!mc_qht_elem)
3989 return -ENOMEM;
3990
3991 mc_qht_elem->mc_info.ipv4_valid = ipv4;
3992 memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
3993 sizeof(mc_qht_elem->mc_info.dest_ip));
3994 ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
3995 &mgn, &rf->next_mcg);
3996 if (ret) {
3997 kfree(mc_qht_elem);
3998 return -ENOMEM;
3999 }
4000
4001 mc_qht_elem->mc_info.mgn = mgn;
4002 dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
4003 dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
4004 IRDMA_HW_PAGE_SIZE);
4005 dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
4006 dma_mem_mc->size,
4007 &dma_mem_mc->pa,
4008 GFP_KERNEL);
4009 if (!dma_mem_mc->va) {
4010 irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
4011 kfree(mc_qht_elem);
4012 return -ENOMEM;
4013 }
4014
4015 mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
4016 memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
4017 sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4018 mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4019 mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4020 if (vlan_id < VLAN_N_VID)
4021 mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4022 mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->vsi.fcn_id;
4023 mc_qht_elem->mc_grp_ctx.qs_handle =
4024 iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4025 ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4026
4027 spin_lock_irqsave(&rf->qh_list_lock, flags);
4028 mcast_list_add(rf, mc_qht_elem);
4029 } else {
4030 if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4031 IRDMA_MAX_MGS_PER_CTX) {
4032 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4033 return -ENOMEM;
4034 }
4035 }
4036
4037 mcg_info.qp_id = iwqp->ibqp.qp_num;
4038 no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4039 irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4040 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4041
4042 /* Only if there is a change do we need to modify or create */
4043 if (!no_mgs) {
4044 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4045 IRDMA_OP_MC_CREATE);
4046 } else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4047 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4048 IRDMA_OP_MC_MODIFY);
4049 } else {
4050 return 0;
4051 }
4052
4053 if (ret)
4054 goto error;
4055
4056 return 0;
4057
4058 error:
4059 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4060 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4061 mcast_list_del(mc_qht_elem);
4062 dma_free_coherent(rf->hw.device,
4063 mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4064 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4065 mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4066 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4067 irdma_free_rsrc(rf, rf->allocated_mcgs,
4068 mc_qht_elem->mc_grp_ctx.mg_id);
4069 kfree(mc_qht_elem);
4070 }
4071
4072 return ret;
4073 }
4074
4075 /**
4076 * irdma_detach_mcast - detach a qp from a multicast group
4077 * @ibqp: ptr to qp
4078 * @ibgid: pointer to global ID
4079 * @lid: local ID
4080 *
4081 * returns error status
4082 */
irdma_detach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)4083 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4084 {
4085 struct irdma_qp *iwqp = to_iwqp(ibqp);
4086 struct irdma_device *iwdev = iwqp->iwdev;
4087 struct irdma_pci_f *rf = iwdev->rf;
4088 u32 ip_addr[4] = {};
4089 struct mc_table_list *mc_qht_elem;
4090 struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4091 int ret;
4092 unsigned long flags;
4093 union {
4094 struct sockaddr saddr;
4095 struct sockaddr_in saddr_in;
4096 struct sockaddr_in6 saddr_in6;
4097 } sgid_addr;
4098
4099 rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4100 if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4101 irdma_copy_ip_ntohl(ip_addr,
4102 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4103 else
4104 ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4105
4106 spin_lock_irqsave(&rf->qh_list_lock, flags);
4107 mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4108 if (!mc_qht_elem) {
4109 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4110 ibdev_dbg(&iwdev->ibdev,
4111 "VERBS: address not found MCG\n");
4112 return 0;
4113 }
4114
4115 mcg_info.qp_id = iwqp->ibqp.qp_num;
4116 irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4117 if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4118 mcast_list_del(mc_qht_elem);
4119 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4120 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4121 IRDMA_OP_MC_DESTROY);
4122 if (ret) {
4123 ibdev_dbg(&iwdev->ibdev,
4124 "VERBS: failed MC_DESTROY MCG\n");
4125 spin_lock_irqsave(&rf->qh_list_lock, flags);
4126 mcast_list_add(rf, mc_qht_elem);
4127 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4128 return -EAGAIN;
4129 }
4130
4131 dma_free_coherent(rf->hw.device,
4132 mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4133 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4134 mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4135 mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4136 irdma_free_rsrc(rf, rf->allocated_mcgs,
4137 mc_qht_elem->mc_grp_ctx.mg_id);
4138 kfree(mc_qht_elem);
4139 } else {
4140 spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4141 ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4142 IRDMA_OP_MC_MODIFY);
4143 if (ret) {
4144 ibdev_dbg(&iwdev->ibdev,
4145 "VERBS: failed Modify MCG\n");
4146 return ret;
4147 }
4148 }
4149
4150 return 0;
4151 }
4152
4153 /**
4154 * irdma_create_ah - create address handle
4155 * @ibah: address handle
4156 * @attr: address handle attributes
4157 * @udata: User data
4158 *
4159 * returns 0 on success, error otherwise
4160 */
irdma_create_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr,struct ib_udata * udata)4161 static int irdma_create_ah(struct ib_ah *ibah,
4162 struct rdma_ah_init_attr *attr,
4163 struct ib_udata *udata)
4164 {
4165 struct irdma_pd *pd = to_iwpd(ibah->pd);
4166 struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
4167 struct rdma_ah_attr *ah_attr = attr->ah_attr;
4168 const struct ib_gid_attr *sgid_attr;
4169 struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
4170 struct irdma_pci_f *rf = iwdev->rf;
4171 struct irdma_sc_ah *sc_ah;
4172 u32 ah_id = 0;
4173 struct irdma_ah_info *ah_info;
4174 struct irdma_create_ah_resp uresp;
4175 union {
4176 struct sockaddr saddr;
4177 struct sockaddr_in saddr_in;
4178 struct sockaddr_in6 saddr_in6;
4179 } sgid_addr, dgid_addr;
4180 int err;
4181 u8 dmac[ETH_ALEN];
4182
4183 err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah_id,
4184 &rf->next_ah);
4185 if (err)
4186 return err;
4187
4188 ah->pd = pd;
4189 sc_ah = &ah->sc_ah;
4190 sc_ah->ah_info.ah_idx = ah_id;
4191 sc_ah->ah_info.vsi = &iwdev->vsi;
4192 irdma_sc_init_ah(&rf->sc_dev, sc_ah);
4193 ah->sgid_index = ah_attr->grh.sgid_index;
4194 sgid_attr = ah_attr->grh.sgid_attr;
4195 memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
4196 rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
4197 rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
4198 ah->av.attrs = *ah_attr;
4199 ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
4200 ah->av.sgid_addr.saddr = sgid_addr.saddr;
4201 ah->av.dgid_addr.saddr = dgid_addr.saddr;
4202 ah_info = &sc_ah->ah_info;
4203 ah_info->ah_idx = ah_id;
4204 ah_info->pd_idx = pd->sc_pd.pd_id;
4205 if (ah_attr->ah_flags & IB_AH_GRH) {
4206 ah_info->flow_label = ah_attr->grh.flow_label;
4207 ah_info->hop_ttl = ah_attr->grh.hop_limit;
4208 ah_info->tc_tos = ah_attr->grh.traffic_class;
4209 }
4210
4211 ether_addr_copy(dmac, ah_attr->roce.dmac);
4212 if (rdma_gid_attr_network_type(sgid_attr) == RDMA_NETWORK_IPV4) {
4213 ah_info->ipv4_valid = true;
4214 ah_info->dest_ip_addr[0] =
4215 ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
4216 ah_info->src_ip_addr[0] =
4217 ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4218 ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
4219 ah_info->dest_ip_addr[0]);
4220 if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
4221 ah_info->do_lpbk = true;
4222 irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
4223 }
4224 } else {
4225 irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
4226 dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4227 irdma_copy_ip_ntohl(ah_info->src_ip_addr,
4228 sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4229 ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
4230 ah_info->dest_ip_addr);
4231 if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
4232 ah_info->do_lpbk = true;
4233 irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
4234 }
4235 }
4236
4237 err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
4238 ah_info->mac_addr);
4239 if (err)
4240 goto error;
4241
4242 ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
4243 ah_info->ipv4_valid, dmac);
4244
4245 if (ah_info->dst_arpindex == -1) {
4246 err = -EINVAL;
4247 goto error;
4248 }
4249
4250 if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb)
4251 ah_info->vlan_tag = 0;
4252
4253 if (ah_info->vlan_tag < VLAN_N_VID) {
4254 ah_info->insert_vlan_tag = true;
4255 ah_info->vlan_tag |=
4256 rt_tos2priority(ah_info->tc_tos) << VLAN_PRIO_SHIFT;
4257 }
4258
4259 err = irdma_ah_cqp_op(iwdev->rf, sc_ah, IRDMA_OP_AH_CREATE,
4260 attr->flags & RDMA_CREATE_AH_SLEEPABLE,
4261 irdma_gsi_ud_qp_ah_cb, sc_ah);
4262
4263 if (err) {
4264 ibdev_dbg(&iwdev->ibdev,
4265 "VERBS: CQP-OP Create AH fail");
4266 goto error;
4267 }
4268
4269 if (!(attr->flags & RDMA_CREATE_AH_SLEEPABLE)) {
4270 int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
4271
4272 do {
4273 irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
4274 mdelay(1);
4275 } while (!sc_ah->ah_info.ah_valid && --cnt);
4276
4277 if (!cnt) {
4278 ibdev_dbg(&iwdev->ibdev,
4279 "VERBS: CQP create AH timed out");
4280 err = -ETIMEDOUT;
4281 goto error;
4282 }
4283 }
4284
4285 if (udata) {
4286 uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
4287 err = ib_copy_to_udata(udata, &uresp,
4288 min(sizeof(uresp), udata->outlen));
4289 }
4290 return 0;
4291
4292 error:
4293 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah_id);
4294
4295 return err;
4296 }
4297
4298 /**
4299 * irdma_destroy_ah - Destroy address handle
4300 * @ibah: pointer to address handle
4301 * @ah_flags: flags for sleepable
4302 */
irdma_destroy_ah(struct ib_ah * ibah,u32 ah_flags)4303 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
4304 {
4305 struct irdma_device *iwdev = to_iwdev(ibah->device);
4306 struct irdma_ah *ah = to_iwah(ibah);
4307
4308 irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
4309 false, NULL, ah);
4310
4311 irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
4312 ah->sc_ah.ah_info.ah_idx);
4313
4314 return 0;
4315 }
4316
4317 /**
4318 * irdma_query_ah - Query address handle
4319 * @ibah: pointer to address handle
4320 * @ah_attr: address handle attributes
4321 */
irdma_query_ah(struct ib_ah * ibah,struct rdma_ah_attr * ah_attr)4322 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
4323 {
4324 struct irdma_ah *ah = to_iwah(ibah);
4325
4326 memset(ah_attr, 0, sizeof(*ah_attr));
4327 if (ah->av.attrs.ah_flags & IB_AH_GRH) {
4328 ah_attr->ah_flags = IB_AH_GRH;
4329 ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
4330 ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
4331 ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
4332 ah_attr->grh.sgid_index = ah->sgid_index;
4333 memcpy(&ah_attr->grh.dgid, &ah->dgid,
4334 sizeof(ah_attr->grh.dgid));
4335 }
4336
4337 return 0;
4338 }
4339
irdma_get_link_layer(struct ib_device * ibdev,u32 port_num)4340 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
4341 u32 port_num)
4342 {
4343 return IB_LINK_LAYER_ETHERNET;
4344 }
4345
irdma_mac_to_guid(struct net_device * ndev)4346 static __be64 irdma_mac_to_guid(struct net_device *ndev)
4347 {
4348 unsigned char *mac = ndev->dev_addr;
4349 __be64 guid;
4350 unsigned char *dst = (unsigned char *)&guid;
4351
4352 dst[0] = mac[0] ^ 2;
4353 dst[1] = mac[1];
4354 dst[2] = mac[2];
4355 dst[3] = 0xff;
4356 dst[4] = 0xfe;
4357 dst[5] = mac[3];
4358 dst[6] = mac[4];
4359 dst[7] = mac[5];
4360
4361 return guid;
4362 }
4363
4364 static const struct ib_device_ops irdma_roce_dev_ops = {
4365 .attach_mcast = irdma_attach_mcast,
4366 .create_ah = irdma_create_ah,
4367 .create_user_ah = irdma_create_ah,
4368 .destroy_ah = irdma_destroy_ah,
4369 .detach_mcast = irdma_detach_mcast,
4370 .get_link_layer = irdma_get_link_layer,
4371 .get_port_immutable = irdma_roce_port_immutable,
4372 .modify_qp = irdma_modify_qp_roce,
4373 .query_ah = irdma_query_ah,
4374 .query_pkey = irdma_query_pkey,
4375 };
4376
4377 static const struct ib_device_ops irdma_iw_dev_ops = {
4378 .modify_qp = irdma_modify_qp,
4379 .get_port_immutable = irdma_iw_port_immutable,
4380 .query_gid = irdma_query_gid,
4381 };
4382
4383 static const struct ib_device_ops irdma_dev_ops = {
4384 .owner = THIS_MODULE,
4385 .driver_id = RDMA_DRIVER_IRDMA,
4386 .uverbs_abi_ver = IRDMA_ABI_VER,
4387
4388 .alloc_hw_port_stats = irdma_alloc_hw_port_stats,
4389 .alloc_mr = irdma_alloc_mr,
4390 .alloc_mw = irdma_alloc_mw,
4391 .alloc_pd = irdma_alloc_pd,
4392 .alloc_ucontext = irdma_alloc_ucontext,
4393 .create_cq = irdma_create_cq,
4394 .create_qp = irdma_create_qp,
4395 .dealloc_driver = irdma_ib_dealloc_device,
4396 .dealloc_mw = irdma_dealloc_mw,
4397 .dealloc_pd = irdma_dealloc_pd,
4398 .dealloc_ucontext = irdma_dealloc_ucontext,
4399 .dereg_mr = irdma_dereg_mr,
4400 .destroy_cq = irdma_destroy_cq,
4401 .destroy_qp = irdma_destroy_qp,
4402 .disassociate_ucontext = irdma_disassociate_ucontext,
4403 .get_dev_fw_str = irdma_get_dev_fw_str,
4404 .get_dma_mr = irdma_get_dma_mr,
4405 .get_hw_stats = irdma_get_hw_stats,
4406 .map_mr_sg = irdma_map_mr_sg,
4407 .mmap = irdma_mmap,
4408 .mmap_free = irdma_mmap_free,
4409 .poll_cq = irdma_poll_cq,
4410 .post_recv = irdma_post_recv,
4411 .post_send = irdma_post_send,
4412 .query_device = irdma_query_device,
4413 .query_port = irdma_query_port,
4414 .query_qp = irdma_query_qp,
4415 .reg_user_mr = irdma_reg_user_mr,
4416 .req_notify_cq = irdma_req_notify_cq,
4417 .resize_cq = irdma_resize_cq,
4418 INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
4419 INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
4420 INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
4421 INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
4422 INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
4423 INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
4424 };
4425
4426 /**
4427 * irdma_init_roce_device - initialization of roce rdma device
4428 * @iwdev: irdma device
4429 */
irdma_init_roce_device(struct irdma_device * iwdev)4430 static void irdma_init_roce_device(struct irdma_device *iwdev)
4431 {
4432 iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
4433 iwdev->ibdev.node_guid = irdma_mac_to_guid(iwdev->netdev);
4434 ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
4435 }
4436
4437 /**
4438 * irdma_init_iw_device - initialization of iwarp rdma device
4439 * @iwdev: irdma device
4440 */
irdma_init_iw_device(struct irdma_device * iwdev)4441 static int irdma_init_iw_device(struct irdma_device *iwdev)
4442 {
4443 struct net_device *netdev = iwdev->netdev;
4444
4445 iwdev->ibdev.node_type = RDMA_NODE_RNIC;
4446 ether_addr_copy((u8 *)&iwdev->ibdev.node_guid, netdev->dev_addr);
4447 iwdev->ibdev.ops.iw_add_ref = irdma_qp_add_ref;
4448 iwdev->ibdev.ops.iw_rem_ref = irdma_qp_rem_ref;
4449 iwdev->ibdev.ops.iw_get_qp = irdma_get_qp;
4450 iwdev->ibdev.ops.iw_connect = irdma_connect;
4451 iwdev->ibdev.ops.iw_accept = irdma_accept;
4452 iwdev->ibdev.ops.iw_reject = irdma_reject;
4453 iwdev->ibdev.ops.iw_create_listen = irdma_create_listen;
4454 iwdev->ibdev.ops.iw_destroy_listen = irdma_destroy_listen;
4455 memcpy(iwdev->ibdev.iw_ifname, netdev->name,
4456 sizeof(iwdev->ibdev.iw_ifname));
4457 ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
4458
4459 return 0;
4460 }
4461
4462 /**
4463 * irdma_init_rdma_device - initialization of rdma device
4464 * @iwdev: irdma device
4465 */
irdma_init_rdma_device(struct irdma_device * iwdev)4466 static int irdma_init_rdma_device(struct irdma_device *iwdev)
4467 {
4468 struct pci_dev *pcidev = iwdev->rf->pcidev;
4469 int ret;
4470
4471 if (iwdev->roce_mode) {
4472 irdma_init_roce_device(iwdev);
4473 } else {
4474 ret = irdma_init_iw_device(iwdev);
4475 if (ret)
4476 return ret;
4477 }
4478 iwdev->ibdev.phys_port_cnt = 1;
4479 iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
4480 iwdev->ibdev.dev.parent = &pcidev->dev;
4481 ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
4482
4483 return 0;
4484 }
4485
4486 /**
4487 * irdma_port_ibevent - indicate port event
4488 * @iwdev: irdma device
4489 */
irdma_port_ibevent(struct irdma_device * iwdev)4490 void irdma_port_ibevent(struct irdma_device *iwdev)
4491 {
4492 struct ib_event event;
4493
4494 event.device = &iwdev->ibdev;
4495 event.element.port_num = 1;
4496 event.event =
4497 iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
4498 ib_dispatch_event(&event);
4499 }
4500
4501 /**
4502 * irdma_ib_unregister_device - unregister rdma device from IB
4503 * core
4504 * @iwdev: irdma device
4505 */
irdma_ib_unregister_device(struct irdma_device * iwdev)4506 void irdma_ib_unregister_device(struct irdma_device *iwdev)
4507 {
4508 iwdev->iw_status = 0;
4509 irdma_port_ibevent(iwdev);
4510 ib_unregister_device(&iwdev->ibdev);
4511 }
4512
4513 /**
4514 * irdma_ib_register_device - register irdma device to IB core
4515 * @iwdev: irdma device
4516 */
irdma_ib_register_device(struct irdma_device * iwdev)4517 int irdma_ib_register_device(struct irdma_device *iwdev)
4518 {
4519 int ret;
4520
4521 ret = irdma_init_rdma_device(iwdev);
4522 if (ret)
4523 return ret;
4524
4525 ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
4526 if (ret)
4527 goto error;
4528 dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
4529 ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
4530 if (ret)
4531 goto error;
4532
4533 iwdev->iw_status = 1;
4534 irdma_port_ibevent(iwdev);
4535
4536 return 0;
4537
4538 error:
4539 if (ret)
4540 ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
4541
4542 return ret;
4543 }
4544
4545 /**
4546 * irdma_ib_dealloc_device
4547 * @ibdev: ib device
4548 *
4549 * callback from ibdev dealloc_driver to deallocate resources
4550 * unber irdma device
4551 */
irdma_ib_dealloc_device(struct ib_device * ibdev)4552 void irdma_ib_dealloc_device(struct ib_device *ibdev)
4553 {
4554 struct irdma_device *iwdev = to_iwdev(ibdev);
4555
4556 irdma_rt_deinit_hw(iwdev);
4557 irdma_ctrl_deinit_hw(iwdev->rf);
4558 kfree(iwdev->rf);
4559 }
4560