1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Microchip PolarFire SoC (MPFS) system controller/mailbox controller driver
4 *
5 * Copyright (c) 2020-2022 Microchip Corporation. All rights reserved.
6 *
7 * Author: Conor Dooley <conor.dooley@microchip.com>
8 *
9 */
10
11 #include <linux/io.h>
12 #include <linux/err.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/interrupt.h>
17 #include <linux/platform_device.h>
18 #include <linux/mailbox_controller.h>
19 #include <soc/microchip/mpfs.h>
20
21 #define SERVICES_CR_OFFSET 0x50u
22 #define SERVICES_SR_OFFSET 0x54u
23 #define MAILBOX_REG_OFFSET 0x800u
24 #define MSS_SYS_MAILBOX_DATA_OFFSET 0u
25 #define SCB_MASK_WIDTH 16u
26
27 /* SCBCTRL service control register */
28
29 #define SCB_CTRL_REQ (0)
30 #define SCB_CTRL_REQ_MASK BIT(SCB_CTRL_REQ)
31
32 #define SCB_CTRL_BUSY (1)
33 #define SCB_CTRL_BUSY_MASK BIT(SCB_CTRL_BUSY)
34
35 #define SCB_CTRL_ABORT (2)
36 #define SCB_CTRL_ABORT_MASK BIT(SCB_CTRL_ABORT)
37
38 #define SCB_CTRL_NOTIFY (3)
39 #define SCB_CTRL_NOTIFY_MASK BIT(SCB_CTRL_NOTIFY)
40
41 #define SCB_CTRL_POS (16)
42 #define SCB_CTRL_MASK GENMASK_ULL(SCB_CTRL_POS + SCB_MASK_WIDTH, SCB_CTRL_POS)
43
44 /* SCBCTRL service status register */
45
46 #define SCB_STATUS_REQ (0)
47 #define SCB_STATUS_REQ_MASK BIT(SCB_STATUS_REQ)
48
49 #define SCB_STATUS_BUSY (1)
50 #define SCB_STATUS_BUSY_MASK BIT(SCB_STATUS_BUSY)
51
52 #define SCB_STATUS_ABORT (2)
53 #define SCB_STATUS_ABORT_MASK BIT(SCB_STATUS_ABORT)
54
55 #define SCB_STATUS_NOTIFY (3)
56 #define SCB_STATUS_NOTIFY_MASK BIT(SCB_STATUS_NOTIFY)
57
58 #define SCB_STATUS_POS (16)
59 #define SCB_STATUS_MASK GENMASK(SCB_STATUS_POS + SCB_MASK_WIDTH - 1, SCB_STATUS_POS)
60
61 struct mpfs_mbox {
62 struct mbox_controller controller;
63 struct device *dev;
64 int irq;
65 void __iomem *ctrl_base;
66 void __iomem *mbox_base;
67 void __iomem *int_reg;
68 struct mbox_chan chans[1];
69 struct mpfs_mss_response *response;
70 u16 resp_offset;
71 };
72
mpfs_mbox_busy(struct mpfs_mbox * mbox)73 static bool mpfs_mbox_busy(struct mpfs_mbox *mbox)
74 {
75 u32 status;
76
77 status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
78
79 return status & SCB_STATUS_BUSY_MASK;
80 }
81
mpfs_mbox_last_tx_done(struct mbox_chan * chan)82 static bool mpfs_mbox_last_tx_done(struct mbox_chan *chan)
83 {
84 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
85
86 return !mpfs_mbox_busy(mbox);
87 }
88
mpfs_mbox_send_data(struct mbox_chan * chan,void * data)89 static int mpfs_mbox_send_data(struct mbox_chan *chan, void *data)
90 {
91 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
92 struct mpfs_mss_msg *msg = data;
93 u32 tx_trigger;
94 u16 opt_sel;
95 u32 val = 0u;
96
97 mbox->response = msg->response;
98 mbox->resp_offset = msg->resp_offset;
99
100 if (mpfs_mbox_busy(mbox))
101 return -EBUSY;
102
103 if (msg->cmd_data_size) {
104 u32 index;
105 u8 extra_bits = msg->cmd_data_size & 3;
106 u32 *word_buf = (u32 *)msg->cmd_data;
107
108 for (index = 0; index < (msg->cmd_data_size / 4); index++)
109 writel_relaxed(word_buf[index],
110 mbox->mbox_base + msg->mbox_offset + index * 0x4);
111 if (extra_bits) {
112 u8 i;
113 u8 byte_off = ALIGN_DOWN(msg->cmd_data_size, 4);
114 u8 *byte_buf = msg->cmd_data + byte_off;
115
116 val = readl_relaxed(mbox->mbox_base + msg->mbox_offset + index * 0x4);
117
118 for (i = 0u; i < extra_bits; i++) {
119 val &= ~(0xffu << (i * 8u));
120 val |= (byte_buf[i] << (i * 8u));
121 }
122
123 writel_relaxed(val, mbox->mbox_base + msg->mbox_offset + index * 0x4);
124 }
125 }
126
127 opt_sel = ((msg->mbox_offset << 7u) | (msg->cmd_opcode & 0x7fu));
128 tx_trigger = (opt_sel << SCB_CTRL_POS) & SCB_CTRL_MASK;
129 tx_trigger |= SCB_CTRL_REQ_MASK | SCB_STATUS_NOTIFY_MASK;
130 writel_relaxed(tx_trigger, mbox->ctrl_base + SERVICES_CR_OFFSET);
131
132 return 0;
133 }
134
mpfs_mbox_rx_data(struct mbox_chan * chan)135 static void mpfs_mbox_rx_data(struct mbox_chan *chan)
136 {
137 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
138 struct mpfs_mss_response *response = mbox->response;
139 u16 num_words = ALIGN((response->resp_size), (4)) / 4U;
140 u32 i, status;
141
142 if (!response->resp_msg) {
143 dev_err(mbox->dev, "failed to assign memory for response %d\n", -ENOMEM);
144 return;
145 }
146
147 /*
148 * The status is stored in bits 31:16 of the SERVICES_SR register.
149 * It is only valid when BUSY == 0.
150 * We should *never* get an interrupt while the controller is
151 * still in the busy state. If we do, something has gone badly
152 * wrong & the content of the mailbox would not be valid.
153 */
154 if (mpfs_mbox_busy(mbox)) {
155 dev_err(mbox->dev, "got an interrupt but system controller is busy\n");
156 response->resp_status = 0xDEAD;
157 return;
158 }
159
160 status = readl_relaxed(mbox->ctrl_base + SERVICES_SR_OFFSET);
161
162 /*
163 * If the status of the individual servers is non-zero, the service has
164 * failed. The contents of the mailbox at this point are not be valid,
165 * so don't bother reading them. Set the status so that the driver
166 * implementing the service can handle the result.
167 */
168 response->resp_status = (status & SCB_STATUS_MASK) >> SCB_STATUS_POS;
169 if (response->resp_status)
170 return;
171
172 if (!mpfs_mbox_busy(mbox)) {
173 for (i = 0; i < num_words; i++) {
174 response->resp_msg[i] =
175 readl_relaxed(mbox->mbox_base
176 + mbox->resp_offset + i * 0x4);
177 }
178 }
179
180 mbox_chan_received_data(chan, response);
181 }
182
mpfs_mbox_inbox_isr(int irq,void * data)183 static irqreturn_t mpfs_mbox_inbox_isr(int irq, void *data)
184 {
185 struct mbox_chan *chan = data;
186 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
187
188 writel_relaxed(0, mbox->int_reg);
189
190 mpfs_mbox_rx_data(chan);
191
192 return IRQ_HANDLED;
193 }
194
mpfs_mbox_startup(struct mbox_chan * chan)195 static int mpfs_mbox_startup(struct mbox_chan *chan)
196 {
197 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
198 int ret = 0;
199
200 if (!mbox)
201 return -EINVAL;
202
203 ret = devm_request_irq(mbox->dev, mbox->irq, mpfs_mbox_inbox_isr, 0, "mpfs-mailbox", chan);
204 if (ret)
205 dev_err(mbox->dev, "failed to register mailbox interrupt:%d\n", ret);
206
207 return ret;
208 }
209
mpfs_mbox_shutdown(struct mbox_chan * chan)210 static void mpfs_mbox_shutdown(struct mbox_chan *chan)
211 {
212 struct mpfs_mbox *mbox = (struct mpfs_mbox *)chan->con_priv;
213
214 devm_free_irq(mbox->dev, mbox->irq, chan);
215 }
216
217 static const struct mbox_chan_ops mpfs_mbox_ops = {
218 .send_data = mpfs_mbox_send_data,
219 .startup = mpfs_mbox_startup,
220 .shutdown = mpfs_mbox_shutdown,
221 .last_tx_done = mpfs_mbox_last_tx_done,
222 };
223
mpfs_mbox_probe(struct platform_device * pdev)224 static int mpfs_mbox_probe(struct platform_device *pdev)
225 {
226 struct mpfs_mbox *mbox;
227 struct resource *regs;
228 int ret;
229
230 mbox = devm_kzalloc(&pdev->dev, sizeof(*mbox), GFP_KERNEL);
231 if (!mbox)
232 return -ENOMEM;
233
234 mbox->ctrl_base = devm_platform_get_and_ioremap_resource(pdev, 0, ®s);
235 if (IS_ERR(mbox->ctrl_base))
236 return PTR_ERR(mbox->ctrl_base);
237
238 mbox->int_reg = devm_platform_get_and_ioremap_resource(pdev, 1, ®s);
239 if (IS_ERR(mbox->int_reg))
240 return PTR_ERR(mbox->int_reg);
241
242 mbox->mbox_base = devm_platform_get_and_ioremap_resource(pdev, 2, ®s);
243 if (IS_ERR(mbox->mbox_base)) // account for the old dt-binding w/ 2 regs
244 mbox->mbox_base = mbox->ctrl_base + MAILBOX_REG_OFFSET;
245
246 mbox->irq = platform_get_irq(pdev, 0);
247 if (mbox->irq < 0)
248 return mbox->irq;
249
250 mbox->dev = &pdev->dev;
251
252 mbox->chans[0].con_priv = mbox;
253 mbox->controller.dev = mbox->dev;
254 mbox->controller.num_chans = 1;
255 mbox->controller.chans = mbox->chans;
256 mbox->controller.ops = &mpfs_mbox_ops;
257 mbox->controller.txdone_poll = true;
258 mbox->controller.txpoll_period = 10u;
259
260 ret = devm_mbox_controller_register(&pdev->dev, &mbox->controller);
261 if (ret) {
262 dev_err(&pdev->dev, "Registering MPFS mailbox controller failed\n");
263 return ret;
264 }
265 dev_info(&pdev->dev, "Registered MPFS mailbox controller driver\n");
266
267 return 0;
268 }
269
270 static const struct of_device_id mpfs_mbox_of_match[] = {
271 {.compatible = "microchip,mpfs-mailbox", },
272 {},
273 };
274 MODULE_DEVICE_TABLE(of, mpfs_mbox_of_match);
275
276 static struct platform_driver mpfs_mbox_driver = {
277 .driver = {
278 .name = "mpfs-mailbox",
279 .of_match_table = mpfs_mbox_of_match,
280 },
281 .probe = mpfs_mbox_probe,
282 };
283 module_platform_driver(mpfs_mbox_driver);
284
285 MODULE_LICENSE("GPL v2");
286 MODULE_AUTHOR("Conor Dooley <conor.dooley@microchip.com>");
287 MODULE_DESCRIPTION("MPFS mailbox controller driver");
288