1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
3
4 #include <linux/timer.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/if_vlan.h>
12 #include <linux/phylink.h>
13 #include <linux/dim.h>
14
15 #include "enetc_hw.h"
16
17 #define ENETC_MAC_MAXFRM_SIZE 9600
18 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
19 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
20
21 struct enetc_tx_swbd {
22 union {
23 struct sk_buff *skb;
24 struct xdp_frame *xdp_frame;
25 };
26 dma_addr_t dma;
27 struct page *page; /* valid only if is_xdp_tx */
28 u16 page_offset; /* valid only if is_xdp_tx */
29 u16 len;
30 enum dma_data_direction dir;
31 u8 is_dma_page:1;
32 u8 check_wb:1;
33 u8 do_twostep_tstamp:1;
34 u8 is_eof:1;
35 u8 is_xdp_tx:1;
36 u8 is_xdp_redirect:1;
37 };
38
39 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
40 #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
41 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
42 #define ENETC_RXB_DMA_SIZE \
43 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
44 #define ENETC_RXB_DMA_SIZE_XDP \
45 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM)
46
47 struct enetc_rx_swbd {
48 dma_addr_t dma;
49 struct page *page;
50 u16 page_offset;
51 enum dma_data_direction dir;
52 u16 len;
53 };
54
55 /* ENETC overhead: optional extension BD + 1 BD gap */
56 #define ENETC_TXBDS_NEEDED(val) ((val) + 2)
57 /* max # of chained Tx BDs is 15, including head and extension BD */
58 #define ENETC_MAX_SKB_FRAGS 13
59 #define ENETC_TXBDS_MAX_NEEDED ENETC_TXBDS_NEEDED(ENETC_MAX_SKB_FRAGS + 1)
60
61 struct enetc_ring_stats {
62 unsigned int packets;
63 unsigned int bytes;
64 unsigned int rx_alloc_errs;
65 unsigned int xdp_drops;
66 unsigned int xdp_tx;
67 unsigned int xdp_tx_drops;
68 unsigned int xdp_redirect;
69 unsigned int xdp_redirect_failures;
70 unsigned int xdp_redirect_sg;
71 unsigned int recycles;
72 unsigned int recycle_failures;
73 };
74
75 struct enetc_xdp_data {
76 struct xdp_rxq_info rxq;
77 struct bpf_prog *prog;
78 int xdp_tx_in_flight;
79 };
80
81 #define ENETC_RX_RING_DEFAULT_SIZE 2048
82 #define ENETC_TX_RING_DEFAULT_SIZE 2048
83 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2)
84
85 struct enetc_bdr {
86 struct device *dev; /* for DMA mapping */
87 struct net_device *ndev;
88 void *bd_base; /* points to Rx or Tx BD ring */
89 union {
90 void __iomem *tpir;
91 void __iomem *rcir;
92 };
93 u16 index;
94 u16 prio;
95 int bd_count; /* # of BDs */
96 int next_to_use;
97 int next_to_clean;
98 union {
99 struct enetc_tx_swbd *tx_swbd;
100 struct enetc_rx_swbd *rx_swbd;
101 };
102 union {
103 void __iomem *tcir; /* Tx */
104 int next_to_alloc; /* Rx */
105 };
106 void __iomem *idr; /* Interrupt Detect Register pointer */
107
108 int buffer_offset;
109 struct enetc_xdp_data xdp;
110
111 struct enetc_ring_stats stats;
112
113 dma_addr_t bd_dma_base;
114 u8 tsd_enable; /* Time specific departure */
115 bool ext_en; /* enable h/w descriptor extensions */
116 } ____cacheline_aligned_in_smp;
117
enetc_bdr_idx_inc(struct enetc_bdr * bdr,int * i)118 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
119 {
120 if (unlikely(++*i == bdr->bd_count))
121 *i = 0;
122 }
123
enetc_bd_unused(struct enetc_bdr * bdr)124 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
125 {
126 if (bdr->next_to_clean > bdr->next_to_use)
127 return bdr->next_to_clean - bdr->next_to_use - 1;
128
129 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
130 }
131
enetc_swbd_unused(struct enetc_bdr * bdr)132 static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
133 {
134 if (bdr->next_to_clean > bdr->next_to_alloc)
135 return bdr->next_to_clean - bdr->next_to_alloc - 1;
136
137 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
138 }
139
140 /* Control BD ring */
141 #define ENETC_CBDR_DEFAULT_SIZE 64
142 struct enetc_cbdr {
143 void *bd_base; /* points to Rx or Tx BD ring */
144 void __iomem *pir;
145 void __iomem *cir;
146 void __iomem *mr; /* mode register */
147
148 int bd_count; /* # of BDs */
149 int next_to_use;
150 int next_to_clean;
151
152 dma_addr_t bd_dma_base;
153 struct device *dma_dev;
154 };
155
156 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
157
enetc_rxbd(struct enetc_bdr * rx_ring,int i)158 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
159 {
160 int hw_idx = i;
161
162 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
163 if (rx_ring->ext_en)
164 hw_idx = 2 * i;
165 #endif
166 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
167 }
168
enetc_rxbd_next(struct enetc_bdr * rx_ring,union enetc_rx_bd ** old_rxbd,int * old_index)169 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
170 union enetc_rx_bd **old_rxbd, int *old_index)
171 {
172 union enetc_rx_bd *new_rxbd = *old_rxbd;
173 int new_index = *old_index;
174
175 new_rxbd++;
176
177 #ifdef CONFIG_FSL_ENETC_PTP_CLOCK
178 if (rx_ring->ext_en)
179 new_rxbd++;
180 #endif
181
182 if (unlikely(++new_index == rx_ring->bd_count)) {
183 new_rxbd = rx_ring->bd_base;
184 new_index = 0;
185 }
186
187 *old_rxbd = new_rxbd;
188 *old_index = new_index;
189 }
190
enetc_rxbd_ext(union enetc_rx_bd * rxbd)191 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
192 {
193 return ++rxbd;
194 }
195
196 struct enetc_msg_swbd {
197 void *vaddr;
198 dma_addr_t dma;
199 int size;
200 };
201
202 #define ENETC_REV1 0x1
203 enum enetc_errata {
204 ENETC_ERR_VLAN_ISOL = BIT(0),
205 ENETC_ERR_UCMCSWP = BIT(1),
206 };
207
208 #define ENETC_SI_F_QBV BIT(0)
209 #define ENETC_SI_F_PSFP BIT(1)
210
211 /* PCI IEP device data */
212 struct enetc_si {
213 struct pci_dev *pdev;
214 struct enetc_hw hw;
215 enum enetc_errata errata;
216
217 struct net_device *ndev; /* back ref. */
218
219 struct enetc_cbdr cbd_ring;
220
221 int num_rx_rings; /* how many rings are available in the SI */
222 int num_tx_rings;
223 int num_fs_entries;
224 int num_rss; /* number of RSS buckets */
225 unsigned short pad;
226 int hw_features;
227 };
228
229 #define ENETC_SI_ALIGN 32
230
enetc_si_priv(const struct enetc_si * si)231 static inline void *enetc_si_priv(const struct enetc_si *si)
232 {
233 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
234 }
235
enetc_si_is_pf(struct enetc_si * si)236 static inline bool enetc_si_is_pf(struct enetc_si *si)
237 {
238 return !!(si->hw.port);
239 }
240
enetc_pf_to_port(struct pci_dev * pf_pdev)241 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
242 {
243 switch (pf_pdev->devfn) {
244 case 0:
245 return 0;
246 case 1:
247 return 1;
248 case 2:
249 return 2;
250 case 6:
251 return 3;
252 default:
253 return -1;
254 }
255 }
256
257 #define ENETC_MAX_NUM_TXQS 8
258 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
259
260 struct enetc_int_vector {
261 void __iomem *rbier;
262 void __iomem *tbier_base;
263 void __iomem *ricr1;
264 unsigned long tx_rings_map;
265 int count_tx_rings;
266 u32 rx_ictt;
267 u16 comp_cnt;
268 bool rx_dim_en, rx_napi_work;
269 struct napi_struct napi ____cacheline_aligned_in_smp;
270 struct dim rx_dim ____cacheline_aligned_in_smp;
271 char name[ENETC_INT_NAME_MAX];
272
273 struct enetc_bdr rx_ring;
274 struct enetc_bdr tx_ring[];
275 } ____cacheline_aligned_in_smp;
276
277 struct enetc_cls_rule {
278 struct ethtool_rx_flow_spec fs;
279 int used;
280 };
281
282 #define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */
283 struct psfp_cap {
284 u32 max_streamid;
285 u32 max_psfp_filter;
286 u32 max_psfp_gate;
287 u32 max_psfp_gatelist;
288 u32 max_psfp_meter;
289 };
290
291 #define ENETC_F_TX_TSTAMP_MASK 0xff
292 /* TODO: more hardware offloads */
293 enum enetc_active_offloads {
294 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
295 ENETC_F_TX_TSTAMP = BIT(0),
296 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1),
297
298 ENETC_F_RX_TSTAMP = BIT(8),
299 ENETC_F_QBV = BIT(9),
300 ENETC_F_QCI = BIT(10),
301 };
302
303 enum enetc_flags_bit {
304 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
305 };
306
307 /* interrupt coalescing modes */
308 enum enetc_ic_mode {
309 /* one interrupt per frame */
310 ENETC_IC_NONE = 0,
311 /* activated when int coalescing time is set to a non-0 value */
312 ENETC_IC_RX_MANUAL = BIT(0),
313 ENETC_IC_TX_MANUAL = BIT(1),
314 /* use dynamic interrupt moderation */
315 ENETC_IC_RX_ADAPTIVE = BIT(2),
316 };
317
318 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
319 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
320 #define ENETC_TXIC_TIMETHR enetc_usecs_to_cycles(600)
321
322 struct enetc_ndev_priv {
323 struct net_device *ndev;
324 struct device *dev; /* dma-mapping device */
325 struct enetc_si *si;
326
327 int bdr_int_num; /* number of Rx/Tx ring interrupts */
328 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
329 u16 num_rx_rings, num_tx_rings;
330 u16 rx_bd_count, tx_bd_count;
331
332 u16 msg_enable;
333 enum enetc_active_offloads active_offloads;
334
335 u32 speed; /* store speed for compare update pspeed */
336
337 struct enetc_bdr **xdp_tx_ring;
338 struct enetc_bdr *tx_ring[16];
339 struct enetc_bdr *rx_ring[16];
340
341 struct enetc_cls_rule *cls_rules;
342
343 struct psfp_cap psfp_cap;
344
345 struct phylink *phylink;
346 int ic_mode;
347 u32 tx_ictt;
348
349 struct bpf_prog *xdp_prog;
350
351 unsigned long flags;
352
353 struct work_struct tx_onestep_tstamp;
354 struct sk_buff_head tx_skbs;
355 };
356
357 /* Messaging */
358
359 /* VF-PF set primary MAC address message format */
360 struct enetc_msg_cmd_set_primary_mac {
361 struct enetc_msg_cmd_header header;
362 struct sockaddr mac;
363 };
364
365 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
366
367 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */
368
369 /* PTP driver exports */
370 extern int enetc_phc_index;
371
372 /* SI common */
373 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
374 void enetc_pci_remove(struct pci_dev *pdev);
375 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
376 void enetc_free_msix(struct enetc_ndev_priv *priv);
377 void enetc_get_si_caps(struct enetc_si *si);
378 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
379 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
380 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
381 int enetc_configure_si(struct enetc_ndev_priv *priv);
382
383 int enetc_open(struct net_device *ndev);
384 int enetc_close(struct net_device *ndev);
385 void enetc_start(struct net_device *ndev);
386 void enetc_stop(struct net_device *ndev);
387 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
388 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
389 void enetc_set_features(struct net_device *ndev, netdev_features_t features);
390 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
391 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
392 int enetc_setup_bpf(struct net_device *dev, struct netdev_bpf *xdp);
393 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
394 struct xdp_frame **frames, u32 flags);
395
396 /* ethtool */
397 void enetc_set_ethtool_ops(struct net_device *ndev);
398
399 /* control buffer descriptor ring (CBDR) */
400 int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count,
401 struct enetc_cbdr *cbdr);
402 void enetc_teardown_cbdr(struct enetc_cbdr *cbdr);
403 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
404 char *mac_addr, int si_map);
405 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
406 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
407 int index);
408 void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
409 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
410 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
411 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
412
413 #ifdef CONFIG_FSL_ENETC_QOS
414 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
415 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
416 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
417 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
418 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
419 void *cb_priv);
420 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
421 int enetc_psfp_init(struct enetc_ndev_priv *priv);
422 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
423 int enetc_set_psfp(struct net_device *ndev, bool en);
424
enetc_get_max_cap(struct enetc_ndev_priv * priv)425 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
426 {
427 struct enetc_hw *hw = &priv->si->hw;
428 u32 reg;
429
430 reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
431 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
432 /* Port stream filter capability */
433 reg = enetc_port_rd(hw, ENETC_PSFCAPR);
434 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
435 /* Port stream gate capability */
436 reg = enetc_port_rd(hw, ENETC_PSGCAPR);
437 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
438 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
439 /* Port flow meter capability */
440 reg = enetc_port_rd(hw, ENETC_PFMCAPR);
441 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
442 }
443
enetc_psfp_enable(struct enetc_ndev_priv * priv)444 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
445 {
446 struct enetc_hw *hw = &priv->si->hw;
447 int err;
448
449 enetc_get_max_cap(priv);
450
451 err = enetc_psfp_init(priv);
452 if (err)
453 return err;
454
455 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
456 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
457 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
458
459 return 0;
460 }
461
enetc_psfp_disable(struct enetc_ndev_priv * priv)462 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
463 {
464 struct enetc_hw *hw = &priv->si->hw;
465 int err;
466
467 err = enetc_psfp_clean(priv);
468 if (err)
469 return err;
470
471 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
472 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
473 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
474
475 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
476
477 return 0;
478 }
479
480 #else
481 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
482 #define enetc_sched_speed_set(priv, speed) (void)0
483 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
484 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
485 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
486 #define enetc_setup_tc_block_cb NULL
487
488 #define enetc_get_max_cap(p) \
489 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
490
enetc_psfp_enable(struct enetc_ndev_priv * priv)491 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
492 {
493 return 0;
494 }
495
enetc_psfp_disable(struct enetc_ndev_priv * priv)496 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
497 {
498 return 0;
499 }
500
enetc_set_psfp(struct net_device * ndev,bool en)501 static inline int enetc_set_psfp(struct net_device *ndev, bool en)
502 {
503 return 0;
504 }
505 #endif
506