1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* QLogic qede NIC Driver
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2020 Marvell International Ltd.
5 */
6
7 #include <linux/crash_dump.h>
8 #include <linux/module.h>
9 #include <linux/pci.h>
10 #include <linux/device.h>
11 #include <linux/netdevice.h>
12 #include <linux/etherdevice.h>
13 #include <linux/skbuff.h>
14 #include <linux/errno.h>
15 #include <linux/list.h>
16 #include <linux/string.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/interrupt.h>
19 #include <asm/byteorder.h>
20 #include <asm/param.h>
21 #include <linux/io.h>
22 #include <linux/netdev_features.h>
23 #include <linux/udp.h>
24 #include <linux/tcp.h>
25 #include <net/udp_tunnel.h>
26 #include <linux/ip.h>
27 #include <net/ipv6.h>
28 #include <net/tcp.h>
29 #include <linux/if_ether.h>
30 #include <linux/if_vlan.h>
31 #include <linux/pkt_sched.h>
32 #include <linux/ethtool.h>
33 #include <linux/in.h>
34 #include <linux/random.h>
35 #include <net/ip6_checksum.h>
36 #include <linux/bitops.h>
37 #include <linux/vmalloc.h>
38 #include <linux/aer.h>
39 #include "qede.h"
40 #include "qede_ptp.h"
41
42 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
43 MODULE_LICENSE("GPL");
44
45 static uint debug;
46 module_param(debug, uint, 0);
47 MODULE_PARM_DESC(debug, " Default debug msglevel");
48
49 static const struct qed_eth_ops *qed_ops;
50
51 #define CHIP_NUM_57980S_40 0x1634
52 #define CHIP_NUM_57980S_10 0x1666
53 #define CHIP_NUM_57980S_MF 0x1636
54 #define CHIP_NUM_57980S_100 0x1644
55 #define CHIP_NUM_57980S_50 0x1654
56 #define CHIP_NUM_57980S_25 0x1656
57 #define CHIP_NUM_57980S_IOV 0x1664
58 #define CHIP_NUM_AH 0x8070
59 #define CHIP_NUM_AH_IOV 0x8090
60
61 #ifndef PCI_DEVICE_ID_NX2_57980E
62 #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
63 #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
64 #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
65 #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
66 #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
67 #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
68 #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
69 #define PCI_DEVICE_ID_AH CHIP_NUM_AH
70 #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
71
72 #endif
73
74 enum qede_pci_private {
75 QEDE_PRIVATE_PF,
76 QEDE_PRIVATE_VF
77 };
78
79 static const struct pci_device_id qede_pci_tbl[] = {
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
85 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
86 #ifdef CONFIG_QED_SRIOV
87 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
88 #endif
89 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
90 #ifdef CONFIG_QED_SRIOV
91 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
92 #endif
93 { 0 }
94 };
95
96 MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
97
98 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
99 static pci_ers_result_t
100 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state);
101
102 #define TX_TIMEOUT (5 * HZ)
103
104 /* Utilize last protocol index for XDP */
105 #define XDP_PI 11
106
107 static void qede_remove(struct pci_dev *pdev);
108 static void qede_shutdown(struct pci_dev *pdev);
109 static void qede_link_update(void *dev, struct qed_link_output *link);
110 static void qede_schedule_recovery_handler(void *dev);
111 static void qede_recovery_handler(struct qede_dev *edev);
112 static void qede_schedule_hw_err_handler(void *dev,
113 enum qed_hw_err_type err_type);
114 static void qede_get_eth_tlv_data(void *edev, void *data);
115 static void qede_get_generic_tlv_data(void *edev,
116 struct qed_generic_tlvs *data);
117 static void qede_generic_hw_err_handler(struct qede_dev *edev);
118 #ifdef CONFIG_QED_SRIOV
qede_set_vf_vlan(struct net_device * ndev,int vf,u16 vlan,u8 qos,__be16 vlan_proto)119 static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
120 __be16 vlan_proto)
121 {
122 struct qede_dev *edev = netdev_priv(ndev);
123
124 if (vlan > 4095) {
125 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
126 return -EINVAL;
127 }
128
129 if (vlan_proto != htons(ETH_P_8021Q))
130 return -EPROTONOSUPPORT;
131
132 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
133 vlan, vf);
134
135 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
136 }
137
qede_set_vf_mac(struct net_device * ndev,int vfidx,u8 * mac)138 static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
139 {
140 struct qede_dev *edev = netdev_priv(ndev);
141
142 DP_VERBOSE(edev, QED_MSG_IOV, "Setting MAC %pM to VF [%d]\n", mac, vfidx);
143
144 if (!is_valid_ether_addr(mac)) {
145 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
146 return -EINVAL;
147 }
148
149 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
150 }
151
qede_sriov_configure(struct pci_dev * pdev,int num_vfs_param)152 static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
153 {
154 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
155 struct qed_dev_info *qed_info = &edev->dev_info.common;
156 struct qed_update_vport_params *vport_params;
157 int rc;
158
159 vport_params = vzalloc(sizeof(*vport_params));
160 if (!vport_params)
161 return -ENOMEM;
162 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
163
164 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
165
166 /* Enable/Disable Tx switching for PF */
167 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
168 !qed_info->b_inter_pf_switch && qed_info->tx_switching) {
169 vport_params->vport_id = 0;
170 vport_params->update_tx_switching_flg = 1;
171 vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
172 edev->ops->vport_update(edev->cdev, vport_params);
173 }
174
175 vfree(vport_params);
176 return rc;
177 }
178 #endif
179
180 static const struct pci_error_handlers qede_err_handler = {
181 .error_detected = qede_io_error_detected,
182 };
183
184 static struct pci_driver qede_pci_driver = {
185 .name = "qede",
186 .id_table = qede_pci_tbl,
187 .probe = qede_probe,
188 .remove = qede_remove,
189 .shutdown = qede_shutdown,
190 #ifdef CONFIG_QED_SRIOV
191 .sriov_configure = qede_sriov_configure,
192 #endif
193 .err_handler = &qede_err_handler,
194 };
195
196 static struct qed_eth_cb_ops qede_ll_ops = {
197 {
198 #ifdef CONFIG_RFS_ACCEL
199 .arfs_filter_op = qede_arfs_filter_op,
200 #endif
201 .link_update = qede_link_update,
202 .schedule_recovery_handler = qede_schedule_recovery_handler,
203 .schedule_hw_err_handler = qede_schedule_hw_err_handler,
204 .get_generic_tlv_data = qede_get_generic_tlv_data,
205 .get_protocol_tlv_data = qede_get_eth_tlv_data,
206 },
207 .force_mac = qede_force_mac,
208 .ports_update = qede_udp_ports_update,
209 };
210
qede_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)211 static int qede_netdev_event(struct notifier_block *this, unsigned long event,
212 void *ptr)
213 {
214 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
215 struct ethtool_drvinfo drvinfo;
216 struct qede_dev *edev;
217
218 if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
219 goto done;
220
221 /* Check whether this is a qede device */
222 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
223 goto done;
224
225 memset(&drvinfo, 0, sizeof(drvinfo));
226 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
227 if (strcmp(drvinfo.driver, "qede"))
228 goto done;
229 edev = netdev_priv(ndev);
230
231 switch (event) {
232 case NETDEV_CHANGENAME:
233 /* Notify qed of the name change */
234 if (!edev->ops || !edev->ops->common)
235 goto done;
236 edev->ops->common->set_name(edev->cdev, edev->ndev->name);
237 break;
238 case NETDEV_CHANGEADDR:
239 edev = netdev_priv(ndev);
240 qede_rdma_event_changeaddr(edev);
241 break;
242 }
243
244 done:
245 return NOTIFY_DONE;
246 }
247
248 static struct notifier_block qede_netdev_notifier = {
249 .notifier_call = qede_netdev_event,
250 };
251
252 static
qede_init(void)253 int __init qede_init(void)
254 {
255 int ret;
256
257 pr_info("qede init: QLogic FastLinQ 4xxxx Ethernet Driver qede\n");
258
259 qede_forced_speed_maps_init();
260
261 qed_ops = qed_get_eth_ops();
262 if (!qed_ops) {
263 pr_notice("Failed to get qed ethtool operations\n");
264 return -EINVAL;
265 }
266
267 /* Must register notifier before pci ops, since we might miss
268 * interface rename after pci probe and netdev registration.
269 */
270 ret = register_netdevice_notifier(&qede_netdev_notifier);
271 if (ret) {
272 pr_notice("Failed to register netdevice_notifier\n");
273 qed_put_eth_ops();
274 return -EINVAL;
275 }
276
277 ret = pci_register_driver(&qede_pci_driver);
278 if (ret) {
279 pr_notice("Failed to register driver\n");
280 unregister_netdevice_notifier(&qede_netdev_notifier);
281 qed_put_eth_ops();
282 return -EINVAL;
283 }
284
285 return 0;
286 }
287
qede_cleanup(void)288 static void __exit qede_cleanup(void)
289 {
290 if (debug & QED_LOG_INFO_MASK)
291 pr_info("qede_cleanup called\n");
292
293 unregister_netdevice_notifier(&qede_netdev_notifier);
294 pci_unregister_driver(&qede_pci_driver);
295 qed_put_eth_ops();
296 }
297
298 module_init(qede_init);
299 module_exit(qede_cleanup);
300
301 static int qede_open(struct net_device *ndev);
302 static int qede_close(struct net_device *ndev);
303
qede_fill_by_demand_stats(struct qede_dev * edev)304 void qede_fill_by_demand_stats(struct qede_dev *edev)
305 {
306 struct qede_stats_common *p_common = &edev->stats.common;
307 struct qed_eth_stats stats;
308
309 edev->ops->get_vport_stats(edev->cdev, &stats);
310
311 spin_lock(&edev->stats_lock);
312
313 p_common->no_buff_discards = stats.common.no_buff_discards;
314 p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
315 p_common->ttl0_discard = stats.common.ttl0_discard;
316 p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
317 p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
318 p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
319 p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
320 p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
321 p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
322 p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
323 p_common->mac_filter_discards = stats.common.mac_filter_discards;
324 p_common->gft_filter_drop = stats.common.gft_filter_drop;
325
326 p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
327 p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
328 p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
329 p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
330 p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
331 p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
332 p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
333 p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
334 p_common->coalesced_events = stats.common.tpa_coalesced_events;
335 p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
336 p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
337 p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
338
339 p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
340 p_common->rx_65_to_127_byte_packets =
341 stats.common.rx_65_to_127_byte_packets;
342 p_common->rx_128_to_255_byte_packets =
343 stats.common.rx_128_to_255_byte_packets;
344 p_common->rx_256_to_511_byte_packets =
345 stats.common.rx_256_to_511_byte_packets;
346 p_common->rx_512_to_1023_byte_packets =
347 stats.common.rx_512_to_1023_byte_packets;
348 p_common->rx_1024_to_1518_byte_packets =
349 stats.common.rx_1024_to_1518_byte_packets;
350 p_common->rx_crc_errors = stats.common.rx_crc_errors;
351 p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
352 p_common->rx_pause_frames = stats.common.rx_pause_frames;
353 p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
354 p_common->rx_align_errors = stats.common.rx_align_errors;
355 p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
356 p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
357 p_common->rx_jabbers = stats.common.rx_jabbers;
358 p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
359 p_common->rx_fragments = stats.common.rx_fragments;
360 p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
361 p_common->tx_65_to_127_byte_packets =
362 stats.common.tx_65_to_127_byte_packets;
363 p_common->tx_128_to_255_byte_packets =
364 stats.common.tx_128_to_255_byte_packets;
365 p_common->tx_256_to_511_byte_packets =
366 stats.common.tx_256_to_511_byte_packets;
367 p_common->tx_512_to_1023_byte_packets =
368 stats.common.tx_512_to_1023_byte_packets;
369 p_common->tx_1024_to_1518_byte_packets =
370 stats.common.tx_1024_to_1518_byte_packets;
371 p_common->tx_pause_frames = stats.common.tx_pause_frames;
372 p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
373 p_common->brb_truncates = stats.common.brb_truncates;
374 p_common->brb_discards = stats.common.brb_discards;
375 p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
376 p_common->link_change_count = stats.common.link_change_count;
377 p_common->ptp_skip_txts = edev->ptp_skip_txts;
378
379 if (QEDE_IS_BB(edev)) {
380 struct qede_stats_bb *p_bb = &edev->stats.bb;
381
382 p_bb->rx_1519_to_1522_byte_packets =
383 stats.bb.rx_1519_to_1522_byte_packets;
384 p_bb->rx_1519_to_2047_byte_packets =
385 stats.bb.rx_1519_to_2047_byte_packets;
386 p_bb->rx_2048_to_4095_byte_packets =
387 stats.bb.rx_2048_to_4095_byte_packets;
388 p_bb->rx_4096_to_9216_byte_packets =
389 stats.bb.rx_4096_to_9216_byte_packets;
390 p_bb->rx_9217_to_16383_byte_packets =
391 stats.bb.rx_9217_to_16383_byte_packets;
392 p_bb->tx_1519_to_2047_byte_packets =
393 stats.bb.tx_1519_to_2047_byte_packets;
394 p_bb->tx_2048_to_4095_byte_packets =
395 stats.bb.tx_2048_to_4095_byte_packets;
396 p_bb->tx_4096_to_9216_byte_packets =
397 stats.bb.tx_4096_to_9216_byte_packets;
398 p_bb->tx_9217_to_16383_byte_packets =
399 stats.bb.tx_9217_to_16383_byte_packets;
400 p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
401 p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
402 } else {
403 struct qede_stats_ah *p_ah = &edev->stats.ah;
404
405 p_ah->rx_1519_to_max_byte_packets =
406 stats.ah.rx_1519_to_max_byte_packets;
407 p_ah->tx_1519_to_max_byte_packets =
408 stats.ah.tx_1519_to_max_byte_packets;
409 }
410
411 spin_unlock(&edev->stats_lock);
412 }
413
qede_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * stats)414 static void qede_get_stats64(struct net_device *dev,
415 struct rtnl_link_stats64 *stats)
416 {
417 struct qede_dev *edev = netdev_priv(dev);
418 struct qede_stats_common *p_common;
419
420 p_common = &edev->stats.common;
421
422 spin_lock(&edev->stats_lock);
423
424 stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
425 p_common->rx_bcast_pkts;
426 stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
427 p_common->tx_bcast_pkts;
428
429 stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
430 p_common->rx_bcast_bytes;
431 stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
432 p_common->tx_bcast_bytes;
433
434 stats->tx_errors = p_common->tx_err_drop_pkts;
435 stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
436
437 stats->rx_fifo_errors = p_common->no_buff_discards;
438
439 if (QEDE_IS_BB(edev))
440 stats->collisions = edev->stats.bb.tx_total_collisions;
441 stats->rx_crc_errors = p_common->rx_crc_errors;
442 stats->rx_frame_errors = p_common->rx_align_errors;
443
444 spin_unlock(&edev->stats_lock);
445 }
446
447 #ifdef CONFIG_QED_SRIOV
qede_get_vf_config(struct net_device * dev,int vfidx,struct ifla_vf_info * ivi)448 static int qede_get_vf_config(struct net_device *dev, int vfidx,
449 struct ifla_vf_info *ivi)
450 {
451 struct qede_dev *edev = netdev_priv(dev);
452
453 if (!edev->ops)
454 return -EINVAL;
455
456 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
457 }
458
qede_set_vf_rate(struct net_device * dev,int vfidx,int min_tx_rate,int max_tx_rate)459 static int qede_set_vf_rate(struct net_device *dev, int vfidx,
460 int min_tx_rate, int max_tx_rate)
461 {
462 struct qede_dev *edev = netdev_priv(dev);
463
464 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
465 max_tx_rate);
466 }
467
qede_set_vf_spoofchk(struct net_device * dev,int vfidx,bool val)468 static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
469 {
470 struct qede_dev *edev = netdev_priv(dev);
471
472 if (!edev->ops)
473 return -EINVAL;
474
475 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
476 }
477
qede_set_vf_link_state(struct net_device * dev,int vfidx,int link_state)478 static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
479 int link_state)
480 {
481 struct qede_dev *edev = netdev_priv(dev);
482
483 if (!edev->ops)
484 return -EINVAL;
485
486 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
487 }
488
qede_set_vf_trust(struct net_device * dev,int vfidx,bool setting)489 static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
490 {
491 struct qede_dev *edev = netdev_priv(dev);
492
493 if (!edev->ops)
494 return -EINVAL;
495
496 return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
497 }
498 #endif
499
qede_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)500 static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
501 {
502 struct qede_dev *edev = netdev_priv(dev);
503
504 if (!netif_running(dev))
505 return -EAGAIN;
506
507 switch (cmd) {
508 case SIOCSHWTSTAMP:
509 return qede_ptp_hw_ts(edev, ifr);
510 default:
511 DP_VERBOSE(edev, QED_MSG_DEBUG,
512 "default IOCTL cmd 0x%x\n", cmd);
513 return -EOPNOTSUPP;
514 }
515
516 return 0;
517 }
518
qede_tx_log_print(struct qede_dev * edev,struct qede_tx_queue * txq)519 static void qede_tx_log_print(struct qede_dev *edev, struct qede_tx_queue *txq)
520 {
521 DP_NOTICE(edev,
522 "Txq[%d]: FW cons [host] %04x, SW cons %04x, SW prod %04x [Jiffies %lu]\n",
523 txq->index, le16_to_cpu(*txq->hw_cons_ptr),
524 qed_chain_get_cons_idx(&txq->tx_pbl),
525 qed_chain_get_prod_idx(&txq->tx_pbl),
526 jiffies);
527 }
528
qede_tx_timeout(struct net_device * dev,unsigned int txqueue)529 static void qede_tx_timeout(struct net_device *dev, unsigned int txqueue)
530 {
531 struct qede_dev *edev = netdev_priv(dev);
532 struct qede_tx_queue *txq;
533 int cos;
534
535 netif_carrier_off(dev);
536 DP_NOTICE(edev, "TX timeout on queue %u!\n", txqueue);
537
538 if (!(edev->fp_array[txqueue].type & QEDE_FASTPATH_TX))
539 return;
540
541 for_each_cos_in_txq(edev, cos) {
542 txq = &edev->fp_array[txqueue].txq[cos];
543
544 if (qed_chain_get_cons_idx(&txq->tx_pbl) !=
545 qed_chain_get_prod_idx(&txq->tx_pbl))
546 qede_tx_log_print(edev, txq);
547 }
548
549 if (IS_VF(edev))
550 return;
551
552 if (test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
553 edev->state == QEDE_STATE_RECOVERY) {
554 DP_INFO(edev,
555 "Avoid handling a Tx timeout while another HW error is being handled\n");
556 return;
557 }
558
559 set_bit(QEDE_ERR_GET_DBG_INFO, &edev->err_flags);
560 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
561 schedule_delayed_work(&edev->sp_task, 0);
562 }
563
qede_setup_tc(struct net_device * ndev,u8 num_tc)564 static int qede_setup_tc(struct net_device *ndev, u8 num_tc)
565 {
566 struct qede_dev *edev = netdev_priv(ndev);
567 int cos, count, offset;
568
569 if (num_tc > edev->dev_info.num_tc)
570 return -EINVAL;
571
572 netdev_reset_tc(ndev);
573 netdev_set_num_tc(ndev, num_tc);
574
575 for_each_cos_in_txq(edev, cos) {
576 count = QEDE_TSS_COUNT(edev);
577 offset = cos * QEDE_TSS_COUNT(edev);
578 netdev_set_tc_queue(ndev, cos, count, offset);
579 }
580
581 return 0;
582 }
583
584 static int
qede_set_flower(struct qede_dev * edev,struct flow_cls_offload * f,__be16 proto)585 qede_set_flower(struct qede_dev *edev, struct flow_cls_offload *f,
586 __be16 proto)
587 {
588 switch (f->command) {
589 case FLOW_CLS_REPLACE:
590 return qede_add_tc_flower_fltr(edev, proto, f);
591 case FLOW_CLS_DESTROY:
592 return qede_delete_flow_filter(edev, f->cookie);
593 default:
594 return -EOPNOTSUPP;
595 }
596 }
597
qede_setup_tc_block_cb(enum tc_setup_type type,void * type_data,void * cb_priv)598 static int qede_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
599 void *cb_priv)
600 {
601 struct flow_cls_offload *f;
602 struct qede_dev *edev = cb_priv;
603
604 if (!tc_cls_can_offload_and_chain0(edev->ndev, type_data))
605 return -EOPNOTSUPP;
606
607 switch (type) {
608 case TC_SETUP_CLSFLOWER:
609 f = type_data;
610 return qede_set_flower(edev, f, f->common.protocol);
611 default:
612 return -EOPNOTSUPP;
613 }
614 }
615
616 static LIST_HEAD(qede_block_cb_list);
617
618 static int
qede_setup_tc_offload(struct net_device * dev,enum tc_setup_type type,void * type_data)619 qede_setup_tc_offload(struct net_device *dev, enum tc_setup_type type,
620 void *type_data)
621 {
622 struct qede_dev *edev = netdev_priv(dev);
623 struct tc_mqprio_qopt *mqprio;
624
625 switch (type) {
626 case TC_SETUP_BLOCK:
627 return flow_block_cb_setup_simple(type_data,
628 &qede_block_cb_list,
629 qede_setup_tc_block_cb,
630 edev, edev, true);
631 case TC_SETUP_QDISC_MQPRIO:
632 mqprio = type_data;
633
634 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
635 return qede_setup_tc(dev, mqprio->num_tc);
636 default:
637 return -EOPNOTSUPP;
638 }
639 }
640
641 static const struct net_device_ops qede_netdev_ops = {
642 .ndo_open = qede_open,
643 .ndo_stop = qede_close,
644 .ndo_start_xmit = qede_start_xmit,
645 .ndo_select_queue = qede_select_queue,
646 .ndo_set_rx_mode = qede_set_rx_mode,
647 .ndo_set_mac_address = qede_set_mac_addr,
648 .ndo_validate_addr = eth_validate_addr,
649 .ndo_change_mtu = qede_change_mtu,
650 .ndo_eth_ioctl = qede_ioctl,
651 .ndo_tx_timeout = qede_tx_timeout,
652 #ifdef CONFIG_QED_SRIOV
653 .ndo_set_vf_mac = qede_set_vf_mac,
654 .ndo_set_vf_vlan = qede_set_vf_vlan,
655 .ndo_set_vf_trust = qede_set_vf_trust,
656 #endif
657 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
658 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
659 .ndo_fix_features = qede_fix_features,
660 .ndo_set_features = qede_set_features,
661 .ndo_get_stats64 = qede_get_stats64,
662 #ifdef CONFIG_QED_SRIOV
663 .ndo_set_vf_link_state = qede_set_vf_link_state,
664 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
665 .ndo_get_vf_config = qede_get_vf_config,
666 .ndo_set_vf_rate = qede_set_vf_rate,
667 #endif
668 .ndo_features_check = qede_features_check,
669 .ndo_bpf = qede_xdp,
670 #ifdef CONFIG_RFS_ACCEL
671 .ndo_rx_flow_steer = qede_rx_flow_steer,
672 #endif
673 .ndo_xdp_xmit = qede_xdp_transmit,
674 .ndo_setup_tc = qede_setup_tc_offload,
675 };
676
677 static const struct net_device_ops qede_netdev_vf_ops = {
678 .ndo_open = qede_open,
679 .ndo_stop = qede_close,
680 .ndo_start_xmit = qede_start_xmit,
681 .ndo_select_queue = qede_select_queue,
682 .ndo_set_rx_mode = qede_set_rx_mode,
683 .ndo_set_mac_address = qede_set_mac_addr,
684 .ndo_validate_addr = eth_validate_addr,
685 .ndo_change_mtu = qede_change_mtu,
686 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
687 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
688 .ndo_fix_features = qede_fix_features,
689 .ndo_set_features = qede_set_features,
690 .ndo_get_stats64 = qede_get_stats64,
691 .ndo_features_check = qede_features_check,
692 };
693
694 static const struct net_device_ops qede_netdev_vf_xdp_ops = {
695 .ndo_open = qede_open,
696 .ndo_stop = qede_close,
697 .ndo_start_xmit = qede_start_xmit,
698 .ndo_select_queue = qede_select_queue,
699 .ndo_set_rx_mode = qede_set_rx_mode,
700 .ndo_set_mac_address = qede_set_mac_addr,
701 .ndo_validate_addr = eth_validate_addr,
702 .ndo_change_mtu = qede_change_mtu,
703 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
704 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
705 .ndo_fix_features = qede_fix_features,
706 .ndo_set_features = qede_set_features,
707 .ndo_get_stats64 = qede_get_stats64,
708 .ndo_features_check = qede_features_check,
709 .ndo_bpf = qede_xdp,
710 .ndo_xdp_xmit = qede_xdp_transmit,
711 };
712
713 /* -------------------------------------------------------------------------
714 * START OF PROBE / REMOVE
715 * -------------------------------------------------------------------------
716 */
717
qede_alloc_etherdev(struct qed_dev * cdev,struct pci_dev * pdev,struct qed_dev_eth_info * info,u32 dp_module,u8 dp_level)718 static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
719 struct pci_dev *pdev,
720 struct qed_dev_eth_info *info,
721 u32 dp_module, u8 dp_level)
722 {
723 struct net_device *ndev;
724 struct qede_dev *edev;
725
726 ndev = alloc_etherdev_mqs(sizeof(*edev),
727 info->num_queues * info->num_tc,
728 info->num_queues);
729 if (!ndev) {
730 pr_err("etherdev allocation failed\n");
731 return NULL;
732 }
733
734 edev = netdev_priv(ndev);
735 edev->ndev = ndev;
736 edev->cdev = cdev;
737 edev->pdev = pdev;
738 edev->dp_module = dp_module;
739 edev->dp_level = dp_level;
740 edev->ops = qed_ops;
741
742 if (is_kdump_kernel()) {
743 edev->q_num_rx_buffers = NUM_RX_BDS_KDUMP_MIN;
744 edev->q_num_tx_buffers = NUM_TX_BDS_KDUMP_MIN;
745 } else {
746 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
747 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
748 }
749
750 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
751 info->num_queues, info->num_queues);
752
753 SET_NETDEV_DEV(ndev, &pdev->dev);
754
755 memset(&edev->stats, 0, sizeof(edev->stats));
756 memcpy(&edev->dev_info, info, sizeof(*info));
757
758 /* As ethtool doesn't have the ability to show WoL behavior as
759 * 'default', if device supports it declare it's enabled.
760 */
761 if (edev->dev_info.common.wol_support)
762 edev->wol_enabled = true;
763
764 INIT_LIST_HEAD(&edev->vlan_list);
765
766 return edev;
767 }
768
qede_init_ndev(struct qede_dev * edev)769 static void qede_init_ndev(struct qede_dev *edev)
770 {
771 struct net_device *ndev = edev->ndev;
772 struct pci_dev *pdev = edev->pdev;
773 bool udp_tunnel_enable = false;
774 netdev_features_t hw_features;
775
776 pci_set_drvdata(pdev, ndev);
777
778 ndev->mem_start = edev->dev_info.common.pci_mem_start;
779 ndev->base_addr = ndev->mem_start;
780 ndev->mem_end = edev->dev_info.common.pci_mem_end;
781 ndev->irq = edev->dev_info.common.pci_irq;
782
783 ndev->watchdog_timeo = TX_TIMEOUT;
784
785 if (IS_VF(edev)) {
786 if (edev->dev_info.xdp_supported)
787 ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
788 else
789 ndev->netdev_ops = &qede_netdev_vf_ops;
790 } else {
791 ndev->netdev_ops = &qede_netdev_ops;
792 }
793
794 qede_set_ethtool_ops(ndev);
795
796 ndev->priv_flags |= IFF_UNICAST_FLT;
797
798 /* user-changeble features */
799 hw_features = NETIF_F_GRO | NETIF_F_GRO_HW | NETIF_F_SG |
800 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
801 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_HW_TC;
802
803 if (edev->dev_info.common.b_arfs_capable)
804 hw_features |= NETIF_F_NTUPLE;
805
806 if (edev->dev_info.common.vxlan_enable ||
807 edev->dev_info.common.geneve_enable)
808 udp_tunnel_enable = true;
809
810 if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
811 hw_features |= NETIF_F_TSO_ECN;
812 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
813 NETIF_F_SG | NETIF_F_TSO |
814 NETIF_F_TSO_ECN | NETIF_F_TSO6 |
815 NETIF_F_RXCSUM;
816 }
817
818 if (udp_tunnel_enable) {
819 hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
820 NETIF_F_GSO_UDP_TUNNEL_CSUM);
821 ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
822 NETIF_F_GSO_UDP_TUNNEL_CSUM);
823
824 qede_set_udp_tunnels(edev);
825 }
826
827 if (edev->dev_info.common.gre_enable) {
828 hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
829 ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
830 NETIF_F_GSO_GRE_CSUM);
831 }
832
833 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
834 NETIF_F_HIGHDMA;
835 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
836 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
837 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
838
839 ndev->hw_features = hw_features;
840
841 /* MTU range: 46 - 9600 */
842 ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
843 ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
844
845 /* Set network device HW mac */
846 eth_hw_addr_set(edev->ndev, edev->dev_info.common.hw_mac);
847
848 ndev->mtu = edev->dev_info.common.mtu;
849 }
850
851 /* This function converts from 32b param to two params of level and module
852 * Input 32b decoding:
853 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
854 * 'happy' flow, e.g. memory allocation failed.
855 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
856 * and provide important parameters.
857 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
858 * module. VERBOSE prints are for tracking the specific flow in low level.
859 *
860 * Notice that the level should be that of the lowest required logs.
861 */
qede_config_debug(uint debug,u32 * p_dp_module,u8 * p_dp_level)862 void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
863 {
864 *p_dp_level = QED_LEVEL_NOTICE;
865 *p_dp_module = 0;
866
867 if (debug & QED_LOG_VERBOSE_MASK) {
868 *p_dp_level = QED_LEVEL_VERBOSE;
869 *p_dp_module = (debug & 0x3FFFFFFF);
870 } else if (debug & QED_LOG_INFO_MASK) {
871 *p_dp_level = QED_LEVEL_INFO;
872 } else if (debug & QED_LOG_NOTICE_MASK) {
873 *p_dp_level = QED_LEVEL_NOTICE;
874 }
875 }
876
qede_free_fp_array(struct qede_dev * edev)877 static void qede_free_fp_array(struct qede_dev *edev)
878 {
879 if (edev->fp_array) {
880 struct qede_fastpath *fp;
881 int i;
882
883 for_each_queue(i) {
884 fp = &edev->fp_array[i];
885
886 kfree(fp->sb_info);
887 /* Handle mem alloc failure case where qede_init_fp
888 * didn't register xdp_rxq_info yet.
889 * Implicit only (fp->type & QEDE_FASTPATH_RX)
890 */
891 if (fp->rxq && xdp_rxq_info_is_reg(&fp->rxq->xdp_rxq))
892 xdp_rxq_info_unreg(&fp->rxq->xdp_rxq);
893 kfree(fp->rxq);
894 kfree(fp->xdp_tx);
895 kfree(fp->txq);
896 }
897 kfree(edev->fp_array);
898 }
899
900 edev->num_queues = 0;
901 edev->fp_num_tx = 0;
902 edev->fp_num_rx = 0;
903 }
904
qede_alloc_fp_array(struct qede_dev * edev)905 static int qede_alloc_fp_array(struct qede_dev *edev)
906 {
907 u8 fp_combined, fp_rx = edev->fp_num_rx;
908 struct qede_fastpath *fp;
909 int i;
910
911 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
912 sizeof(*edev->fp_array), GFP_KERNEL);
913 if (!edev->fp_array) {
914 DP_NOTICE(edev, "fp array allocation failed\n");
915 goto err;
916 }
917
918 if (!edev->coal_entry) {
919 edev->coal_entry = kcalloc(QEDE_MAX_RSS_CNT(edev),
920 sizeof(*edev->coal_entry),
921 GFP_KERNEL);
922 if (!edev->coal_entry) {
923 DP_ERR(edev, "coalesce entry allocation failed\n");
924 goto err;
925 }
926 }
927
928 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
929
930 /* Allocate the FP elements for Rx queues followed by combined and then
931 * the Tx. This ordering should be maintained so that the respective
932 * queues (Rx or Tx) will be together in the fastpath array and the
933 * associated ids will be sequential.
934 */
935 for_each_queue(i) {
936 fp = &edev->fp_array[i];
937
938 fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
939 if (!fp->sb_info) {
940 DP_NOTICE(edev, "sb info struct allocation failed\n");
941 goto err;
942 }
943
944 if (fp_rx) {
945 fp->type = QEDE_FASTPATH_RX;
946 fp_rx--;
947 } else if (fp_combined) {
948 fp->type = QEDE_FASTPATH_COMBINED;
949 fp_combined--;
950 } else {
951 fp->type = QEDE_FASTPATH_TX;
952 }
953
954 if (fp->type & QEDE_FASTPATH_TX) {
955 fp->txq = kcalloc(edev->dev_info.num_tc,
956 sizeof(*fp->txq), GFP_KERNEL);
957 if (!fp->txq)
958 goto err;
959 }
960
961 if (fp->type & QEDE_FASTPATH_RX) {
962 fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
963 if (!fp->rxq)
964 goto err;
965
966 if (edev->xdp_prog) {
967 fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
968 GFP_KERNEL);
969 if (!fp->xdp_tx)
970 goto err;
971 fp->type |= QEDE_FASTPATH_XDP;
972 }
973 }
974 }
975
976 return 0;
977 err:
978 qede_free_fp_array(edev);
979 return -ENOMEM;
980 }
981
982 /* The qede lock is used to protect driver state change and driver flows that
983 * are not reentrant.
984 */
__qede_lock(struct qede_dev * edev)985 void __qede_lock(struct qede_dev *edev)
986 {
987 mutex_lock(&edev->qede_lock);
988 }
989
__qede_unlock(struct qede_dev * edev)990 void __qede_unlock(struct qede_dev *edev)
991 {
992 mutex_unlock(&edev->qede_lock);
993 }
994
995 /* This version of the lock should be used when acquiring the RTNL lock is also
996 * needed in addition to the internal qede lock.
997 */
qede_lock(struct qede_dev * edev)998 static void qede_lock(struct qede_dev *edev)
999 {
1000 rtnl_lock();
1001 __qede_lock(edev);
1002 }
1003
qede_unlock(struct qede_dev * edev)1004 static void qede_unlock(struct qede_dev *edev)
1005 {
1006 __qede_unlock(edev);
1007 rtnl_unlock();
1008 }
1009
qede_periodic_task(struct work_struct * work)1010 static void qede_periodic_task(struct work_struct *work)
1011 {
1012 struct qede_dev *edev = container_of(work, struct qede_dev,
1013 periodic_task.work);
1014
1015 qede_fill_by_demand_stats(edev);
1016 schedule_delayed_work(&edev->periodic_task, edev->stats_coal_ticks);
1017 }
1018
qede_init_periodic_task(struct qede_dev * edev)1019 static void qede_init_periodic_task(struct qede_dev *edev)
1020 {
1021 INIT_DELAYED_WORK(&edev->periodic_task, qede_periodic_task);
1022 spin_lock_init(&edev->stats_lock);
1023 edev->stats_coal_usecs = USEC_PER_SEC;
1024 edev->stats_coal_ticks = usecs_to_jiffies(USEC_PER_SEC);
1025 }
1026
qede_sp_task(struct work_struct * work)1027 static void qede_sp_task(struct work_struct *work)
1028 {
1029 struct qede_dev *edev = container_of(work, struct qede_dev,
1030 sp_task.work);
1031
1032 /* Disable execution of this deferred work once
1033 * qede removal is in progress, this stop any future
1034 * scheduling of sp_task.
1035 */
1036 if (test_bit(QEDE_SP_DISABLE, &edev->sp_flags))
1037 return;
1038
1039 /* The locking scheme depends on the specific flag:
1040 * In case of QEDE_SP_RECOVERY, acquiring the RTNL lock is required to
1041 * ensure that ongoing flows are ended and new ones are not started.
1042 * In other cases - only the internal qede lock should be acquired.
1043 */
1044
1045 if (test_and_clear_bit(QEDE_SP_RECOVERY, &edev->sp_flags)) {
1046 cancel_delayed_work_sync(&edev->periodic_task);
1047 #ifdef CONFIG_QED_SRIOV
1048 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1049 * The recovery of the active VFs is currently not supported.
1050 */
1051 if (pci_num_vf(edev->pdev))
1052 qede_sriov_configure(edev->pdev, 0);
1053 #endif
1054 qede_lock(edev);
1055 qede_recovery_handler(edev);
1056 qede_unlock(edev);
1057 }
1058
1059 __qede_lock(edev);
1060
1061 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1062 if (edev->state == QEDE_STATE_OPEN)
1063 qede_config_rx_mode(edev->ndev);
1064
1065 #ifdef CONFIG_RFS_ACCEL
1066 if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
1067 if (edev->state == QEDE_STATE_OPEN)
1068 qede_process_arfs_filters(edev, false);
1069 }
1070 #endif
1071 if (test_and_clear_bit(QEDE_SP_HW_ERR, &edev->sp_flags))
1072 qede_generic_hw_err_handler(edev);
1073 __qede_unlock(edev);
1074
1075 if (test_and_clear_bit(QEDE_SP_AER, &edev->sp_flags)) {
1076 #ifdef CONFIG_QED_SRIOV
1077 /* SRIOV must be disabled outside the lock to avoid a deadlock.
1078 * The recovery of the active VFs is currently not supported.
1079 */
1080 if (pci_num_vf(edev->pdev))
1081 qede_sriov_configure(edev->pdev, 0);
1082 #endif
1083 edev->ops->common->recovery_process(edev->cdev);
1084 }
1085 }
1086
qede_update_pf_params(struct qed_dev * cdev)1087 static void qede_update_pf_params(struct qed_dev *cdev)
1088 {
1089 struct qed_pf_params pf_params;
1090 u16 num_cons;
1091
1092 /* 64 rx + 64 tx + 64 XDP */
1093 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1094
1095 /* 1 rx + 1 xdp + max tx cos */
1096 num_cons = QED_MIN_L2_CONS;
1097
1098 pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * num_cons;
1099
1100 /* Same for VFs - make sure they'll have sufficient connections
1101 * to support XDP Tx queues.
1102 */
1103 pf_params.eth_pf_params.num_vf_cons = 48;
1104
1105 pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
1106 qed_ops->common->update_pf_params(cdev, &pf_params);
1107 }
1108
1109 #define QEDE_FW_VER_STR_SIZE 80
1110
qede_log_probe(struct qede_dev * edev)1111 static void qede_log_probe(struct qede_dev *edev)
1112 {
1113 struct qed_dev_info *p_dev_info = &edev->dev_info.common;
1114 u8 buf[QEDE_FW_VER_STR_SIZE];
1115 size_t left_size;
1116
1117 snprintf(buf, QEDE_FW_VER_STR_SIZE,
1118 "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
1119 p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
1120 p_dev_info->fw_eng,
1121 (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
1122 QED_MFW_VERSION_3_OFFSET,
1123 (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
1124 QED_MFW_VERSION_2_OFFSET,
1125 (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
1126 QED_MFW_VERSION_1_OFFSET,
1127 (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
1128 QED_MFW_VERSION_0_OFFSET);
1129
1130 left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
1131 if (p_dev_info->mbi_version && left_size)
1132 snprintf(buf + strlen(buf), left_size,
1133 " [MBI %d.%d.%d]",
1134 (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
1135 QED_MBI_VERSION_2_OFFSET,
1136 (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
1137 QED_MBI_VERSION_1_OFFSET,
1138 (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
1139 QED_MBI_VERSION_0_OFFSET);
1140
1141 pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
1142 PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
1143 buf, edev->ndev->name);
1144 }
1145
1146 enum qede_probe_mode {
1147 QEDE_PROBE_NORMAL,
1148 QEDE_PROBE_RECOVERY,
1149 };
1150
__qede_probe(struct pci_dev * pdev,u32 dp_module,u8 dp_level,bool is_vf,enum qede_probe_mode mode)1151 static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1152 bool is_vf, enum qede_probe_mode mode)
1153 {
1154 struct qed_probe_params probe_params;
1155 struct qed_slowpath_params sp_params;
1156 struct qed_dev_eth_info dev_info;
1157 struct qede_dev *edev;
1158 struct qed_dev *cdev;
1159 int rc;
1160
1161 if (unlikely(dp_level & QED_LEVEL_INFO))
1162 pr_notice("Starting qede probe\n");
1163
1164 memset(&probe_params, 0, sizeof(probe_params));
1165 probe_params.protocol = QED_PROTOCOL_ETH;
1166 probe_params.dp_module = dp_module;
1167 probe_params.dp_level = dp_level;
1168 probe_params.is_vf = is_vf;
1169 probe_params.recov_in_prog = (mode == QEDE_PROBE_RECOVERY);
1170 cdev = qed_ops->common->probe(pdev, &probe_params);
1171 if (!cdev) {
1172 rc = -ENODEV;
1173 goto err0;
1174 }
1175
1176 qede_update_pf_params(cdev);
1177
1178 /* Start the Slowpath-process */
1179 memset(&sp_params, 0, sizeof(sp_params));
1180 sp_params.int_mode = QED_INT_MODE_MSIX;
1181 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1182 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
1183 if (rc) {
1184 pr_notice("Cannot start slowpath\n");
1185 goto err1;
1186 }
1187
1188 /* Learn information crucial for qede to progress */
1189 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1190 if (rc)
1191 goto err2;
1192
1193 if (mode != QEDE_PROBE_RECOVERY) {
1194 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1195 dp_level);
1196 if (!edev) {
1197 rc = -ENOMEM;
1198 goto err2;
1199 }
1200
1201 edev->devlink = qed_ops->common->devlink_register(cdev);
1202 if (IS_ERR(edev->devlink)) {
1203 DP_NOTICE(edev, "Cannot register devlink\n");
1204 rc = PTR_ERR(edev->devlink);
1205 edev->devlink = NULL;
1206 goto err3;
1207 }
1208 } else {
1209 struct net_device *ndev = pci_get_drvdata(pdev);
1210 struct qed_devlink *qdl;
1211
1212 edev = netdev_priv(ndev);
1213 qdl = devlink_priv(edev->devlink);
1214 qdl->cdev = cdev;
1215 edev->cdev = cdev;
1216 memset(&edev->stats, 0, sizeof(edev->stats));
1217 memcpy(&edev->dev_info, &dev_info, sizeof(dev_info));
1218 }
1219
1220 if (is_vf)
1221 set_bit(QEDE_FLAGS_IS_VF, &edev->flags);
1222
1223 qede_init_ndev(edev);
1224
1225 rc = qede_rdma_dev_add(edev, (mode == QEDE_PROBE_RECOVERY));
1226 if (rc)
1227 goto err3;
1228
1229 if (mode != QEDE_PROBE_RECOVERY) {
1230 /* Prepare the lock prior to the registration of the netdev,
1231 * as once it's registered we might reach flows requiring it
1232 * [it's even possible to reach a flow needing it directly
1233 * from there, although it's unlikely].
1234 */
1235 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1236 mutex_init(&edev->qede_lock);
1237 qede_init_periodic_task(edev);
1238
1239 rc = register_netdev(edev->ndev);
1240 if (rc) {
1241 DP_NOTICE(edev, "Cannot register net-device\n");
1242 goto err4;
1243 }
1244 }
1245
1246 edev->ops->common->set_name(cdev, edev->ndev->name);
1247
1248 /* PTP not supported on VFs */
1249 if (!is_vf)
1250 qede_ptp_enable(edev);
1251
1252 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1253
1254 #ifdef CONFIG_DCB
1255 if (!IS_VF(edev))
1256 qede_set_dcbnl_ops(edev->ndev);
1257 #endif
1258
1259 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
1260
1261 qede_log_probe(edev);
1262
1263 /* retain user config (for example - after recovery) */
1264 if (edev->stats_coal_usecs)
1265 schedule_delayed_work(&edev->periodic_task, 0);
1266
1267 return 0;
1268
1269 err4:
1270 qede_rdma_dev_remove(edev, (mode == QEDE_PROBE_RECOVERY));
1271 err3:
1272 if (mode != QEDE_PROBE_RECOVERY)
1273 free_netdev(edev->ndev);
1274 else
1275 edev->cdev = NULL;
1276 err2:
1277 qed_ops->common->slowpath_stop(cdev);
1278 err1:
1279 qed_ops->common->remove(cdev);
1280 err0:
1281 return rc;
1282 }
1283
qede_probe(struct pci_dev * pdev,const struct pci_device_id * id)1284 static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1285 {
1286 bool is_vf = false;
1287 u32 dp_module = 0;
1288 u8 dp_level = 0;
1289
1290 switch ((enum qede_pci_private)id->driver_data) {
1291 case QEDE_PRIVATE_VF:
1292 if (debug & QED_LOG_VERBOSE_MASK)
1293 dev_err(&pdev->dev, "Probing a VF\n");
1294 is_vf = true;
1295 break;
1296 default:
1297 if (debug & QED_LOG_VERBOSE_MASK)
1298 dev_err(&pdev->dev, "Probing a PF\n");
1299 }
1300
1301 qede_config_debug(debug, &dp_module, &dp_level);
1302
1303 return __qede_probe(pdev, dp_module, dp_level, is_vf,
1304 QEDE_PROBE_NORMAL);
1305 }
1306
1307 enum qede_remove_mode {
1308 QEDE_REMOVE_NORMAL,
1309 QEDE_REMOVE_RECOVERY,
1310 };
1311
__qede_remove(struct pci_dev * pdev,enum qede_remove_mode mode)1312 static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1313 {
1314 struct net_device *ndev = pci_get_drvdata(pdev);
1315 struct qede_dev *edev;
1316 struct qed_dev *cdev;
1317
1318 if (!ndev) {
1319 dev_info(&pdev->dev, "Device has already been removed\n");
1320 return;
1321 }
1322
1323 edev = netdev_priv(ndev);
1324 cdev = edev->cdev;
1325
1326 DP_INFO(edev, "Starting qede_remove\n");
1327
1328 qede_rdma_dev_remove(edev, (mode == QEDE_REMOVE_RECOVERY));
1329
1330 if (mode != QEDE_REMOVE_RECOVERY) {
1331 set_bit(QEDE_SP_DISABLE, &edev->sp_flags);
1332 unregister_netdev(ndev);
1333
1334 cancel_delayed_work_sync(&edev->sp_task);
1335 cancel_delayed_work_sync(&edev->periodic_task);
1336
1337 edev->ops->common->set_power_state(cdev, PCI_D0);
1338
1339 pci_set_drvdata(pdev, NULL);
1340 }
1341
1342 qede_ptp_disable(edev);
1343
1344 /* Use global ops since we've freed edev */
1345 qed_ops->common->slowpath_stop(cdev);
1346 if (system_state == SYSTEM_POWER_OFF)
1347 return;
1348
1349 if (mode != QEDE_REMOVE_RECOVERY && edev->devlink) {
1350 qed_ops->common->devlink_unregister(edev->devlink);
1351 edev->devlink = NULL;
1352 }
1353 qed_ops->common->remove(cdev);
1354 edev->cdev = NULL;
1355
1356 /* Since this can happen out-of-sync with other flows,
1357 * don't release the netdevice until after slowpath stop
1358 * has been called to guarantee various other contexts
1359 * [e.g., QED register callbacks] won't break anything when
1360 * accessing the netdevice.
1361 */
1362 if (mode != QEDE_REMOVE_RECOVERY) {
1363 kfree(edev->coal_entry);
1364 free_netdev(ndev);
1365 }
1366
1367 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
1368 }
1369
qede_remove(struct pci_dev * pdev)1370 static void qede_remove(struct pci_dev *pdev)
1371 {
1372 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1373 }
1374
qede_shutdown(struct pci_dev * pdev)1375 static void qede_shutdown(struct pci_dev *pdev)
1376 {
1377 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1378 }
1379
1380 /* -------------------------------------------------------------------------
1381 * START OF LOAD / UNLOAD
1382 * -------------------------------------------------------------------------
1383 */
1384
qede_set_num_queues(struct qede_dev * edev)1385 static int qede_set_num_queues(struct qede_dev *edev)
1386 {
1387 int rc;
1388 u16 rss_num;
1389
1390 /* Setup queues according to possible resources*/
1391 if (edev->req_queues)
1392 rss_num = edev->req_queues;
1393 else
1394 rss_num = netif_get_num_default_rss_queues() *
1395 edev->dev_info.common.num_hwfns;
1396
1397 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1398
1399 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1400 if (rc > 0) {
1401 /* Managed to request interrupts for our queues */
1402 edev->num_queues = rc;
1403 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1404 QEDE_QUEUE_CNT(edev), rss_num);
1405 rc = 0;
1406 }
1407
1408 edev->fp_num_tx = edev->req_num_tx;
1409 edev->fp_num_rx = edev->req_num_rx;
1410
1411 return rc;
1412 }
1413
qede_free_mem_sb(struct qede_dev * edev,struct qed_sb_info * sb_info,u16 sb_id)1414 static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
1415 u16 sb_id)
1416 {
1417 if (sb_info->sb_virt) {
1418 edev->ops->common->sb_release(edev->cdev, sb_info, sb_id,
1419 QED_SB_TYPE_L2_QUEUE);
1420 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1421 (void *)sb_info->sb_virt, sb_info->sb_phys);
1422 memset(sb_info, 0, sizeof(*sb_info));
1423 }
1424 }
1425
1426 /* This function allocates fast-path status block memory */
qede_alloc_mem_sb(struct qede_dev * edev,struct qed_sb_info * sb_info,u16 sb_id)1427 static int qede_alloc_mem_sb(struct qede_dev *edev,
1428 struct qed_sb_info *sb_info, u16 sb_id)
1429 {
1430 struct status_block_e4 *sb_virt;
1431 dma_addr_t sb_phys;
1432 int rc;
1433
1434 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1435 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
1436 if (!sb_virt) {
1437 DP_ERR(edev, "Status block allocation failed\n");
1438 return -ENOMEM;
1439 }
1440
1441 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1442 sb_virt, sb_phys, sb_id,
1443 QED_SB_TYPE_L2_QUEUE);
1444 if (rc) {
1445 DP_ERR(edev, "Status block initialization failed\n");
1446 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1447 sb_virt, sb_phys);
1448 return rc;
1449 }
1450
1451 return 0;
1452 }
1453
qede_free_rx_buffers(struct qede_dev * edev,struct qede_rx_queue * rxq)1454 static void qede_free_rx_buffers(struct qede_dev *edev,
1455 struct qede_rx_queue *rxq)
1456 {
1457 u16 i;
1458
1459 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1460 struct sw_rx_data *rx_buf;
1461 struct page *data;
1462
1463 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1464 data = rx_buf->data;
1465
1466 dma_unmap_page(&edev->pdev->dev,
1467 rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
1468
1469 rx_buf->data = NULL;
1470 __free_page(data);
1471 }
1472 }
1473
qede_free_mem_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq)1474 static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1475 {
1476 /* Free rx buffers */
1477 qede_free_rx_buffers(edev, rxq);
1478
1479 /* Free the parallel SW ring */
1480 kfree(rxq->sw_rx_ring);
1481
1482 /* Free the real RQ ring used by FW */
1483 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1484 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1485 }
1486
qede_set_tpa_param(struct qede_rx_queue * rxq)1487 static void qede_set_tpa_param(struct qede_rx_queue *rxq)
1488 {
1489 int i;
1490
1491 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
1492 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
1493
1494 tpa_info->state = QEDE_AGG_STATE_NONE;
1495 }
1496 }
1497
1498 /* This function allocates all memory needed per Rx queue */
qede_alloc_mem_rxq(struct qede_dev * edev,struct qede_rx_queue * rxq)1499 static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
1500 {
1501 struct qed_chain_init_params params = {
1502 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1503 .num_elems = RX_RING_SIZE,
1504 };
1505 struct qed_dev *cdev = edev->cdev;
1506 int i, rc, size;
1507
1508 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1509
1510 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
1511
1512 rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : NET_SKB_PAD;
1513 size = rxq->rx_headroom +
1514 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
1515
1516 /* Make sure that the headroom and payload fit in a single page */
1517 if (rxq->rx_buf_size + size > PAGE_SIZE)
1518 rxq->rx_buf_size = PAGE_SIZE - size;
1519
1520 /* Segment size to split a page in multiple equal parts,
1521 * unless XDP is used in which case we'd use the entire page.
1522 */
1523 if (!edev->xdp_prog) {
1524 size = size + rxq->rx_buf_size;
1525 rxq->rx_buf_seg_size = roundup_pow_of_two(size);
1526 } else {
1527 rxq->rx_buf_seg_size = PAGE_SIZE;
1528 edev->ndev->features &= ~NETIF_F_GRO_HW;
1529 }
1530
1531 /* Allocate the parallel driver ring for Rx buffers */
1532 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
1533 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1534 if (!rxq->sw_rx_ring) {
1535 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1536 rc = -ENOMEM;
1537 goto err;
1538 }
1539
1540 /* Allocate FW Rx ring */
1541 params.mode = QED_CHAIN_MODE_NEXT_PTR;
1542 params.intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE;
1543 params.elem_size = sizeof(struct eth_rx_bd);
1544
1545 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_bd_ring, ¶ms);
1546 if (rc)
1547 goto err;
1548
1549 /* Allocate FW completion ring */
1550 params.mode = QED_CHAIN_MODE_PBL;
1551 params.intended_use = QED_CHAIN_USE_TO_CONSUME;
1552 params.elem_size = sizeof(union eth_rx_cqe);
1553
1554 rc = edev->ops->common->chain_alloc(cdev, &rxq->rx_comp_ring, ¶ms);
1555 if (rc)
1556 goto err;
1557
1558 /* Allocate buffers for the Rx ring */
1559 rxq->filled_buffers = 0;
1560 for (i = 0; i < rxq->num_rx_buffers; i++) {
1561 rc = qede_alloc_rx_buffer(rxq, false);
1562 if (rc) {
1563 DP_ERR(edev,
1564 "Rx buffers allocation failed at index %d\n", i);
1565 goto err;
1566 }
1567 }
1568
1569 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO_HW);
1570 if (!edev->gro_disable)
1571 qede_set_tpa_param(rxq);
1572 err:
1573 return rc;
1574 }
1575
qede_free_mem_txq(struct qede_dev * edev,struct qede_tx_queue * txq)1576 static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1577 {
1578 /* Free the parallel SW ring */
1579 if (txq->is_xdp)
1580 kfree(txq->sw_tx_ring.xdp);
1581 else
1582 kfree(txq->sw_tx_ring.skbs);
1583
1584 /* Free the real RQ ring used by FW */
1585 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1586 }
1587
1588 /* This function allocates all memory needed per Tx queue */
qede_alloc_mem_txq(struct qede_dev * edev,struct qede_tx_queue * txq)1589 static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
1590 {
1591 struct qed_chain_init_params params = {
1592 .mode = QED_CHAIN_MODE_PBL,
1593 .intended_use = QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1594 .cnt_type = QED_CHAIN_CNT_TYPE_U16,
1595 .num_elems = edev->q_num_tx_buffers,
1596 .elem_size = sizeof(union eth_tx_bd_types),
1597 };
1598 int size, rc;
1599
1600 txq->num_tx_buffers = edev->q_num_tx_buffers;
1601
1602 /* Allocate the parallel driver ring for Tx buffers */
1603 if (txq->is_xdp) {
1604 size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
1605 txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
1606 if (!txq->sw_tx_ring.xdp)
1607 goto err;
1608 } else {
1609 size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
1610 txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
1611 if (!txq->sw_tx_ring.skbs)
1612 goto err;
1613 }
1614
1615 rc = edev->ops->common->chain_alloc(edev->cdev, &txq->tx_pbl, ¶ms);
1616 if (rc)
1617 goto err;
1618
1619 return 0;
1620
1621 err:
1622 qede_free_mem_txq(edev, txq);
1623 return -ENOMEM;
1624 }
1625
1626 /* This function frees all memory of a single fp */
qede_free_mem_fp(struct qede_dev * edev,struct qede_fastpath * fp)1627 static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1628 {
1629 qede_free_mem_sb(edev, fp->sb_info, fp->id);
1630
1631 if (fp->type & QEDE_FASTPATH_RX)
1632 qede_free_mem_rxq(edev, fp->rxq);
1633
1634 if (fp->type & QEDE_FASTPATH_XDP)
1635 qede_free_mem_txq(edev, fp->xdp_tx);
1636
1637 if (fp->type & QEDE_FASTPATH_TX) {
1638 int cos;
1639
1640 for_each_cos_in_txq(edev, cos)
1641 qede_free_mem_txq(edev, &fp->txq[cos]);
1642 }
1643 }
1644
1645 /* This function allocates all memory needed for a single fp (i.e. an entity
1646 * which contains status block, one rx queue and/or multiple per-TC tx queues.
1647 */
qede_alloc_mem_fp(struct qede_dev * edev,struct qede_fastpath * fp)1648 static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
1649 {
1650 int rc = 0;
1651
1652 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
1653 if (rc)
1654 goto out;
1655
1656 if (fp->type & QEDE_FASTPATH_RX) {
1657 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1658 if (rc)
1659 goto out;
1660 }
1661
1662 if (fp->type & QEDE_FASTPATH_XDP) {
1663 rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
1664 if (rc)
1665 goto out;
1666 }
1667
1668 if (fp->type & QEDE_FASTPATH_TX) {
1669 int cos;
1670
1671 for_each_cos_in_txq(edev, cos) {
1672 rc = qede_alloc_mem_txq(edev, &fp->txq[cos]);
1673 if (rc)
1674 goto out;
1675 }
1676 }
1677
1678 out:
1679 return rc;
1680 }
1681
qede_free_mem_load(struct qede_dev * edev)1682 static void qede_free_mem_load(struct qede_dev *edev)
1683 {
1684 int i;
1685
1686 for_each_queue(i) {
1687 struct qede_fastpath *fp = &edev->fp_array[i];
1688
1689 qede_free_mem_fp(edev, fp);
1690 }
1691 }
1692
1693 /* This function allocates all qede memory at NIC load. */
qede_alloc_mem_load(struct qede_dev * edev)1694 static int qede_alloc_mem_load(struct qede_dev *edev)
1695 {
1696 int rc = 0, queue_id;
1697
1698 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
1699 struct qede_fastpath *fp = &edev->fp_array[queue_id];
1700
1701 rc = qede_alloc_mem_fp(edev, fp);
1702 if (rc) {
1703 DP_ERR(edev,
1704 "Failed to allocate memory for fastpath - rss id = %d\n",
1705 queue_id);
1706 qede_free_mem_load(edev);
1707 return rc;
1708 }
1709 }
1710
1711 return 0;
1712 }
1713
qede_empty_tx_queue(struct qede_dev * edev,struct qede_tx_queue * txq)1714 static void qede_empty_tx_queue(struct qede_dev *edev,
1715 struct qede_tx_queue *txq)
1716 {
1717 unsigned int pkts_compl = 0, bytes_compl = 0;
1718 struct netdev_queue *netdev_txq;
1719 int rc, len = 0;
1720
1721 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
1722
1723 while (qed_chain_get_cons_idx(&txq->tx_pbl) !=
1724 qed_chain_get_prod_idx(&txq->tx_pbl)) {
1725 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1726 "Freeing a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1727 txq->index, qed_chain_get_cons_idx(&txq->tx_pbl),
1728 qed_chain_get_prod_idx(&txq->tx_pbl));
1729
1730 rc = qede_free_tx_pkt(edev, txq, &len);
1731 if (rc) {
1732 DP_NOTICE(edev,
1733 "Failed to free a packet on tx queue[%d]: chain_cons 0x%x, chain_prod 0x%x\n",
1734 txq->index,
1735 qed_chain_get_cons_idx(&txq->tx_pbl),
1736 qed_chain_get_prod_idx(&txq->tx_pbl));
1737 break;
1738 }
1739
1740 bytes_compl += len;
1741 pkts_compl++;
1742 txq->sw_tx_cons++;
1743 }
1744
1745 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
1746 }
1747
qede_empty_tx_queues(struct qede_dev * edev)1748 static void qede_empty_tx_queues(struct qede_dev *edev)
1749 {
1750 int i;
1751
1752 for_each_queue(i)
1753 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
1754 int cos;
1755
1756 for_each_cos_in_txq(edev, cos) {
1757 struct qede_fastpath *fp;
1758
1759 fp = &edev->fp_array[i];
1760 qede_empty_tx_queue(edev,
1761 &fp->txq[cos]);
1762 }
1763 }
1764 }
1765
1766 /* This function inits fp content and resets the SB, RXQ and TXQ structures */
qede_init_fp(struct qede_dev * edev)1767 static void qede_init_fp(struct qede_dev *edev)
1768 {
1769 int queue_id, rxq_index = 0, txq_index = 0;
1770 struct qede_fastpath *fp;
1771 bool init_xdp = false;
1772
1773 for_each_queue(queue_id) {
1774 fp = &edev->fp_array[queue_id];
1775
1776 fp->edev = edev;
1777 fp->id = queue_id;
1778
1779 if (fp->type & QEDE_FASTPATH_XDP) {
1780 fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
1781 rxq_index);
1782 fp->xdp_tx->is_xdp = 1;
1783
1784 spin_lock_init(&fp->xdp_tx->xdp_tx_lock);
1785 init_xdp = true;
1786 }
1787
1788 if (fp->type & QEDE_FASTPATH_RX) {
1789 fp->rxq->rxq_id = rxq_index++;
1790
1791 /* Determine how to map buffers for this queue */
1792 if (fp->type & QEDE_FASTPATH_XDP)
1793 fp->rxq->data_direction = DMA_BIDIRECTIONAL;
1794 else
1795 fp->rxq->data_direction = DMA_FROM_DEVICE;
1796 fp->rxq->dev = &edev->pdev->dev;
1797
1798 /* Driver have no error path from here */
1799 WARN_ON(xdp_rxq_info_reg(&fp->rxq->xdp_rxq, edev->ndev,
1800 fp->rxq->rxq_id, 0) < 0);
1801
1802 if (xdp_rxq_info_reg_mem_model(&fp->rxq->xdp_rxq,
1803 MEM_TYPE_PAGE_ORDER0,
1804 NULL)) {
1805 DP_NOTICE(edev,
1806 "Failed to register XDP memory model\n");
1807 }
1808 }
1809
1810 if (fp->type & QEDE_FASTPATH_TX) {
1811 int cos;
1812
1813 for_each_cos_in_txq(edev, cos) {
1814 struct qede_tx_queue *txq = &fp->txq[cos];
1815 u16 ndev_tx_id;
1816
1817 txq->cos = cos;
1818 txq->index = txq_index;
1819 ndev_tx_id = QEDE_TXQ_TO_NDEV_TXQ_ID(edev, txq);
1820 txq->ndev_txq_id = ndev_tx_id;
1821
1822 if (edev->dev_info.is_legacy)
1823 txq->is_legacy = true;
1824 txq->dev = &edev->pdev->dev;
1825 }
1826
1827 txq_index++;
1828 }
1829
1830 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1831 edev->ndev->name, queue_id);
1832 }
1833
1834 if (init_xdp) {
1835 edev->total_xdp_queues = QEDE_RSS_COUNT(edev);
1836 DP_INFO(edev, "Total XDP queues: %u\n", edev->total_xdp_queues);
1837 }
1838 }
1839
qede_set_real_num_queues(struct qede_dev * edev)1840 static int qede_set_real_num_queues(struct qede_dev *edev)
1841 {
1842 int rc = 0;
1843
1844 rc = netif_set_real_num_tx_queues(edev->ndev,
1845 QEDE_TSS_COUNT(edev) *
1846 edev->dev_info.num_tc);
1847 if (rc) {
1848 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1849 return rc;
1850 }
1851
1852 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
1853 if (rc) {
1854 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1855 return rc;
1856 }
1857
1858 return 0;
1859 }
1860
qede_napi_disable_remove(struct qede_dev * edev)1861 static void qede_napi_disable_remove(struct qede_dev *edev)
1862 {
1863 int i;
1864
1865 for_each_queue(i) {
1866 napi_disable(&edev->fp_array[i].napi);
1867
1868 netif_napi_del(&edev->fp_array[i].napi);
1869 }
1870 }
1871
qede_napi_add_enable(struct qede_dev * edev)1872 static void qede_napi_add_enable(struct qede_dev *edev)
1873 {
1874 int i;
1875
1876 /* Add NAPI objects */
1877 for_each_queue(i) {
1878 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1879 qede_poll, NAPI_POLL_WEIGHT);
1880 napi_enable(&edev->fp_array[i].napi);
1881 }
1882 }
1883
qede_sync_free_irqs(struct qede_dev * edev)1884 static void qede_sync_free_irqs(struct qede_dev *edev)
1885 {
1886 int i;
1887
1888 for (i = 0; i < edev->int_info.used_cnt; i++) {
1889 if (edev->int_info.msix_cnt) {
1890 synchronize_irq(edev->int_info.msix[i].vector);
1891 free_irq(edev->int_info.msix[i].vector,
1892 &edev->fp_array[i]);
1893 } else {
1894 edev->ops->common->simd_handler_clean(edev->cdev, i);
1895 }
1896 }
1897
1898 edev->int_info.used_cnt = 0;
1899 edev->int_info.msix_cnt = 0;
1900 }
1901
qede_req_msix_irqs(struct qede_dev * edev)1902 static int qede_req_msix_irqs(struct qede_dev *edev)
1903 {
1904 int i, rc;
1905
1906 /* Sanitize number of interrupts == number of prepared RSS queues */
1907 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
1908 DP_ERR(edev,
1909 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
1910 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
1911 return -EINVAL;
1912 }
1913
1914 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
1915 #ifdef CONFIG_RFS_ACCEL
1916 struct qede_fastpath *fp = &edev->fp_array[i];
1917
1918 if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
1919 rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
1920 edev->int_info.msix[i].vector);
1921 if (rc) {
1922 DP_ERR(edev, "Failed to add CPU rmap\n");
1923 qede_free_arfs(edev);
1924 }
1925 }
1926 #endif
1927 rc = request_irq(edev->int_info.msix[i].vector,
1928 qede_msix_fp_int, 0, edev->fp_array[i].name,
1929 &edev->fp_array[i]);
1930 if (rc) {
1931 DP_ERR(edev, "Request fp %d irq failed\n", i);
1932 #ifdef CONFIG_RFS_ACCEL
1933 if (edev->ndev->rx_cpu_rmap)
1934 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
1935
1936 edev->ndev->rx_cpu_rmap = NULL;
1937 #endif
1938 qede_sync_free_irqs(edev);
1939 return rc;
1940 }
1941 DP_VERBOSE(edev, NETIF_MSG_INTR,
1942 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
1943 edev->fp_array[i].name, i,
1944 &edev->fp_array[i]);
1945 edev->int_info.used_cnt++;
1946 }
1947
1948 return 0;
1949 }
1950
qede_simd_fp_handler(void * cookie)1951 static void qede_simd_fp_handler(void *cookie)
1952 {
1953 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
1954
1955 napi_schedule_irqoff(&fp->napi);
1956 }
1957
qede_setup_irqs(struct qede_dev * edev)1958 static int qede_setup_irqs(struct qede_dev *edev)
1959 {
1960 int i, rc = 0;
1961
1962 /* Learn Interrupt configuration */
1963 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
1964 if (rc)
1965 return rc;
1966
1967 if (edev->int_info.msix_cnt) {
1968 rc = qede_req_msix_irqs(edev);
1969 if (rc)
1970 return rc;
1971 edev->ndev->irq = edev->int_info.msix[0].vector;
1972 } else {
1973 const struct qed_common_ops *ops;
1974
1975 /* qed should learn receive the RSS ids and callbacks */
1976 ops = edev->ops->common;
1977 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
1978 ops->simd_handler_config(edev->cdev,
1979 &edev->fp_array[i], i,
1980 qede_simd_fp_handler);
1981 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
1982 }
1983 return 0;
1984 }
1985
qede_drain_txq(struct qede_dev * edev,struct qede_tx_queue * txq,bool allow_drain)1986 static int qede_drain_txq(struct qede_dev *edev,
1987 struct qede_tx_queue *txq, bool allow_drain)
1988 {
1989 int rc, cnt = 1000;
1990
1991 while (txq->sw_tx_cons != txq->sw_tx_prod) {
1992 if (!cnt) {
1993 if (allow_drain) {
1994 DP_NOTICE(edev,
1995 "Tx queue[%d] is stuck, requesting MCP to drain\n",
1996 txq->index);
1997 rc = edev->ops->common->drain(edev->cdev);
1998 if (rc)
1999 return rc;
2000 return qede_drain_txq(edev, txq, false);
2001 }
2002 DP_NOTICE(edev,
2003 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2004 txq->index, txq->sw_tx_prod,
2005 txq->sw_tx_cons);
2006 return -ENODEV;
2007 }
2008 cnt--;
2009 usleep_range(1000, 2000);
2010 barrier();
2011 }
2012
2013 /* FW finished processing, wait for HW to transmit all tx packets */
2014 usleep_range(1000, 2000);
2015
2016 return 0;
2017 }
2018
qede_stop_txq(struct qede_dev * edev,struct qede_tx_queue * txq,int rss_id)2019 static int qede_stop_txq(struct qede_dev *edev,
2020 struct qede_tx_queue *txq, int rss_id)
2021 {
2022 /* delete doorbell from doorbell recovery mechanism */
2023 edev->ops->common->db_recovery_del(edev->cdev, txq->doorbell_addr,
2024 &txq->tx_db);
2025
2026 return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
2027 }
2028
qede_stop_queues(struct qede_dev * edev)2029 static int qede_stop_queues(struct qede_dev *edev)
2030 {
2031 struct qed_update_vport_params *vport_update_params;
2032 struct qed_dev *cdev = edev->cdev;
2033 struct qede_fastpath *fp;
2034 int rc, i;
2035
2036 /* Disable the vport */
2037 vport_update_params = vzalloc(sizeof(*vport_update_params));
2038 if (!vport_update_params)
2039 return -ENOMEM;
2040
2041 vport_update_params->vport_id = 0;
2042 vport_update_params->update_vport_active_flg = 1;
2043 vport_update_params->vport_active_flg = 0;
2044 vport_update_params->update_rss_flg = 0;
2045
2046 rc = edev->ops->vport_update(cdev, vport_update_params);
2047 vfree(vport_update_params);
2048
2049 if (rc) {
2050 DP_ERR(edev, "Failed to update vport\n");
2051 return rc;
2052 }
2053
2054 /* Flush Tx queues. If needed, request drain from MCP */
2055 for_each_queue(i) {
2056 fp = &edev->fp_array[i];
2057
2058 if (fp->type & QEDE_FASTPATH_TX) {
2059 int cos;
2060
2061 for_each_cos_in_txq(edev, cos) {
2062 rc = qede_drain_txq(edev, &fp->txq[cos], true);
2063 if (rc)
2064 return rc;
2065 }
2066 }
2067
2068 if (fp->type & QEDE_FASTPATH_XDP) {
2069 rc = qede_drain_txq(edev, fp->xdp_tx, true);
2070 if (rc)
2071 return rc;
2072 }
2073 }
2074
2075 /* Stop all Queues in reverse order */
2076 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2077 fp = &edev->fp_array[i];
2078
2079 /* Stop the Tx Queue(s) */
2080 if (fp->type & QEDE_FASTPATH_TX) {
2081 int cos;
2082
2083 for_each_cos_in_txq(edev, cos) {
2084 rc = qede_stop_txq(edev, &fp->txq[cos], i);
2085 if (rc)
2086 return rc;
2087 }
2088 }
2089
2090 /* Stop the Rx Queue */
2091 if (fp->type & QEDE_FASTPATH_RX) {
2092 rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
2093 if (rc) {
2094 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2095 return rc;
2096 }
2097 }
2098
2099 /* Stop the XDP forwarding queue */
2100 if (fp->type & QEDE_FASTPATH_XDP) {
2101 rc = qede_stop_txq(edev, fp->xdp_tx, i);
2102 if (rc)
2103 return rc;
2104
2105 bpf_prog_put(fp->rxq->xdp_prog);
2106 }
2107 }
2108
2109 /* Stop the vport */
2110 rc = edev->ops->vport_stop(cdev, 0);
2111 if (rc)
2112 DP_ERR(edev, "Failed to stop VPORT\n");
2113
2114 return rc;
2115 }
2116
qede_start_txq(struct qede_dev * edev,struct qede_fastpath * fp,struct qede_tx_queue * txq,u8 rss_id,u16 sb_idx)2117 static int qede_start_txq(struct qede_dev *edev,
2118 struct qede_fastpath *fp,
2119 struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
2120 {
2121 dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
2122 u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2123 struct qed_queue_start_common_params params;
2124 struct qed_txq_start_ret_params ret_params;
2125 int rc;
2126
2127 memset(¶ms, 0, sizeof(params));
2128 memset(&ret_params, 0, sizeof(ret_params));
2129
2130 /* Let the XDP queue share the queue-zone with one of the regular txq.
2131 * We don't really care about its coalescing.
2132 */
2133 if (txq->is_xdp)
2134 params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
2135 else
2136 params.queue_id = txq->index;
2137
2138 params.p_sb = fp->sb_info;
2139 params.sb_idx = sb_idx;
2140 params.tc = txq->cos;
2141
2142 rc = edev->ops->q_tx_start(edev->cdev, rss_id, ¶ms, phys_table,
2143 page_cnt, &ret_params);
2144 if (rc) {
2145 DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
2146 return rc;
2147 }
2148
2149 txq->doorbell_addr = ret_params.p_doorbell;
2150 txq->handle = ret_params.p_handle;
2151
2152 /* Determine the FW consumer address associated */
2153 txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
2154
2155 /* Prepare the doorbell parameters */
2156 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
2157 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
2158 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
2159 DQ_XCM_ETH_TX_BD_PROD_CMD);
2160 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2161
2162 /* register doorbell with doorbell recovery mechanism */
2163 rc = edev->ops->common->db_recovery_add(edev->cdev, txq->doorbell_addr,
2164 &txq->tx_db, DB_REC_WIDTH_32B,
2165 DB_REC_KERNEL);
2166
2167 return rc;
2168 }
2169
qede_start_queues(struct qede_dev * edev,bool clear_stats)2170 static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2171 {
2172 int vlan_removal_en = 1;
2173 struct qed_dev *cdev = edev->cdev;
2174 struct qed_dev_info *qed_info = &edev->dev_info.common;
2175 struct qed_update_vport_params *vport_update_params;
2176 struct qed_queue_start_common_params q_params;
2177 struct qed_start_vport_params start = {0};
2178 int rc, i;
2179
2180 if (!edev->num_queues) {
2181 DP_ERR(edev,
2182 "Cannot update V-VPORT as active as there are no Rx queues\n");
2183 return -EINVAL;
2184 }
2185
2186 vport_update_params = vzalloc(sizeof(*vport_update_params));
2187 if (!vport_update_params)
2188 return -ENOMEM;
2189
2190 start.handle_ptp_pkts = !!(edev->ptp);
2191 start.gro_enable = !edev->gro_disable;
2192 start.mtu = edev->ndev->mtu;
2193 start.vport_id = 0;
2194 start.drop_ttl0 = true;
2195 start.remove_inner_vlan = vlan_removal_en;
2196 start.clear_stats = clear_stats;
2197
2198 rc = edev->ops->vport_start(cdev, &start);
2199
2200 if (rc) {
2201 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2202 goto out;
2203 }
2204
2205 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2206 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2207 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2208
2209 for_each_queue(i) {
2210 struct qede_fastpath *fp = &edev->fp_array[i];
2211 dma_addr_t p_phys_table;
2212 u32 page_cnt;
2213
2214 if (fp->type & QEDE_FASTPATH_RX) {
2215 struct qed_rxq_start_ret_params ret_params;
2216 struct qede_rx_queue *rxq = fp->rxq;
2217 __le16 *val;
2218
2219 memset(&ret_params, 0, sizeof(ret_params));
2220 memset(&q_params, 0, sizeof(q_params));
2221 q_params.queue_id = rxq->rxq_id;
2222 q_params.vport_id = 0;
2223 q_params.p_sb = fp->sb_info;
2224 q_params.sb_idx = RX_PI;
2225
2226 p_phys_table =
2227 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
2228 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
2229
2230 rc = edev->ops->q_rx_start(cdev, i, &q_params,
2231 rxq->rx_buf_size,
2232 rxq->rx_bd_ring.p_phys_addr,
2233 p_phys_table,
2234 page_cnt, &ret_params);
2235 if (rc) {
2236 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
2237 rc);
2238 goto out;
2239 }
2240
2241 /* Use the return parameters */
2242 rxq->hw_rxq_prod_addr = ret_params.p_prod;
2243 rxq->handle = ret_params.p_handle;
2244
2245 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
2246 rxq->hw_cons_ptr = val;
2247
2248 qede_update_rx_prod(edev, rxq);
2249 }
2250
2251 if (fp->type & QEDE_FASTPATH_XDP) {
2252 rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
2253 if (rc)
2254 goto out;
2255
2256 bpf_prog_add(edev->xdp_prog, 1);
2257 fp->rxq->xdp_prog = edev->xdp_prog;
2258 }
2259
2260 if (fp->type & QEDE_FASTPATH_TX) {
2261 int cos;
2262
2263 for_each_cos_in_txq(edev, cos) {
2264 rc = qede_start_txq(edev, fp, &fp->txq[cos], i,
2265 TX_PI(cos));
2266 if (rc)
2267 goto out;
2268 }
2269 }
2270 }
2271
2272 /* Prepare and send the vport enable */
2273 vport_update_params->vport_id = start.vport_id;
2274 vport_update_params->update_vport_active_flg = 1;
2275 vport_update_params->vport_active_flg = 1;
2276
2277 if ((qed_info->b_inter_pf_switch || pci_num_vf(edev->pdev)) &&
2278 qed_info->tx_switching) {
2279 vport_update_params->update_tx_switching_flg = 1;
2280 vport_update_params->tx_switching_flg = 1;
2281 }
2282
2283 qede_fill_rss_params(edev, &vport_update_params->rss_params,
2284 &vport_update_params->update_rss_flg);
2285
2286 rc = edev->ops->vport_update(cdev, vport_update_params);
2287 if (rc)
2288 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2289
2290 out:
2291 vfree(vport_update_params);
2292 return rc;
2293 }
2294
2295 enum qede_unload_mode {
2296 QEDE_UNLOAD_NORMAL,
2297 QEDE_UNLOAD_RECOVERY,
2298 };
2299
qede_unload(struct qede_dev * edev,enum qede_unload_mode mode,bool is_locked)2300 static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
2301 bool is_locked)
2302 {
2303 struct qed_link_params link_params;
2304 int rc;
2305
2306 DP_INFO(edev, "Starting qede unload\n");
2307
2308 if (!is_locked)
2309 __qede_lock(edev);
2310
2311 clear_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2312
2313 if (mode != QEDE_UNLOAD_RECOVERY)
2314 edev->state = QEDE_STATE_CLOSED;
2315
2316 qede_rdma_dev_event_close(edev);
2317
2318 /* Close OS Tx */
2319 netif_tx_disable(edev->ndev);
2320 netif_carrier_off(edev->ndev);
2321
2322 if (mode != QEDE_UNLOAD_RECOVERY) {
2323 /* Reset the link */
2324 memset(&link_params, 0, sizeof(link_params));
2325 link_params.link_up = false;
2326 edev->ops->common->set_link(edev->cdev, &link_params);
2327
2328 rc = qede_stop_queues(edev);
2329 if (rc) {
2330 #ifdef CONFIG_RFS_ACCEL
2331 if (edev->dev_info.common.b_arfs_capable) {
2332 qede_poll_for_freeing_arfs_filters(edev);
2333 if (edev->ndev->rx_cpu_rmap)
2334 free_irq_cpu_rmap(edev->ndev->rx_cpu_rmap);
2335
2336 edev->ndev->rx_cpu_rmap = NULL;
2337 }
2338 #endif
2339 qede_sync_free_irqs(edev);
2340 goto out;
2341 }
2342
2343 DP_INFO(edev, "Stopped Queues\n");
2344 }
2345
2346 qede_vlan_mark_nonconfigured(edev);
2347 edev->ops->fastpath_stop(edev->cdev);
2348
2349 if (edev->dev_info.common.b_arfs_capable) {
2350 qede_poll_for_freeing_arfs_filters(edev);
2351 qede_free_arfs(edev);
2352 }
2353
2354 /* Release the interrupts */
2355 qede_sync_free_irqs(edev);
2356 edev->ops->common->set_fp_int(edev->cdev, 0);
2357
2358 qede_napi_disable_remove(edev);
2359
2360 if (mode == QEDE_UNLOAD_RECOVERY)
2361 qede_empty_tx_queues(edev);
2362
2363 qede_free_mem_load(edev);
2364 qede_free_fp_array(edev);
2365
2366 out:
2367 if (!is_locked)
2368 __qede_unlock(edev);
2369
2370 if (mode != QEDE_UNLOAD_RECOVERY)
2371 DP_NOTICE(edev, "Link is down\n");
2372
2373 edev->ptp_skip_txts = 0;
2374
2375 DP_INFO(edev, "Ending qede unload\n");
2376 }
2377
2378 enum qede_load_mode {
2379 QEDE_LOAD_NORMAL,
2380 QEDE_LOAD_RELOAD,
2381 QEDE_LOAD_RECOVERY,
2382 };
2383
qede_load(struct qede_dev * edev,enum qede_load_mode mode,bool is_locked)2384 static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
2385 bool is_locked)
2386 {
2387 struct qed_link_params link_params;
2388 struct ethtool_coalesce coal = {};
2389 u8 num_tc;
2390 int rc, i;
2391
2392 DP_INFO(edev, "Starting qede load\n");
2393
2394 if (!is_locked)
2395 __qede_lock(edev);
2396
2397 rc = qede_set_num_queues(edev);
2398 if (rc)
2399 goto out;
2400
2401 rc = qede_alloc_fp_array(edev);
2402 if (rc)
2403 goto out;
2404
2405 qede_init_fp(edev);
2406
2407 rc = qede_alloc_mem_load(edev);
2408 if (rc)
2409 goto err1;
2410 DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
2411 QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
2412
2413 rc = qede_set_real_num_queues(edev);
2414 if (rc)
2415 goto err2;
2416
2417 if (qede_alloc_arfs(edev)) {
2418 edev->ndev->features &= ~NETIF_F_NTUPLE;
2419 edev->dev_info.common.b_arfs_capable = false;
2420 }
2421
2422 qede_napi_add_enable(edev);
2423 DP_INFO(edev, "Napi added and enabled\n");
2424
2425 rc = qede_setup_irqs(edev);
2426 if (rc)
2427 goto err3;
2428 DP_INFO(edev, "Setup IRQs succeeded\n");
2429
2430 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2431 if (rc)
2432 goto err4;
2433 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2434
2435 num_tc = netdev_get_num_tc(edev->ndev);
2436 num_tc = num_tc ? num_tc : edev->dev_info.num_tc;
2437 qede_setup_tc(edev->ndev, num_tc);
2438
2439 /* Program un-configured VLANs */
2440 qede_configure_vlan_filters(edev);
2441
2442 set_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags);
2443
2444 /* Ask for link-up using current configuration */
2445 memset(&link_params, 0, sizeof(link_params));
2446 link_params.link_up = true;
2447 edev->ops->common->set_link(edev->cdev, &link_params);
2448
2449 edev->state = QEDE_STATE_OPEN;
2450
2451 coal.rx_coalesce_usecs = QED_DEFAULT_RX_USECS;
2452 coal.tx_coalesce_usecs = QED_DEFAULT_TX_USECS;
2453
2454 for_each_queue(i) {
2455 if (edev->coal_entry[i].isvalid) {
2456 coal.rx_coalesce_usecs = edev->coal_entry[i].rxc;
2457 coal.tx_coalesce_usecs = edev->coal_entry[i].txc;
2458 }
2459 __qede_unlock(edev);
2460 qede_set_per_coalesce(edev->ndev, i, &coal);
2461 __qede_lock(edev);
2462 }
2463 DP_INFO(edev, "Ending successfully qede load\n");
2464
2465 goto out;
2466 err4:
2467 qede_sync_free_irqs(edev);
2468 err3:
2469 qede_napi_disable_remove(edev);
2470 err2:
2471 qede_free_mem_load(edev);
2472 err1:
2473 edev->ops->common->set_fp_int(edev->cdev, 0);
2474 qede_free_fp_array(edev);
2475 edev->num_queues = 0;
2476 edev->fp_num_tx = 0;
2477 edev->fp_num_rx = 0;
2478 out:
2479 if (!is_locked)
2480 __qede_unlock(edev);
2481
2482 return rc;
2483 }
2484
2485 /* 'func' should be able to run between unload and reload assuming interface
2486 * is actually running, or afterwards in case it's currently DOWN.
2487 */
qede_reload(struct qede_dev * edev,struct qede_reload_args * args,bool is_locked)2488 void qede_reload(struct qede_dev *edev,
2489 struct qede_reload_args *args, bool is_locked)
2490 {
2491 if (!is_locked)
2492 __qede_lock(edev);
2493
2494 /* Since qede_lock is held, internal state wouldn't change even
2495 * if netdev state would start transitioning. Check whether current
2496 * internal configuration indicates device is up, then reload.
2497 */
2498 if (edev->state == QEDE_STATE_OPEN) {
2499 qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
2500 if (args)
2501 args->func(edev, args);
2502 qede_load(edev, QEDE_LOAD_RELOAD, true);
2503
2504 /* Since no one is going to do it for us, re-configure */
2505 qede_config_rx_mode(edev->ndev);
2506 } else if (args) {
2507 args->func(edev, args);
2508 }
2509
2510 if (!is_locked)
2511 __qede_unlock(edev);
2512 }
2513
2514 /* called with rtnl_lock */
qede_open(struct net_device * ndev)2515 static int qede_open(struct net_device *ndev)
2516 {
2517 struct qede_dev *edev = netdev_priv(ndev);
2518 int rc;
2519
2520 netif_carrier_off(ndev);
2521
2522 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2523
2524 rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
2525 if (rc)
2526 return rc;
2527
2528 udp_tunnel_nic_reset_ntf(ndev);
2529
2530 edev->ops->common->update_drv_state(edev->cdev, true);
2531
2532 return 0;
2533 }
2534
qede_close(struct net_device * ndev)2535 static int qede_close(struct net_device *ndev)
2536 {
2537 struct qede_dev *edev = netdev_priv(ndev);
2538
2539 qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
2540
2541 if (edev->cdev)
2542 edev->ops->common->update_drv_state(edev->cdev, false);
2543
2544 return 0;
2545 }
2546
qede_link_update(void * dev,struct qed_link_output * link)2547 static void qede_link_update(void *dev, struct qed_link_output *link)
2548 {
2549 struct qede_dev *edev = dev;
2550
2551 if (!test_bit(QEDE_FLAGS_LINK_REQUESTED, &edev->flags)) {
2552 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not ready\n");
2553 return;
2554 }
2555
2556 if (link->link_up) {
2557 if (!netif_carrier_ok(edev->ndev)) {
2558 DP_NOTICE(edev, "Link is up\n");
2559 netif_tx_start_all_queues(edev->ndev);
2560 netif_carrier_on(edev->ndev);
2561 qede_rdma_dev_event_open(edev);
2562 }
2563 } else {
2564 if (netif_carrier_ok(edev->ndev)) {
2565 DP_NOTICE(edev, "Link is down\n");
2566 netif_tx_disable(edev->ndev);
2567 netif_carrier_off(edev->ndev);
2568 qede_rdma_dev_event_close(edev);
2569 }
2570 }
2571 }
2572
qede_schedule_recovery_handler(void * dev)2573 static void qede_schedule_recovery_handler(void *dev)
2574 {
2575 struct qede_dev *edev = dev;
2576
2577 if (edev->state == QEDE_STATE_RECOVERY) {
2578 DP_NOTICE(edev,
2579 "Avoid scheduling a recovery handling since already in recovery state\n");
2580 return;
2581 }
2582
2583 set_bit(QEDE_SP_RECOVERY, &edev->sp_flags);
2584 schedule_delayed_work(&edev->sp_task, 0);
2585
2586 DP_INFO(edev, "Scheduled a recovery handler\n");
2587 }
2588
qede_recovery_failed(struct qede_dev * edev)2589 static void qede_recovery_failed(struct qede_dev *edev)
2590 {
2591 netdev_err(edev->ndev, "Recovery handling has failed. Power cycle is needed.\n");
2592
2593 netif_device_detach(edev->ndev);
2594
2595 if (edev->cdev)
2596 edev->ops->common->set_power_state(edev->cdev, PCI_D3hot);
2597 }
2598
qede_recovery_handler(struct qede_dev * edev)2599 static void qede_recovery_handler(struct qede_dev *edev)
2600 {
2601 u32 curr_state = edev->state;
2602 int rc;
2603
2604 DP_NOTICE(edev, "Starting a recovery process\n");
2605
2606 /* No need to acquire first the qede_lock since is done by qede_sp_task
2607 * before calling this function.
2608 */
2609 edev->state = QEDE_STATE_RECOVERY;
2610
2611 edev->ops->common->recovery_prolog(edev->cdev);
2612
2613 if (curr_state == QEDE_STATE_OPEN)
2614 qede_unload(edev, QEDE_UNLOAD_RECOVERY, true);
2615
2616 __qede_remove(edev->pdev, QEDE_REMOVE_RECOVERY);
2617
2618 rc = __qede_probe(edev->pdev, edev->dp_module, edev->dp_level,
2619 IS_VF(edev), QEDE_PROBE_RECOVERY);
2620 if (rc) {
2621 edev->cdev = NULL;
2622 goto err;
2623 }
2624
2625 if (curr_state == QEDE_STATE_OPEN) {
2626 rc = qede_load(edev, QEDE_LOAD_RECOVERY, true);
2627 if (rc)
2628 goto err;
2629
2630 qede_config_rx_mode(edev->ndev);
2631 udp_tunnel_nic_reset_ntf(edev->ndev);
2632 }
2633
2634 edev->state = curr_state;
2635
2636 DP_NOTICE(edev, "Recovery handling is done\n");
2637
2638 return;
2639
2640 err:
2641 qede_recovery_failed(edev);
2642 }
2643
qede_atomic_hw_err_handler(struct qede_dev * edev)2644 static void qede_atomic_hw_err_handler(struct qede_dev *edev)
2645 {
2646 struct qed_dev *cdev = edev->cdev;
2647
2648 DP_NOTICE(edev,
2649 "Generic non-sleepable HW error handling started - err_flags 0x%lx\n",
2650 edev->err_flags);
2651
2652 /* Get a call trace of the flow that led to the error */
2653 WARN_ON(test_bit(QEDE_ERR_WARN, &edev->err_flags));
2654
2655 /* Prevent HW attentions from being reasserted */
2656 if (test_bit(QEDE_ERR_ATTN_CLR_EN, &edev->err_flags))
2657 edev->ops->common->attn_clr_enable(cdev, true);
2658
2659 DP_NOTICE(edev, "Generic non-sleepable HW error handling is done\n");
2660 }
2661
qede_generic_hw_err_handler(struct qede_dev * edev)2662 static void qede_generic_hw_err_handler(struct qede_dev *edev)
2663 {
2664 DP_NOTICE(edev,
2665 "Generic sleepable HW error handling started - err_flags 0x%lx\n",
2666 edev->err_flags);
2667
2668 if (edev->devlink) {
2669 DP_NOTICE(edev, "Reporting fatal error to devlink\n");
2670 edev->ops->common->report_fatal_error(edev->devlink, edev->last_err_type);
2671 }
2672
2673 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2674
2675 DP_NOTICE(edev, "Generic sleepable HW error handling is done\n");
2676 }
2677
qede_set_hw_err_flags(struct qede_dev * edev,enum qed_hw_err_type err_type)2678 static void qede_set_hw_err_flags(struct qede_dev *edev,
2679 enum qed_hw_err_type err_type)
2680 {
2681 unsigned long err_flags = 0;
2682
2683 switch (err_type) {
2684 case QED_HW_ERR_DMAE_FAIL:
2685 set_bit(QEDE_ERR_WARN, &err_flags);
2686 fallthrough;
2687 case QED_HW_ERR_MFW_RESP_FAIL:
2688 case QED_HW_ERR_HW_ATTN:
2689 case QED_HW_ERR_RAMROD_FAIL:
2690 case QED_HW_ERR_FW_ASSERT:
2691 set_bit(QEDE_ERR_ATTN_CLR_EN, &err_flags);
2692 set_bit(QEDE_ERR_GET_DBG_INFO, &err_flags);
2693 /* make this error as recoverable and start recovery*/
2694 set_bit(QEDE_ERR_IS_RECOVERABLE, &err_flags);
2695 break;
2696
2697 default:
2698 DP_NOTICE(edev, "Unexpected HW error [%d]\n", err_type);
2699 break;
2700 }
2701
2702 edev->err_flags |= err_flags;
2703 }
2704
qede_schedule_hw_err_handler(void * dev,enum qed_hw_err_type err_type)2705 static void qede_schedule_hw_err_handler(void *dev,
2706 enum qed_hw_err_type err_type)
2707 {
2708 struct qede_dev *edev = dev;
2709
2710 /* Fan failure cannot be masked by handling of another HW error or by a
2711 * concurrent recovery process.
2712 */
2713 if ((test_and_set_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags) ||
2714 edev->state == QEDE_STATE_RECOVERY) &&
2715 err_type != QED_HW_ERR_FAN_FAIL) {
2716 DP_INFO(edev,
2717 "Avoid scheduling an error handling while another HW error is being handled\n");
2718 return;
2719 }
2720
2721 if (err_type >= QED_HW_ERR_LAST) {
2722 DP_NOTICE(edev, "Unknown HW error [%d]\n", err_type);
2723 clear_bit(QEDE_ERR_IS_HANDLED, &edev->err_flags);
2724 return;
2725 }
2726
2727 edev->last_err_type = err_type;
2728 qede_set_hw_err_flags(edev, err_type);
2729 qede_atomic_hw_err_handler(edev);
2730 set_bit(QEDE_SP_HW_ERR, &edev->sp_flags);
2731 schedule_delayed_work(&edev->sp_task, 0);
2732
2733 DP_INFO(edev, "Scheduled a error handler [err_type %d]\n", err_type);
2734 }
2735
qede_is_txq_full(struct qede_dev * edev,struct qede_tx_queue * txq)2736 static bool qede_is_txq_full(struct qede_dev *edev, struct qede_tx_queue *txq)
2737 {
2738 struct netdev_queue *netdev_txq;
2739
2740 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->ndev_txq_id);
2741 if (netif_xmit_stopped(netdev_txq))
2742 return true;
2743
2744 return false;
2745 }
2746
qede_get_generic_tlv_data(void * dev,struct qed_generic_tlvs * data)2747 static void qede_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data)
2748 {
2749 struct qede_dev *edev = dev;
2750 struct netdev_hw_addr *ha;
2751 int i;
2752
2753 if (edev->ndev->features & NETIF_F_IP_CSUM)
2754 data->feat_flags |= QED_TLV_IP_CSUM;
2755 if (edev->ndev->features & NETIF_F_TSO)
2756 data->feat_flags |= QED_TLV_LSO;
2757
2758 ether_addr_copy(data->mac[0], edev->ndev->dev_addr);
2759 eth_zero_addr(data->mac[1]);
2760 eth_zero_addr(data->mac[2]);
2761 /* Copy the first two UC macs */
2762 netif_addr_lock_bh(edev->ndev);
2763 i = 1;
2764 netdev_for_each_uc_addr(ha, edev->ndev) {
2765 ether_addr_copy(data->mac[i++], ha->addr);
2766 if (i == QED_TLV_MAC_COUNT)
2767 break;
2768 }
2769
2770 netif_addr_unlock_bh(edev->ndev);
2771 }
2772
qede_get_eth_tlv_data(void * dev,void * data)2773 static void qede_get_eth_tlv_data(void *dev, void *data)
2774 {
2775 struct qed_mfw_tlv_eth *etlv = data;
2776 struct qede_dev *edev = dev;
2777 struct qede_fastpath *fp;
2778 int i;
2779
2780 etlv->lso_maxoff_size = 0XFFFF;
2781 etlv->lso_maxoff_size_set = true;
2782 etlv->lso_minseg_size = (u16)ETH_TX_LSO_WINDOW_MIN_LEN;
2783 etlv->lso_minseg_size_set = true;
2784 etlv->prom_mode = !!(edev->ndev->flags & IFF_PROMISC);
2785 etlv->prom_mode_set = true;
2786 etlv->tx_descr_size = QEDE_TSS_COUNT(edev);
2787 etlv->tx_descr_size_set = true;
2788 etlv->rx_descr_size = QEDE_RSS_COUNT(edev);
2789 etlv->rx_descr_size_set = true;
2790 etlv->iov_offload = QED_MFW_TLV_IOV_OFFLOAD_VEB;
2791 etlv->iov_offload_set = true;
2792
2793 /* Fill information regarding queues; Should be done under the qede
2794 * lock to guarantee those don't change beneath our feet.
2795 */
2796 etlv->txqs_empty = true;
2797 etlv->rxqs_empty = true;
2798 etlv->num_txqs_full = 0;
2799 etlv->num_rxqs_full = 0;
2800
2801 __qede_lock(edev);
2802 for_each_queue(i) {
2803 fp = &edev->fp_array[i];
2804 if (fp->type & QEDE_FASTPATH_TX) {
2805 struct qede_tx_queue *txq = QEDE_FP_TC0_TXQ(fp);
2806
2807 if (txq->sw_tx_cons != txq->sw_tx_prod)
2808 etlv->txqs_empty = false;
2809 if (qede_is_txq_full(edev, txq))
2810 etlv->num_txqs_full++;
2811 }
2812 if (fp->type & QEDE_FASTPATH_RX) {
2813 if (qede_has_rx_work(fp->rxq))
2814 etlv->rxqs_empty = false;
2815
2816 /* This one is a bit tricky; Firmware might stop
2817 * placing packets if ring is not yet full.
2818 * Give an approximation.
2819 */
2820 if (le16_to_cpu(*fp->rxq->hw_cons_ptr) -
2821 qed_chain_get_cons_idx(&fp->rxq->rx_comp_ring) >
2822 RX_RING_SIZE - 100)
2823 etlv->num_rxqs_full++;
2824 }
2825 }
2826 __qede_unlock(edev);
2827
2828 etlv->txqs_empty_set = true;
2829 etlv->rxqs_empty_set = true;
2830 etlv->num_txqs_full_set = true;
2831 etlv->num_rxqs_full_set = true;
2832 }
2833
2834 /**
2835 * qede_io_error_detected(): Called when PCI error is detected
2836 *
2837 * @pdev: Pointer to PCI device
2838 * @state: The current pci connection state
2839 *
2840 *Return: pci_ers_result_t.
2841 *
2842 * This function is called after a PCI bus error affecting
2843 * this device has been detected.
2844 */
2845 static pci_ers_result_t
qede_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)2846 qede_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2847 {
2848 struct net_device *dev = pci_get_drvdata(pdev);
2849 struct qede_dev *edev = netdev_priv(dev);
2850
2851 if (!edev)
2852 return PCI_ERS_RESULT_NONE;
2853
2854 DP_NOTICE(edev, "IO error detected [%d]\n", state);
2855
2856 __qede_lock(edev);
2857 if (edev->state == QEDE_STATE_RECOVERY) {
2858 DP_NOTICE(edev, "Device already in the recovery state\n");
2859 __qede_unlock(edev);
2860 return PCI_ERS_RESULT_NONE;
2861 }
2862
2863 /* PF handles the recovery of its VFs */
2864 if (IS_VF(edev)) {
2865 DP_VERBOSE(edev, QED_MSG_IOV,
2866 "VF recovery is handled by its PF\n");
2867 __qede_unlock(edev);
2868 return PCI_ERS_RESULT_RECOVERED;
2869 }
2870
2871 /* Close OS Tx */
2872 netif_tx_disable(edev->ndev);
2873 netif_carrier_off(edev->ndev);
2874
2875 set_bit(QEDE_SP_AER, &edev->sp_flags);
2876 schedule_delayed_work(&edev->sp_task, 0);
2877
2878 __qede_unlock(edev);
2879
2880 return PCI_ERS_RESULT_CAN_RECOVER;
2881 }
2882