1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4 *
5 * Copyright (C) 2011-2013 ASIX
6 */
7
8 #include <linux/module.h>
9 #include <linux/etherdevice.h>
10 #include <linux/mii.h>
11 #include <linux/usb.h>
12 #include <linux/crc32.h>
13 #include <linux/usb/usbnet.h>
14 #include <uapi/linux/mdio.h>
15 #include <linux/mdio.h>
16
17 #define AX88179_PHY_ID 0x03
18 #define AX_EEPROM_LEN 0x100
19 #define AX88179_EEPROM_MAGIC 0x17900b95
20 #define AX_MCAST_FLTSIZE 8
21 #define AX_MAX_MCAST 64
22 #define AX_INT_PPLS_LINK ((u32)BIT(16))
23 #define AX_RXHDR_L4_TYPE_MASK 0x1c
24 #define AX_RXHDR_L4_TYPE_UDP 4
25 #define AX_RXHDR_L4_TYPE_TCP 16
26 #define AX_RXHDR_L3CSUM_ERR 2
27 #define AX_RXHDR_L4CSUM_ERR 1
28 #define AX_RXHDR_CRC_ERR ((u32)BIT(29))
29 #define AX_RXHDR_DROP_ERR ((u32)BIT(31))
30 #define AX_ACCESS_MAC 0x01
31 #define AX_ACCESS_PHY 0x02
32 #define AX_ACCESS_EEPROM 0x04
33 #define AX_ACCESS_EFUS 0x05
34 #define AX_RELOAD_EEPROM_EFUSE 0x06
35 #define AX_PAUSE_WATERLVL_HIGH 0x54
36 #define AX_PAUSE_WATERLVL_LOW 0x55
37
38 #define PHYSICAL_LINK_STATUS 0x02
39 #define AX_USB_SS 0x04
40 #define AX_USB_HS 0x02
41
42 #define GENERAL_STATUS 0x03
43 /* Check AX88179 version. UA1:Bit2 = 0, UA2:Bit2 = 1 */
44 #define AX_SECLD 0x04
45
46 #define AX_SROM_ADDR 0x07
47 #define AX_SROM_CMD 0x0a
48 #define EEP_RD 0x04
49 #define EEP_BUSY 0x10
50
51 #define AX_SROM_DATA_LOW 0x08
52 #define AX_SROM_DATA_HIGH 0x09
53
54 #define AX_RX_CTL 0x0b
55 #define AX_RX_CTL_DROPCRCERR 0x0100
56 #define AX_RX_CTL_IPE 0x0200
57 #define AX_RX_CTL_START 0x0080
58 #define AX_RX_CTL_AP 0x0020
59 #define AX_RX_CTL_AM 0x0010
60 #define AX_RX_CTL_AB 0x0008
61 #define AX_RX_CTL_AMALL 0x0002
62 #define AX_RX_CTL_PRO 0x0001
63 #define AX_RX_CTL_STOP 0x0000
64
65 #define AX_NODE_ID 0x10
66 #define AX_MULFLTARY 0x16
67
68 #define AX_MEDIUM_STATUS_MODE 0x22
69 #define AX_MEDIUM_GIGAMODE 0x01
70 #define AX_MEDIUM_FULL_DUPLEX 0x02
71 #define AX_MEDIUM_EN_125MHZ 0x08
72 #define AX_MEDIUM_RXFLOW_CTRLEN 0x10
73 #define AX_MEDIUM_TXFLOW_CTRLEN 0x20
74 #define AX_MEDIUM_RECEIVE_EN 0x100
75 #define AX_MEDIUM_PS 0x200
76 #define AX_MEDIUM_JUMBO_EN 0x8040
77
78 #define AX_MONITOR_MOD 0x24
79 #define AX_MONITOR_MODE_RWLC 0x02
80 #define AX_MONITOR_MODE_RWMP 0x04
81 #define AX_MONITOR_MODE_PMEPOL 0x20
82 #define AX_MONITOR_MODE_PMETYPE 0x40
83
84 #define AX_GPIO_CTRL 0x25
85 #define AX_GPIO_CTRL_GPIO3EN 0x80
86 #define AX_GPIO_CTRL_GPIO2EN 0x40
87 #define AX_GPIO_CTRL_GPIO1EN 0x20
88
89 #define AX_PHYPWR_RSTCTL 0x26
90 #define AX_PHYPWR_RSTCTL_BZ 0x0010
91 #define AX_PHYPWR_RSTCTL_IPRL 0x0020
92 #define AX_PHYPWR_RSTCTL_AT 0x1000
93
94 #define AX_RX_BULKIN_QCTRL 0x2e
95 #define AX_CLK_SELECT 0x33
96 #define AX_CLK_SELECT_BCS 0x01
97 #define AX_CLK_SELECT_ACS 0x02
98 #define AX_CLK_SELECT_ULR 0x08
99
100 #define AX_RXCOE_CTL 0x34
101 #define AX_RXCOE_IP 0x01
102 #define AX_RXCOE_TCP 0x02
103 #define AX_RXCOE_UDP 0x04
104 #define AX_RXCOE_TCPV6 0x20
105 #define AX_RXCOE_UDPV6 0x40
106
107 #define AX_TXCOE_CTL 0x35
108 #define AX_TXCOE_IP 0x01
109 #define AX_TXCOE_TCP 0x02
110 #define AX_TXCOE_UDP 0x04
111 #define AX_TXCOE_TCPV6 0x20
112 #define AX_TXCOE_UDPV6 0x40
113
114 #define AX_LEDCTRL 0x73
115
116 #define GMII_PHY_PHYSR 0x11
117 #define GMII_PHY_PHYSR_SMASK 0xc000
118 #define GMII_PHY_PHYSR_GIGA 0x8000
119 #define GMII_PHY_PHYSR_100 0x4000
120 #define GMII_PHY_PHYSR_FULL 0x2000
121 #define GMII_PHY_PHYSR_LINK 0x400
122
123 #define GMII_LED_ACT 0x1a
124 #define GMII_LED_ACTIVE_MASK 0xff8f
125 #define GMII_LED0_ACTIVE BIT(4)
126 #define GMII_LED1_ACTIVE BIT(5)
127 #define GMII_LED2_ACTIVE BIT(6)
128
129 #define GMII_LED_LINK 0x1c
130 #define GMII_LED_LINK_MASK 0xf888
131 #define GMII_LED0_LINK_10 BIT(0)
132 #define GMII_LED0_LINK_100 BIT(1)
133 #define GMII_LED0_LINK_1000 BIT(2)
134 #define GMII_LED1_LINK_10 BIT(4)
135 #define GMII_LED1_LINK_100 BIT(5)
136 #define GMII_LED1_LINK_1000 BIT(6)
137 #define GMII_LED2_LINK_10 BIT(8)
138 #define GMII_LED2_LINK_100 BIT(9)
139 #define GMII_LED2_LINK_1000 BIT(10)
140 #define LED0_ACTIVE BIT(0)
141 #define LED0_LINK_10 BIT(1)
142 #define LED0_LINK_100 BIT(2)
143 #define LED0_LINK_1000 BIT(3)
144 #define LED0_FD BIT(4)
145 #define LED0_USB3_MASK 0x001f
146 #define LED1_ACTIVE BIT(5)
147 #define LED1_LINK_10 BIT(6)
148 #define LED1_LINK_100 BIT(7)
149 #define LED1_LINK_1000 BIT(8)
150 #define LED1_FD BIT(9)
151 #define LED1_USB3_MASK 0x03e0
152 #define LED2_ACTIVE BIT(10)
153 #define LED2_LINK_1000 BIT(13)
154 #define LED2_LINK_100 BIT(12)
155 #define LED2_LINK_10 BIT(11)
156 #define LED2_FD BIT(14)
157 #define LED_VALID BIT(15)
158 #define LED2_USB3_MASK 0x7c00
159
160 #define GMII_PHYPAGE 0x1e
161 #define GMII_PHY_PAGE_SELECT 0x1f
162 #define GMII_PHY_PGSEL_EXT 0x0007
163 #define GMII_PHY_PGSEL_PAGE0 0x0000
164 #define GMII_PHY_PGSEL_PAGE3 0x0003
165 #define GMII_PHY_PGSEL_PAGE5 0x0005
166
167 static int ax88179_reset(struct usbnet *dev);
168
169 struct ax88179_data {
170 u8 eee_enabled;
171 u8 eee_active;
172 u16 rxctl;
173 u8 in_pm;
174 u32 wol_supported;
175 u32 wolopts;
176 u8 disconnecting;
177 };
178
179 struct ax88179_int_data {
180 __le32 intdata1;
181 __le32 intdata2;
182 };
183
184 static const struct {
185 unsigned char ctrl, timer_l, timer_h, size, ifg;
186 } AX88179_BULKIN_SIZE[] = {
187 {7, 0x4f, 0, 0x12, 0xff},
188 {7, 0x20, 3, 0x16, 0xff},
189 {7, 0xae, 7, 0x18, 0xff},
190 {7, 0xcc, 0x4c, 0x18, 8},
191 };
192
ax88179_set_pm_mode(struct usbnet * dev,bool pm_mode)193 static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
194 {
195 struct ax88179_data *ax179_data = dev->driver_priv;
196
197 ax179_data->in_pm = pm_mode;
198 }
199
ax88179_in_pm(struct usbnet * dev)200 static int ax88179_in_pm(struct usbnet *dev)
201 {
202 struct ax88179_data *ax179_data = dev->driver_priv;
203
204 return ax179_data->in_pm;
205 }
206
__ax88179_read_cmd(struct usbnet * dev,u8 cmd,u16 value,u16 index,u16 size,void * data)207 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
208 u16 size, void *data)
209 {
210 int ret;
211 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
212 struct ax88179_data *ax179_data = dev->driver_priv;
213
214 BUG_ON(!dev);
215
216 if (!ax88179_in_pm(dev))
217 fn = usbnet_read_cmd;
218 else
219 fn = usbnet_read_cmd_nopm;
220
221 ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
222 value, index, data, size);
223
224 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
225 netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
226 index, ret);
227
228 return ret;
229 }
230
__ax88179_write_cmd(struct usbnet * dev,u8 cmd,u16 value,u16 index,u16 size,const void * data)231 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
232 u16 size, const void *data)
233 {
234 int ret;
235 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
236 struct ax88179_data *ax179_data = dev->driver_priv;
237
238 BUG_ON(!dev);
239
240 if (!ax88179_in_pm(dev))
241 fn = usbnet_write_cmd;
242 else
243 fn = usbnet_write_cmd_nopm;
244
245 ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
246 value, index, data, size);
247
248 if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
249 netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
250 index, ret);
251
252 return ret;
253 }
254
ax88179_write_cmd_async(struct usbnet * dev,u8 cmd,u16 value,u16 index,u16 size,void * data)255 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
256 u16 index, u16 size, void *data)
257 {
258 u16 buf;
259
260 if (2 == size) {
261 buf = *((u16 *)data);
262 cpu_to_le16s(&buf);
263 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
264 USB_RECIP_DEVICE, value, index, &buf,
265 size);
266 } else {
267 usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
268 USB_RECIP_DEVICE, value, index, data,
269 size);
270 }
271 }
272
ax88179_read_cmd(struct usbnet * dev,u8 cmd,u16 value,u16 index,u16 size,void * data)273 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
274 u16 size, void *data)
275 {
276 int ret;
277
278 if (2 == size) {
279 u16 buf = 0;
280 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
281 le16_to_cpus(&buf);
282 *((u16 *)data) = buf;
283 } else if (4 == size) {
284 u32 buf = 0;
285 ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
286 le32_to_cpus(&buf);
287 *((u32 *)data) = buf;
288 } else {
289 ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
290 }
291
292 return ret;
293 }
294
ax88179_write_cmd(struct usbnet * dev,u8 cmd,u16 value,u16 index,u16 size,const void * data)295 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
296 u16 size, const void *data)
297 {
298 int ret;
299
300 if (2 == size) {
301 u16 buf;
302 buf = *((u16 *)data);
303 cpu_to_le16s(&buf);
304 ret = __ax88179_write_cmd(dev, cmd, value, index,
305 size, &buf);
306 } else {
307 ret = __ax88179_write_cmd(dev, cmd, value, index,
308 size, data);
309 }
310
311 return ret;
312 }
313
ax88179_status(struct usbnet * dev,struct urb * urb)314 static void ax88179_status(struct usbnet *dev, struct urb *urb)
315 {
316 struct ax88179_int_data *event;
317 u32 link;
318
319 if (urb->actual_length < 8)
320 return;
321
322 event = urb->transfer_buffer;
323 le32_to_cpus((void *)&event->intdata1);
324
325 link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
326
327 if (netif_carrier_ok(dev->net) != link) {
328 usbnet_link_change(dev, link, 1);
329 netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
330 }
331 }
332
ax88179_mdio_read(struct net_device * netdev,int phy_id,int loc)333 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
334 {
335 struct usbnet *dev = netdev_priv(netdev);
336 u16 res;
337
338 ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
339 return res;
340 }
341
ax88179_mdio_write(struct net_device * netdev,int phy_id,int loc,int val)342 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
343 int val)
344 {
345 struct usbnet *dev = netdev_priv(netdev);
346 u16 res = (u16) val;
347
348 ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
349 }
350
ax88179_phy_mmd_indirect(struct usbnet * dev,u16 prtad,u16 devad)351 static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
352 u16 devad)
353 {
354 u16 tmp16;
355 int ret;
356
357 tmp16 = devad;
358 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
359 MII_MMD_CTRL, 2, &tmp16);
360
361 tmp16 = prtad;
362 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
363 MII_MMD_DATA, 2, &tmp16);
364
365 tmp16 = devad | MII_MMD_CTRL_NOINCR;
366 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
367 MII_MMD_CTRL, 2, &tmp16);
368
369 return ret;
370 }
371
372 static int
ax88179_phy_read_mmd_indirect(struct usbnet * dev,u16 prtad,u16 devad)373 ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
374 {
375 int ret;
376 u16 tmp16;
377
378 ax88179_phy_mmd_indirect(dev, prtad, devad);
379
380 ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
381 MII_MMD_DATA, 2, &tmp16);
382 if (ret < 0)
383 return ret;
384
385 return tmp16;
386 }
387
388 static int
ax88179_phy_write_mmd_indirect(struct usbnet * dev,u16 prtad,u16 devad,u16 data)389 ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
390 u16 data)
391 {
392 int ret;
393
394 ax88179_phy_mmd_indirect(dev, prtad, devad);
395
396 ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
397 MII_MMD_DATA, 2, &data);
398
399 if (ret < 0)
400 return ret;
401
402 return 0;
403 }
404
ax88179_suspend(struct usb_interface * intf,pm_message_t message)405 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
406 {
407 struct usbnet *dev = usb_get_intfdata(intf);
408 struct ax88179_data *priv = dev->driver_priv;
409 u16 tmp16;
410 u8 tmp8;
411
412 ax88179_set_pm_mode(dev, true);
413
414 usbnet_suspend(intf, message);
415
416 /* Enable WoL */
417 if (priv->wolopts) {
418 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
419 1, 1, &tmp8);
420 if (priv->wolopts & WAKE_PHY)
421 tmp8 |= AX_MONITOR_MODE_RWLC;
422 if (priv->wolopts & WAKE_MAGIC)
423 tmp8 |= AX_MONITOR_MODE_RWMP;
424
425 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
426 1, 1, &tmp8);
427 }
428
429 /* Disable RX path */
430 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
431 2, 2, &tmp16);
432 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
433 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
434 2, 2, &tmp16);
435
436 /* Force bulk-in zero length */
437 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
438 2, 2, &tmp16);
439
440 tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
441 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
442 2, 2, &tmp16);
443
444 /* change clock */
445 tmp8 = 0;
446 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
447
448 /* Configure RX control register => stop operation */
449 tmp16 = AX_RX_CTL_STOP;
450 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
451
452 ax88179_set_pm_mode(dev, false);
453
454 return 0;
455 }
456
457 /* This function is used to enable the autodetach function. */
458 /* This function is determined by offset 0x43 of EEPROM */
ax88179_auto_detach(struct usbnet * dev)459 static int ax88179_auto_detach(struct usbnet *dev)
460 {
461 u16 tmp16;
462 u8 tmp8;
463
464 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
465 return 0;
466
467 if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
468 return 0;
469
470 /* Enable Auto Detach bit */
471 tmp8 = 0;
472 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
473 tmp8 |= AX_CLK_SELECT_ULR;
474 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
475
476 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
477 tmp16 |= AX_PHYPWR_RSTCTL_AT;
478 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
479
480 return 0;
481 }
482
ax88179_resume(struct usb_interface * intf)483 static int ax88179_resume(struct usb_interface *intf)
484 {
485 struct usbnet *dev = usb_get_intfdata(intf);
486 u16 tmp16;
487 u8 tmp8;
488
489 ax88179_set_pm_mode(dev, true);
490
491 usbnet_link_change(dev, 0, 0);
492
493 /* Power up ethernet PHY */
494 tmp16 = 0;
495 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
496 2, 2, &tmp16);
497 udelay(1000);
498
499 tmp16 = AX_PHYPWR_RSTCTL_IPRL;
500 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
501 2, 2, &tmp16);
502 msleep(200);
503
504 /* Ethernet PHY Auto Detach*/
505 ax88179_auto_detach(dev);
506
507 /* Enable clock */
508 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
509 tmp8 |= AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
510 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
511 msleep(100);
512
513 /* Configure RX control register => start operation */
514 tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
515 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
516 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
517
518 ax88179_set_pm_mode(dev, false);
519
520 return usbnet_resume(intf);
521 }
522
ax88179_disconnect(struct usb_interface * intf)523 static void ax88179_disconnect(struct usb_interface *intf)
524 {
525 struct usbnet *dev = usb_get_intfdata(intf);
526 struct ax88179_data *ax179_data;
527
528 if (!dev)
529 return;
530
531 ax179_data = dev->driver_priv;
532 ax179_data->disconnecting = 1;
533
534 usbnet_disconnect(intf);
535 }
536
537 static void
ax88179_get_wol(struct net_device * net,struct ethtool_wolinfo * wolinfo)538 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
539 {
540 struct usbnet *dev = netdev_priv(net);
541 struct ax88179_data *priv = dev->driver_priv;
542
543 wolinfo->supported = priv->wol_supported;
544 wolinfo->wolopts = priv->wolopts;
545 }
546
547 static int
ax88179_set_wol(struct net_device * net,struct ethtool_wolinfo * wolinfo)548 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
549 {
550 struct usbnet *dev = netdev_priv(net);
551 struct ax88179_data *priv = dev->driver_priv;
552
553 if (wolinfo->wolopts & ~(priv->wol_supported))
554 return -EINVAL;
555
556 priv->wolopts = wolinfo->wolopts;
557
558 return 0;
559 }
560
ax88179_get_eeprom_len(struct net_device * net)561 static int ax88179_get_eeprom_len(struct net_device *net)
562 {
563 return AX_EEPROM_LEN;
564 }
565
566 static int
ax88179_get_eeprom(struct net_device * net,struct ethtool_eeprom * eeprom,u8 * data)567 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
568 u8 *data)
569 {
570 struct usbnet *dev = netdev_priv(net);
571 u16 *eeprom_buff;
572 int first_word, last_word;
573 int i, ret;
574
575 if (eeprom->len == 0)
576 return -EINVAL;
577
578 eeprom->magic = AX88179_EEPROM_MAGIC;
579
580 first_word = eeprom->offset >> 1;
581 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
582 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
583 GFP_KERNEL);
584 if (!eeprom_buff)
585 return -ENOMEM;
586
587 /* ax88179/178A returns 2 bytes from eeprom on read */
588 for (i = first_word; i <= last_word; i++) {
589 ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
590 &eeprom_buff[i - first_word]);
591 if (ret < 0) {
592 kfree(eeprom_buff);
593 return -EIO;
594 }
595 }
596
597 memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
598 kfree(eeprom_buff);
599 return 0;
600 }
601
602 static int
ax88179_set_eeprom(struct net_device * net,struct ethtool_eeprom * eeprom,u8 * data)603 ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
604 u8 *data)
605 {
606 struct usbnet *dev = netdev_priv(net);
607 u16 *eeprom_buff;
608 int first_word;
609 int last_word;
610 int ret;
611 int i;
612
613 netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
614 eeprom->len, eeprom->offset, eeprom->magic);
615
616 if (eeprom->len == 0)
617 return -EINVAL;
618
619 if (eeprom->magic != AX88179_EEPROM_MAGIC)
620 return -EINVAL;
621
622 first_word = eeprom->offset >> 1;
623 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
624
625 eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
626 GFP_KERNEL);
627 if (!eeprom_buff)
628 return -ENOMEM;
629
630 /* align data to 16 bit boundaries, read the missing data from
631 the EEPROM */
632 if (eeprom->offset & 1) {
633 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
634 &eeprom_buff[0]);
635 if (ret < 0) {
636 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
637 goto free;
638 }
639 }
640
641 if ((eeprom->offset + eeprom->len) & 1) {
642 ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
643 &eeprom_buff[last_word - first_word]);
644 if (ret < 0) {
645 netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
646 goto free;
647 }
648 }
649
650 memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
651
652 for (i = first_word; i <= last_word; i++) {
653 netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
654 i, eeprom_buff[i - first_word]);
655 ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
656 &eeprom_buff[i - first_word]);
657 if (ret < 0) {
658 netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
659 goto free;
660 }
661 msleep(20);
662 }
663
664 /* reload EEPROM data */
665 ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
666 if (ret < 0) {
667 netdev_err(net, "Failed to reload EEPROM data\n");
668 goto free;
669 }
670
671 ret = 0;
672 free:
673 kfree(eeprom_buff);
674 return ret;
675 }
676
ax88179_get_link_ksettings(struct net_device * net,struct ethtool_link_ksettings * cmd)677 static int ax88179_get_link_ksettings(struct net_device *net,
678 struct ethtool_link_ksettings *cmd)
679 {
680 struct usbnet *dev = netdev_priv(net);
681
682 mii_ethtool_get_link_ksettings(&dev->mii, cmd);
683
684 return 0;
685 }
686
ax88179_set_link_ksettings(struct net_device * net,const struct ethtool_link_ksettings * cmd)687 static int ax88179_set_link_ksettings(struct net_device *net,
688 const struct ethtool_link_ksettings *cmd)
689 {
690 struct usbnet *dev = netdev_priv(net);
691 return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
692 }
693
694 static int
ax88179_ethtool_get_eee(struct usbnet * dev,struct ethtool_eee * data)695 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_eee *data)
696 {
697 int val;
698
699 /* Get Supported EEE */
700 val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
701 MDIO_MMD_PCS);
702 if (val < 0)
703 return val;
704 data->supported = mmd_eee_cap_to_ethtool_sup_t(val);
705
706 /* Get advertisement EEE */
707 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
708 MDIO_MMD_AN);
709 if (val < 0)
710 return val;
711 data->advertised = mmd_eee_adv_to_ethtool_adv_t(val);
712
713 /* Get LP advertisement EEE */
714 val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
715 MDIO_MMD_AN);
716 if (val < 0)
717 return val;
718 data->lp_advertised = mmd_eee_adv_to_ethtool_adv_t(val);
719
720 return 0;
721 }
722
723 static int
ax88179_ethtool_set_eee(struct usbnet * dev,struct ethtool_eee * data)724 ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_eee *data)
725 {
726 u16 tmp16 = ethtool_adv_to_mmd_eee_adv_t(data->advertised);
727
728 return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
729 MDIO_MMD_AN, tmp16);
730 }
731
ax88179_chk_eee(struct usbnet * dev)732 static int ax88179_chk_eee(struct usbnet *dev)
733 {
734 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
735 struct ax88179_data *priv = dev->driver_priv;
736
737 mii_ethtool_gset(&dev->mii, &ecmd);
738
739 if (ecmd.duplex & DUPLEX_FULL) {
740 int eee_lp, eee_cap, eee_adv;
741 u32 lp, cap, adv, supported = 0;
742
743 eee_cap = ax88179_phy_read_mmd_indirect(dev,
744 MDIO_PCS_EEE_ABLE,
745 MDIO_MMD_PCS);
746 if (eee_cap < 0) {
747 priv->eee_active = 0;
748 return false;
749 }
750
751 cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
752 if (!cap) {
753 priv->eee_active = 0;
754 return false;
755 }
756
757 eee_lp = ax88179_phy_read_mmd_indirect(dev,
758 MDIO_AN_EEE_LPABLE,
759 MDIO_MMD_AN);
760 if (eee_lp < 0) {
761 priv->eee_active = 0;
762 return false;
763 }
764
765 eee_adv = ax88179_phy_read_mmd_indirect(dev,
766 MDIO_AN_EEE_ADV,
767 MDIO_MMD_AN);
768
769 if (eee_adv < 0) {
770 priv->eee_active = 0;
771 return false;
772 }
773
774 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
775 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
776 supported = (ecmd.speed == SPEED_1000) ?
777 SUPPORTED_1000baseT_Full :
778 SUPPORTED_100baseT_Full;
779
780 if (!(lp & adv & supported)) {
781 priv->eee_active = 0;
782 return false;
783 }
784
785 priv->eee_active = 1;
786 return true;
787 }
788
789 priv->eee_active = 0;
790 return false;
791 }
792
ax88179_disable_eee(struct usbnet * dev)793 static void ax88179_disable_eee(struct usbnet *dev)
794 {
795 u16 tmp16;
796
797 tmp16 = GMII_PHY_PGSEL_PAGE3;
798 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
799 GMII_PHY_PAGE_SELECT, 2, &tmp16);
800
801 tmp16 = 0x3246;
802 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
803 MII_PHYADDR, 2, &tmp16);
804
805 tmp16 = GMII_PHY_PGSEL_PAGE0;
806 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
807 GMII_PHY_PAGE_SELECT, 2, &tmp16);
808 }
809
ax88179_enable_eee(struct usbnet * dev)810 static void ax88179_enable_eee(struct usbnet *dev)
811 {
812 u16 tmp16;
813
814 tmp16 = GMII_PHY_PGSEL_PAGE3;
815 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
816 GMII_PHY_PAGE_SELECT, 2, &tmp16);
817
818 tmp16 = 0x3247;
819 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
820 MII_PHYADDR, 2, &tmp16);
821
822 tmp16 = GMII_PHY_PGSEL_PAGE5;
823 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
824 GMII_PHY_PAGE_SELECT, 2, &tmp16);
825
826 tmp16 = 0x0680;
827 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
828 MII_BMSR, 2, &tmp16);
829
830 tmp16 = GMII_PHY_PGSEL_PAGE0;
831 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
832 GMII_PHY_PAGE_SELECT, 2, &tmp16);
833 }
834
ax88179_get_eee(struct net_device * net,struct ethtool_eee * edata)835 static int ax88179_get_eee(struct net_device *net, struct ethtool_eee *edata)
836 {
837 struct usbnet *dev = netdev_priv(net);
838 struct ax88179_data *priv = dev->driver_priv;
839
840 edata->eee_enabled = priv->eee_enabled;
841 edata->eee_active = priv->eee_active;
842
843 return ax88179_ethtool_get_eee(dev, edata);
844 }
845
ax88179_set_eee(struct net_device * net,struct ethtool_eee * edata)846 static int ax88179_set_eee(struct net_device *net, struct ethtool_eee *edata)
847 {
848 struct usbnet *dev = netdev_priv(net);
849 struct ax88179_data *priv = dev->driver_priv;
850 int ret;
851
852 priv->eee_enabled = edata->eee_enabled;
853 if (!priv->eee_enabled) {
854 ax88179_disable_eee(dev);
855 } else {
856 priv->eee_enabled = ax88179_chk_eee(dev);
857 if (!priv->eee_enabled)
858 return -EOPNOTSUPP;
859
860 ax88179_enable_eee(dev);
861 }
862
863 ret = ax88179_ethtool_set_eee(dev, edata);
864 if (ret)
865 return ret;
866
867 mii_nway_restart(&dev->mii);
868
869 usbnet_link_change(dev, 0, 0);
870
871 return ret;
872 }
873
ax88179_ioctl(struct net_device * net,struct ifreq * rq,int cmd)874 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
875 {
876 struct usbnet *dev = netdev_priv(net);
877 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
878 }
879
880 static const struct ethtool_ops ax88179_ethtool_ops = {
881 .get_link = ethtool_op_get_link,
882 .get_msglevel = usbnet_get_msglevel,
883 .set_msglevel = usbnet_set_msglevel,
884 .get_wol = ax88179_get_wol,
885 .set_wol = ax88179_set_wol,
886 .get_eeprom_len = ax88179_get_eeprom_len,
887 .get_eeprom = ax88179_get_eeprom,
888 .set_eeprom = ax88179_set_eeprom,
889 .get_eee = ax88179_get_eee,
890 .set_eee = ax88179_set_eee,
891 .nway_reset = usbnet_nway_reset,
892 .get_link_ksettings = ax88179_get_link_ksettings,
893 .set_link_ksettings = ax88179_set_link_ksettings,
894 .get_ts_info = ethtool_op_get_ts_info,
895 };
896
ax88179_set_multicast(struct net_device * net)897 static void ax88179_set_multicast(struct net_device *net)
898 {
899 struct usbnet *dev = netdev_priv(net);
900 struct ax88179_data *data = dev->driver_priv;
901 u8 *m_filter = ((u8 *)dev->data);
902
903 data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
904
905 if (net->flags & IFF_PROMISC) {
906 data->rxctl |= AX_RX_CTL_PRO;
907 } else if (net->flags & IFF_ALLMULTI ||
908 netdev_mc_count(net) > AX_MAX_MCAST) {
909 data->rxctl |= AX_RX_CTL_AMALL;
910 } else if (netdev_mc_empty(net)) {
911 /* just broadcast and directed */
912 } else {
913 /* We use dev->data for our 8 byte filter buffer
914 * to avoid allocating memory that is tricky to free later
915 */
916 u32 crc_bits;
917 struct netdev_hw_addr *ha;
918
919 memset(m_filter, 0, AX_MCAST_FLTSIZE);
920
921 netdev_for_each_mc_addr(ha, net) {
922 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
923 *(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
924 }
925
926 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
927 AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
928 m_filter);
929
930 data->rxctl |= AX_RX_CTL_AM;
931 }
932
933 ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
934 2, 2, &data->rxctl);
935 }
936
937 static int
ax88179_set_features(struct net_device * net,netdev_features_t features)938 ax88179_set_features(struct net_device *net, netdev_features_t features)
939 {
940 u8 tmp;
941 struct usbnet *dev = netdev_priv(net);
942 netdev_features_t changed = net->features ^ features;
943
944 if (changed & NETIF_F_IP_CSUM) {
945 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
946 tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
947 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
948 }
949
950 if (changed & NETIF_F_IPV6_CSUM) {
951 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
952 tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
953 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
954 }
955
956 if (changed & NETIF_F_RXCSUM) {
957 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
958 tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
959 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
960 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
961 }
962
963 return 0;
964 }
965
ax88179_change_mtu(struct net_device * net,int new_mtu)966 static int ax88179_change_mtu(struct net_device *net, int new_mtu)
967 {
968 struct usbnet *dev = netdev_priv(net);
969 u16 tmp16;
970
971 net->mtu = new_mtu;
972 dev->hard_mtu = net->mtu + net->hard_header_len;
973
974 if (net->mtu > 1500) {
975 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
976 2, 2, &tmp16);
977 tmp16 |= AX_MEDIUM_JUMBO_EN;
978 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
979 2, 2, &tmp16);
980 } else {
981 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
982 2, 2, &tmp16);
983 tmp16 &= ~AX_MEDIUM_JUMBO_EN;
984 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
985 2, 2, &tmp16);
986 }
987
988 /* max qlen depend on hard_mtu and rx_urb_size */
989 usbnet_update_max_qlen(dev);
990
991 return 0;
992 }
993
ax88179_set_mac_addr(struct net_device * net,void * p)994 static int ax88179_set_mac_addr(struct net_device *net, void *p)
995 {
996 struct usbnet *dev = netdev_priv(net);
997 struct sockaddr *addr = p;
998 int ret;
999
1000 if (netif_running(net))
1001 return -EBUSY;
1002 if (!is_valid_ether_addr(addr->sa_data))
1003 return -EADDRNOTAVAIL;
1004
1005 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
1006
1007 /* Set the MAC address */
1008 ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1009 ETH_ALEN, net->dev_addr);
1010 if (ret < 0)
1011 return ret;
1012
1013 return 0;
1014 }
1015
1016 static const struct net_device_ops ax88179_netdev_ops = {
1017 .ndo_open = usbnet_open,
1018 .ndo_stop = usbnet_stop,
1019 .ndo_start_xmit = usbnet_start_xmit,
1020 .ndo_tx_timeout = usbnet_tx_timeout,
1021 .ndo_get_stats64 = dev_get_tstats64,
1022 .ndo_change_mtu = ax88179_change_mtu,
1023 .ndo_set_mac_address = ax88179_set_mac_addr,
1024 .ndo_validate_addr = eth_validate_addr,
1025 .ndo_eth_ioctl = ax88179_ioctl,
1026 .ndo_set_rx_mode = ax88179_set_multicast,
1027 .ndo_set_features = ax88179_set_features,
1028 };
1029
ax88179_check_eeprom(struct usbnet * dev)1030 static int ax88179_check_eeprom(struct usbnet *dev)
1031 {
1032 u8 i, buf, eeprom[20];
1033 u16 csum, delay = HZ / 10;
1034 unsigned long jtimeout;
1035
1036 /* Read EEPROM content */
1037 for (i = 0; i < 6; i++) {
1038 buf = i;
1039 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1040 1, 1, &buf) < 0)
1041 return -EINVAL;
1042
1043 buf = EEP_RD;
1044 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1045 1, 1, &buf) < 0)
1046 return -EINVAL;
1047
1048 jtimeout = jiffies + delay;
1049 do {
1050 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1051 1, 1, &buf);
1052
1053 if (time_after(jiffies, jtimeout))
1054 return -EINVAL;
1055
1056 } while (buf & EEP_BUSY);
1057
1058 __ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1059 2, 2, &eeprom[i * 2]);
1060
1061 if ((i == 0) && (eeprom[0] == 0xFF))
1062 return -EINVAL;
1063 }
1064
1065 csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1066 csum = (csum >> 8) + (csum & 0xff);
1067 if ((csum + eeprom[10]) != 0xff)
1068 return -EINVAL;
1069
1070 return 0;
1071 }
1072
ax88179_check_efuse(struct usbnet * dev,u16 * ledmode)1073 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1074 {
1075 u8 i;
1076 u8 efuse[64];
1077 u16 csum = 0;
1078
1079 if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1080 return -EINVAL;
1081
1082 if (*efuse == 0xFF)
1083 return -EINVAL;
1084
1085 for (i = 0; i < 64; i++)
1086 csum = csum + efuse[i];
1087
1088 while (csum > 255)
1089 csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1090
1091 if (csum != 0xFF)
1092 return -EINVAL;
1093
1094 *ledmode = (efuse[51] << 8) | efuse[52];
1095
1096 return 0;
1097 }
1098
ax88179_convert_old_led(struct usbnet * dev,u16 * ledvalue)1099 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1100 {
1101 u16 led;
1102
1103 /* Loaded the old eFuse LED Mode */
1104 if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1105 return -EINVAL;
1106
1107 led >>= 8;
1108 switch (led) {
1109 case 0xFF:
1110 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1111 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1112 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1113 break;
1114 case 0xFE:
1115 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1116 break;
1117 case 0xFD:
1118 led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1119 LED2_LINK_10 | LED_VALID;
1120 break;
1121 case 0xFC:
1122 led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1123 LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1124 break;
1125 default:
1126 led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1127 LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1128 LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1129 break;
1130 }
1131
1132 *ledvalue = led;
1133
1134 return 0;
1135 }
1136
ax88179_led_setting(struct usbnet * dev)1137 static int ax88179_led_setting(struct usbnet *dev)
1138 {
1139 u8 ledfd, value = 0;
1140 u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1141 unsigned long jtimeout;
1142
1143 /* Check AX88179 version. UA1 or UA2*/
1144 ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1145
1146 if (!(value & AX_SECLD)) { /* UA1 */
1147 value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1148 AX_GPIO_CTRL_GPIO1EN;
1149 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1150 1, 1, &value) < 0)
1151 return -EINVAL;
1152 }
1153
1154 /* Check EEPROM */
1155 if (!ax88179_check_eeprom(dev)) {
1156 value = 0x42;
1157 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1158 1, 1, &value) < 0)
1159 return -EINVAL;
1160
1161 value = EEP_RD;
1162 if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1163 1, 1, &value) < 0)
1164 return -EINVAL;
1165
1166 jtimeout = jiffies + delay;
1167 do {
1168 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1169 1, 1, &value);
1170
1171 if (time_after(jiffies, jtimeout))
1172 return -EINVAL;
1173
1174 } while (value & EEP_BUSY);
1175
1176 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1177 1, 1, &value);
1178 ledvalue = (value << 8);
1179
1180 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1181 1, 1, &value);
1182 ledvalue |= value;
1183
1184 /* load internal ROM for defaule setting */
1185 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1186 ax88179_convert_old_led(dev, &ledvalue);
1187
1188 } else if (!ax88179_check_efuse(dev, &ledvalue)) {
1189 if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1190 ax88179_convert_old_led(dev, &ledvalue);
1191 } else {
1192 ax88179_convert_old_led(dev, &ledvalue);
1193 }
1194
1195 tmp = GMII_PHY_PGSEL_EXT;
1196 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1197 GMII_PHY_PAGE_SELECT, 2, &tmp);
1198
1199 tmp = 0x2c;
1200 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1201 GMII_PHYPAGE, 2, &tmp);
1202
1203 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1204 GMII_LED_ACT, 2, &ledact);
1205
1206 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1207 GMII_LED_LINK, 2, &ledlink);
1208
1209 ledact &= GMII_LED_ACTIVE_MASK;
1210 ledlink &= GMII_LED_LINK_MASK;
1211
1212 if (ledvalue & LED0_ACTIVE)
1213 ledact |= GMII_LED0_ACTIVE;
1214
1215 if (ledvalue & LED1_ACTIVE)
1216 ledact |= GMII_LED1_ACTIVE;
1217
1218 if (ledvalue & LED2_ACTIVE)
1219 ledact |= GMII_LED2_ACTIVE;
1220
1221 if (ledvalue & LED0_LINK_10)
1222 ledlink |= GMII_LED0_LINK_10;
1223
1224 if (ledvalue & LED1_LINK_10)
1225 ledlink |= GMII_LED1_LINK_10;
1226
1227 if (ledvalue & LED2_LINK_10)
1228 ledlink |= GMII_LED2_LINK_10;
1229
1230 if (ledvalue & LED0_LINK_100)
1231 ledlink |= GMII_LED0_LINK_100;
1232
1233 if (ledvalue & LED1_LINK_100)
1234 ledlink |= GMII_LED1_LINK_100;
1235
1236 if (ledvalue & LED2_LINK_100)
1237 ledlink |= GMII_LED2_LINK_100;
1238
1239 if (ledvalue & LED0_LINK_1000)
1240 ledlink |= GMII_LED0_LINK_1000;
1241
1242 if (ledvalue & LED1_LINK_1000)
1243 ledlink |= GMII_LED1_LINK_1000;
1244
1245 if (ledvalue & LED2_LINK_1000)
1246 ledlink |= GMII_LED2_LINK_1000;
1247
1248 tmp = ledact;
1249 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1250 GMII_LED_ACT, 2, &tmp);
1251
1252 tmp = ledlink;
1253 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1254 GMII_LED_LINK, 2, &tmp);
1255
1256 tmp = GMII_PHY_PGSEL_PAGE0;
1257 ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1258 GMII_PHY_PAGE_SELECT, 2, &tmp);
1259
1260 /* LED full duplex setting */
1261 ledfd = 0;
1262 if (ledvalue & LED0_FD)
1263 ledfd |= 0x01;
1264 else if ((ledvalue & LED0_USB3_MASK) == 0)
1265 ledfd |= 0x02;
1266
1267 if (ledvalue & LED1_FD)
1268 ledfd |= 0x04;
1269 else if ((ledvalue & LED1_USB3_MASK) == 0)
1270 ledfd |= 0x08;
1271
1272 if (ledvalue & LED2_FD)
1273 ledfd |= 0x10;
1274 else if ((ledvalue & LED2_USB3_MASK) == 0)
1275 ledfd |= 0x20;
1276
1277 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1278
1279 return 0;
1280 }
1281
ax88179_get_mac_addr(struct usbnet * dev)1282 static void ax88179_get_mac_addr(struct usbnet *dev)
1283 {
1284 u8 mac[ETH_ALEN];
1285
1286 memset(mac, 0, sizeof(mac));
1287
1288 /* Maybe the boot loader passed the MAC address via device tree */
1289 if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
1290 netif_dbg(dev, ifup, dev->net,
1291 "MAC address read from device tree");
1292 } else {
1293 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1294 ETH_ALEN, mac);
1295 netif_dbg(dev, ifup, dev->net,
1296 "MAC address read from ASIX chip");
1297 }
1298
1299 if (is_valid_ether_addr(mac)) {
1300 memcpy(dev->net->dev_addr, mac, ETH_ALEN);
1301 } else {
1302 netdev_info(dev->net, "invalid MAC address, using random\n");
1303 eth_hw_addr_random(dev->net);
1304 }
1305
1306 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1307 dev->net->dev_addr);
1308 }
1309
ax88179_bind(struct usbnet * dev,struct usb_interface * intf)1310 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1311 {
1312 struct ax88179_data *ax179_data;
1313
1314 usbnet_get_endpoints(dev, intf);
1315
1316 ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
1317 if (!ax179_data)
1318 return -ENOMEM;
1319
1320 dev->driver_priv = ax179_data;
1321
1322 dev->net->netdev_ops = &ax88179_netdev_ops;
1323 dev->net->ethtool_ops = &ax88179_ethtool_ops;
1324 dev->net->needed_headroom = 8;
1325 dev->net->max_mtu = 4088;
1326
1327 /* Initialize MII structure */
1328 dev->mii.dev = dev->net;
1329 dev->mii.mdio_read = ax88179_mdio_read;
1330 dev->mii.mdio_write = ax88179_mdio_write;
1331 dev->mii.phy_id_mask = 0xff;
1332 dev->mii.reg_num_mask = 0xff;
1333 dev->mii.phy_id = 0x03;
1334 dev->mii.supports_gmii = 1;
1335
1336 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1337 NETIF_F_RXCSUM;
1338
1339 dev->net->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1340 NETIF_F_RXCSUM;
1341
1342 ax88179_reset(dev);
1343
1344 return 0;
1345 }
1346
ax88179_unbind(struct usbnet * dev,struct usb_interface * intf)1347 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1348 {
1349 struct ax88179_data *ax179_data = dev->driver_priv;
1350 u16 tmp16;
1351
1352 /* Configure RX control register => stop operation */
1353 tmp16 = AX_RX_CTL_STOP;
1354 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1355
1356 tmp16 = 0;
1357 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1358
1359 /* Power down ethernet PHY */
1360 tmp16 = 0;
1361 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1362
1363 kfree(ax179_data);
1364 }
1365
1366 static void
ax88179_rx_checksum(struct sk_buff * skb,u32 * pkt_hdr)1367 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1368 {
1369 skb->ip_summed = CHECKSUM_NONE;
1370
1371 /* checksum error bit is set */
1372 if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1373 (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1374 return;
1375
1376 /* It must be a TCP or UDP packet with a valid checksum */
1377 if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1378 ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1379 skb->ip_summed = CHECKSUM_UNNECESSARY;
1380 }
1381
ax88179_rx_fixup(struct usbnet * dev,struct sk_buff * skb)1382 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1383 {
1384 struct sk_buff *ax_skb;
1385 int pkt_cnt;
1386 u32 rx_hdr;
1387 u16 hdr_off;
1388 u32 *pkt_hdr;
1389
1390 /* At the end of the SKB, there's a header telling us how many packets
1391 * are bundled into this buffer and where we can find an array of
1392 * per-packet metadata (which contains elements encoded into u16).
1393 */
1394
1395 /* SKB contents for current firmware:
1396 * <packet 1> <padding>
1397 * ...
1398 * <packet N> <padding>
1399 * <per-packet metadata entry 1> <dummy header>
1400 * ...
1401 * <per-packet metadata entry N> <dummy header>
1402 * <padding2> <rx_hdr>
1403 *
1404 * where:
1405 * <packet N> contains pkt_len bytes:
1406 * 2 bytes of IP alignment pseudo header
1407 * packet received
1408 * <per-packet metadata entry N> contains 4 bytes:
1409 * pkt_len and fields AX_RXHDR_*
1410 * <padding> 0-7 bytes to terminate at
1411 * 8 bytes boundary (64-bit).
1412 * <padding2> 4 bytes to make rx_hdr terminate at
1413 * 8 bytes boundary (64-bit)
1414 * <dummy-header> contains 4 bytes:
1415 * pkt_len=0 and AX_RXHDR_DROP_ERR
1416 * <rx-hdr> contains 4 bytes:
1417 * pkt_cnt and hdr_off (offset of
1418 * <per-packet metadata entry 1>)
1419 *
1420 * pkt_cnt is number of entrys in the per-packet metadata.
1421 * In current firmware there is 2 entrys per packet.
1422 * The first points to the packet and the
1423 * second is a dummy header.
1424 * This was done probably to align fields in 64-bit and
1425 * maintain compatibility with old firmware.
1426 * This code assumes that <dummy header> and <padding2> are
1427 * optional.
1428 */
1429
1430 if (skb->len < 4)
1431 return 0;
1432 skb_trim(skb, skb->len - 4);
1433 rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1434 pkt_cnt = (u16)rx_hdr;
1435 hdr_off = (u16)(rx_hdr >> 16);
1436
1437 if (pkt_cnt == 0)
1438 return 0;
1439
1440 /* Make sure that the bounds of the metadata array are inside the SKB
1441 * (and in front of the counter at the end).
1442 */
1443 if (pkt_cnt * 4 + hdr_off > skb->len)
1444 return 0;
1445 pkt_hdr = (u32 *)(skb->data + hdr_off);
1446
1447 /* Packets must not overlap the metadata array */
1448 skb_trim(skb, hdr_off);
1449
1450 for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1451 u16 pkt_len_plus_padd;
1452 u16 pkt_len;
1453
1454 le32_to_cpus(pkt_hdr);
1455 pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1456 pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1457
1458 /* Skip dummy header used for alignment
1459 */
1460 if (pkt_len == 0)
1461 continue;
1462
1463 if (pkt_len_plus_padd > skb->len)
1464 return 0;
1465
1466 /* Check CRC or runt packet */
1467 if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1468 pkt_len < 2 + ETH_HLEN) {
1469 dev->net->stats.rx_errors++;
1470 skb_pull(skb, pkt_len_plus_padd);
1471 continue;
1472 }
1473
1474 /* last packet */
1475 if (pkt_len_plus_padd == skb->len) {
1476 skb_trim(skb, pkt_len);
1477
1478 /* Skip IP alignment pseudo header */
1479 skb_pull(skb, 2);
1480
1481 skb->truesize = SKB_TRUESIZE(pkt_len_plus_padd);
1482 ax88179_rx_checksum(skb, pkt_hdr);
1483 return 1;
1484 }
1485
1486 ax_skb = skb_clone(skb, GFP_ATOMIC);
1487 if (!ax_skb)
1488 return 0;
1489 skb_trim(ax_skb, pkt_len);
1490
1491 /* Skip IP alignment pseudo header */
1492 skb_pull(ax_skb, 2);
1493
1494 skb->truesize = pkt_len_plus_padd +
1495 SKB_DATA_ALIGN(sizeof(struct sk_buff));
1496 ax88179_rx_checksum(ax_skb, pkt_hdr);
1497 usbnet_skb_return(dev, ax_skb);
1498
1499 skb_pull(skb, pkt_len_plus_padd);
1500 }
1501
1502 return 0;
1503 }
1504
1505 static struct sk_buff *
ax88179_tx_fixup(struct usbnet * dev,struct sk_buff * skb,gfp_t flags)1506 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1507 {
1508 u32 tx_hdr1, tx_hdr2;
1509 int frame_size = dev->maxpacket;
1510 int mss = skb_shinfo(skb)->gso_size;
1511 int headroom;
1512 void *ptr;
1513
1514 tx_hdr1 = skb->len;
1515 tx_hdr2 = mss;
1516 if (((skb->len + 8) % frame_size) == 0)
1517 tx_hdr2 |= 0x80008000; /* Enable padding */
1518
1519 headroom = skb_headroom(skb) - 8;
1520
1521 if ((skb_header_cloned(skb) || headroom < 0) &&
1522 pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1523 dev_kfree_skb_any(skb);
1524 return NULL;
1525 }
1526
1527 ptr = skb_push(skb, 8);
1528 put_unaligned_le32(tx_hdr1, ptr);
1529 put_unaligned_le32(tx_hdr2, ptr + 4);
1530
1531 return skb;
1532 }
1533
ax88179_link_reset(struct usbnet * dev)1534 static int ax88179_link_reset(struct usbnet *dev)
1535 {
1536 struct ax88179_data *ax179_data = dev->driver_priv;
1537 u8 tmp[5], link_sts;
1538 u16 mode, tmp16, delay = HZ / 10;
1539 u32 tmp32 = 0x40000000;
1540 unsigned long jtimeout;
1541
1542 jtimeout = jiffies + delay;
1543 while (tmp32 & 0x40000000) {
1544 mode = 0;
1545 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1546 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1547 &ax179_data->rxctl);
1548
1549 /*link up, check the usb device control TX FIFO full or empty*/
1550 ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1551
1552 if (time_after(jiffies, jtimeout))
1553 return 0;
1554 }
1555
1556 mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1557 AX_MEDIUM_RXFLOW_CTRLEN;
1558
1559 ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1560 1, 1, &link_sts);
1561
1562 ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1563 GMII_PHY_PHYSR, 2, &tmp16);
1564
1565 if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1566 return 0;
1567 } else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1568 mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1569 if (dev->net->mtu > 1500)
1570 mode |= AX_MEDIUM_JUMBO_EN;
1571
1572 if (link_sts & AX_USB_SS)
1573 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1574 else if (link_sts & AX_USB_HS)
1575 memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1576 else
1577 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1578 } else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1579 mode |= AX_MEDIUM_PS;
1580
1581 if (link_sts & (AX_USB_SS | AX_USB_HS))
1582 memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1583 else
1584 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1585 } else {
1586 memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1587 }
1588
1589 /* RX bulk configuration */
1590 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1591
1592 dev->rx_urb_size = (1024 * (tmp[3] + 2));
1593
1594 if (tmp16 & GMII_PHY_PHYSR_FULL)
1595 mode |= AX_MEDIUM_FULL_DUPLEX;
1596 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1597 2, 2, &mode);
1598
1599 ax179_data->eee_enabled = ax88179_chk_eee(dev);
1600
1601 netif_carrier_on(dev->net);
1602
1603 return 0;
1604 }
1605
ax88179_reset(struct usbnet * dev)1606 static int ax88179_reset(struct usbnet *dev)
1607 {
1608 u8 buf[5];
1609 u16 *tmp16;
1610 u8 *tmp;
1611 struct ax88179_data *ax179_data = dev->driver_priv;
1612 struct ethtool_eee eee_data;
1613
1614 tmp16 = (u16 *)buf;
1615 tmp = (u8 *)buf;
1616
1617 /* Power up ethernet PHY */
1618 *tmp16 = 0;
1619 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1620
1621 *tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1622 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1623 msleep(500);
1624
1625 *tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1626 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1627 msleep(200);
1628
1629 /* Ethernet PHY Auto Detach*/
1630 ax88179_auto_detach(dev);
1631
1632 /* Read MAC address from DTB or asix chip */
1633 ax88179_get_mac_addr(dev);
1634 memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1635
1636 /* RX bulk configuration */
1637 memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1638 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1639
1640 dev->rx_urb_size = 1024 * 20;
1641
1642 *tmp = 0x34;
1643 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1644
1645 *tmp = 0x52;
1646 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1647 1, 1, tmp);
1648
1649 /* Enable checksum offload */
1650 *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1651 AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1652 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1653
1654 *tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1655 AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1656 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1657
1658 /* Configure RX control register => start operation */
1659 *tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1660 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1661 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1662
1663 *tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1664 AX_MONITOR_MODE_RWMP;
1665 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1666
1667 /* Configure default medium type => giga */
1668 *tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1669 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1670 AX_MEDIUM_GIGAMODE;
1671 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1672 2, 2, tmp16);
1673
1674 /* Check if WoL is supported */
1675 ax179_data->wol_supported = 0;
1676 if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
1677 1, 1, &tmp) > 0)
1678 ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
1679
1680 ax88179_led_setting(dev);
1681
1682 ax179_data->eee_enabled = 0;
1683 ax179_data->eee_active = 0;
1684
1685 ax88179_disable_eee(dev);
1686
1687 ax88179_ethtool_get_eee(dev, &eee_data);
1688 eee_data.advertised = 0;
1689 ax88179_ethtool_set_eee(dev, &eee_data);
1690
1691 /* Restart autoneg */
1692 mii_nway_restart(&dev->mii);
1693
1694 usbnet_link_change(dev, 0, 0);
1695
1696 return 0;
1697 }
1698
ax88179_stop(struct usbnet * dev)1699 static int ax88179_stop(struct usbnet *dev)
1700 {
1701 u16 tmp16;
1702
1703 ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1704 2, 2, &tmp16);
1705 tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1706 ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1707 2, 2, &tmp16);
1708
1709 return 0;
1710 }
1711
1712 static const struct driver_info ax88179_info = {
1713 .description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1714 .bind = ax88179_bind,
1715 .unbind = ax88179_unbind,
1716 .status = ax88179_status,
1717 .link_reset = ax88179_link_reset,
1718 .reset = ax88179_reset,
1719 .stop = ax88179_stop,
1720 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1721 .rx_fixup = ax88179_rx_fixup,
1722 .tx_fixup = ax88179_tx_fixup,
1723 };
1724
1725 static const struct driver_info ax88178a_info = {
1726 .description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1727 .bind = ax88179_bind,
1728 .unbind = ax88179_unbind,
1729 .status = ax88179_status,
1730 .link_reset = ax88179_link_reset,
1731 .reset = ax88179_reset,
1732 .stop = ax88179_stop,
1733 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1734 .rx_fixup = ax88179_rx_fixup,
1735 .tx_fixup = ax88179_tx_fixup,
1736 };
1737
1738 static const struct driver_info cypress_GX3_info = {
1739 .description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1740 .bind = ax88179_bind,
1741 .unbind = ax88179_unbind,
1742 .status = ax88179_status,
1743 .link_reset = ax88179_link_reset,
1744 .reset = ax88179_reset,
1745 .stop = ax88179_stop,
1746 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1747 .rx_fixup = ax88179_rx_fixup,
1748 .tx_fixup = ax88179_tx_fixup,
1749 };
1750
1751 static const struct driver_info dlink_dub1312_info = {
1752 .description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1753 .bind = ax88179_bind,
1754 .unbind = ax88179_unbind,
1755 .status = ax88179_status,
1756 .link_reset = ax88179_link_reset,
1757 .reset = ax88179_reset,
1758 .stop = ax88179_stop,
1759 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1760 .rx_fixup = ax88179_rx_fixup,
1761 .tx_fixup = ax88179_tx_fixup,
1762 };
1763
1764 static const struct driver_info sitecom_info = {
1765 .description = "Sitecom USB 3.0 to Gigabit Adapter",
1766 .bind = ax88179_bind,
1767 .unbind = ax88179_unbind,
1768 .status = ax88179_status,
1769 .link_reset = ax88179_link_reset,
1770 .reset = ax88179_reset,
1771 .stop = ax88179_stop,
1772 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1773 .rx_fixup = ax88179_rx_fixup,
1774 .tx_fixup = ax88179_tx_fixup,
1775 };
1776
1777 static const struct driver_info samsung_info = {
1778 .description = "Samsung USB Ethernet Adapter",
1779 .bind = ax88179_bind,
1780 .unbind = ax88179_unbind,
1781 .status = ax88179_status,
1782 .link_reset = ax88179_link_reset,
1783 .reset = ax88179_reset,
1784 .stop = ax88179_stop,
1785 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1786 .rx_fixup = ax88179_rx_fixup,
1787 .tx_fixup = ax88179_tx_fixup,
1788 };
1789
1790 static const struct driver_info lenovo_info = {
1791 .description = "Lenovo OneLinkDock Gigabit LAN",
1792 .bind = ax88179_bind,
1793 .unbind = ax88179_unbind,
1794 .status = ax88179_status,
1795 .link_reset = ax88179_link_reset,
1796 .reset = ax88179_reset,
1797 .stop = ax88179_stop,
1798 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1799 .rx_fixup = ax88179_rx_fixup,
1800 .tx_fixup = ax88179_tx_fixup,
1801 };
1802
1803 static const struct driver_info belkin_info = {
1804 .description = "Belkin USB Ethernet Adapter",
1805 .bind = ax88179_bind,
1806 .unbind = ax88179_unbind,
1807 .status = ax88179_status,
1808 .link_reset = ax88179_link_reset,
1809 .reset = ax88179_reset,
1810 .stop = ax88179_stop,
1811 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1812 .rx_fixup = ax88179_rx_fixup,
1813 .tx_fixup = ax88179_tx_fixup,
1814 };
1815
1816 static const struct driver_info toshiba_info = {
1817 .description = "Toshiba USB Ethernet Adapter",
1818 .bind = ax88179_bind,
1819 .unbind = ax88179_unbind,
1820 .status = ax88179_status,
1821 .link_reset = ax88179_link_reset,
1822 .reset = ax88179_reset,
1823 .stop = ax88179_stop,
1824 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1825 .rx_fixup = ax88179_rx_fixup,
1826 .tx_fixup = ax88179_tx_fixup,
1827 };
1828
1829 static const struct driver_info mct_info = {
1830 .description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1831 .bind = ax88179_bind,
1832 .unbind = ax88179_unbind,
1833 .status = ax88179_status,
1834 .link_reset = ax88179_link_reset,
1835 .reset = ax88179_reset,
1836 .stop = ax88179_stop,
1837 .flags = FLAG_ETHER | FLAG_FRAMING_AX,
1838 .rx_fixup = ax88179_rx_fixup,
1839 .tx_fixup = ax88179_tx_fixup,
1840 };
1841
1842 static const struct usb_device_id products[] = {
1843 {
1844 /* ASIX AX88179 10/100/1000 */
1845 USB_DEVICE(0x0b95, 0x1790),
1846 .driver_info = (unsigned long)&ax88179_info,
1847 }, {
1848 /* ASIX AX88178A 10/100/1000 */
1849 USB_DEVICE(0x0b95, 0x178a),
1850 .driver_info = (unsigned long)&ax88178a_info,
1851 }, {
1852 /* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1853 USB_DEVICE(0x04b4, 0x3610),
1854 .driver_info = (unsigned long)&cypress_GX3_info,
1855 }, {
1856 /* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1857 USB_DEVICE(0x2001, 0x4a00),
1858 .driver_info = (unsigned long)&dlink_dub1312_info,
1859 }, {
1860 /* Sitecom USB 3.0 to Gigabit Adapter */
1861 USB_DEVICE(0x0df6, 0x0072),
1862 .driver_info = (unsigned long)&sitecom_info,
1863 }, {
1864 /* Samsung USB Ethernet Adapter */
1865 USB_DEVICE(0x04e8, 0xa100),
1866 .driver_info = (unsigned long)&samsung_info,
1867 }, {
1868 /* Lenovo OneLinkDock Gigabit LAN */
1869 USB_DEVICE(0x17ef, 0x304b),
1870 .driver_info = (unsigned long)&lenovo_info,
1871 }, {
1872 /* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1873 USB_DEVICE(0x050d, 0x0128),
1874 .driver_info = (unsigned long)&belkin_info,
1875 }, {
1876 /* Toshiba USB 3.0 GBit Ethernet Adapter */
1877 USB_DEVICE(0x0930, 0x0a13),
1878 .driver_info = (unsigned long)&toshiba_info,
1879 }, {
1880 /* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1881 USB_DEVICE(0x0711, 0x0179),
1882 .driver_info = (unsigned long)&mct_info,
1883 },
1884 { },
1885 };
1886 MODULE_DEVICE_TABLE(usb, products);
1887
1888 static struct usb_driver ax88179_178a_driver = {
1889 .name = "ax88179_178a",
1890 .id_table = products,
1891 .probe = usbnet_probe,
1892 .suspend = ax88179_suspend,
1893 .resume = ax88179_resume,
1894 .reset_resume = ax88179_resume,
1895 .disconnect = ax88179_disconnect,
1896 .supports_autosuspend = 1,
1897 .disable_hub_initiated_lpm = 1,
1898 };
1899
1900 module_usb_driver(ax88179_178a_driver);
1901
1902 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1903 MODULE_LICENSE("GPL");
1904