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1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * PWM device driver for ST SoCs
4  *
5  * Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
6  *
7  * Author: Ajit Pal Singh <ajitpal.singh@st.com>
8  *         Lee Jones <lee.jones@linaro.org>
9  */
10 
11 #include <linux/clk.h>
12 #include <linux/interrupt.h>
13 #include <linux/math64.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/regmap.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
23 #include <linux/wait.h>
24 
25 #define PWM_OUT_VAL(x)	(0x00 + (4 * (x))) /* Device's Duty Cycle register */
26 #define PWM_CPT_VAL(x)	(0x10 + (4 * (x))) /* Capture value */
27 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
28 
29 #define STI_PWM_CTRL		0x50	/* Control/Config register */
30 #define STI_INT_EN		0x54	/* Interrupt Enable/Disable register */
31 #define STI_INT_STA		0x58	/* Interrupt Status register */
32 #define PWM_INT_ACK		0x5c
33 #define PWM_PRESCALE_LOW_MASK	0x0f
34 #define PWM_PRESCALE_HIGH_MASK	0xf0
35 #define PWM_CPT_EDGE_MASK	0x03
36 #define PWM_INT_ACK_MASK	0x1ff
37 
38 #define STI_MAX_CPT_DEVS	4
39 #define CPT_DC_MAX		0xff
40 
41 /* Regfield IDs */
42 enum {
43 	/* Bits in PWM_CTRL*/
44 	PWMCLK_PRESCALE_LOW,
45 	PWMCLK_PRESCALE_HIGH,
46 	CPTCLK_PRESCALE,
47 
48 	PWM_OUT_EN,
49 	PWM_CPT_EN,
50 
51 	PWM_CPT_INT_EN,
52 	PWM_CPT_INT_STAT,
53 
54 	/* Keep last */
55 	MAX_REGFIELDS
56 };
57 
58 /*
59  * Each capture input can be programmed to detect rising-edge, falling-edge,
60  * either edge or neither egde.
61  */
62 enum sti_cpt_edge {
63 	CPT_EDGE_DISABLED,
64 	CPT_EDGE_RISING,
65 	CPT_EDGE_FALLING,
66 	CPT_EDGE_BOTH,
67 };
68 
69 struct sti_cpt_ddata {
70 	u32 snapshot[3];
71 	unsigned int index;
72 	struct mutex lock;
73 	wait_queue_head_t wait;
74 };
75 
76 struct sti_pwm_compat_data {
77 	const struct reg_field *reg_fields;
78 	unsigned int pwm_num_devs;
79 	unsigned int cpt_num_devs;
80 	unsigned int max_pwm_cnt;
81 	unsigned int max_prescale;
82 	struct sti_cpt_ddata *ddata;
83 };
84 
85 struct sti_pwm_chip {
86 	struct device *dev;
87 	struct clk *pwm_clk;
88 	struct clk *cpt_clk;
89 	struct regmap *regmap;
90 	struct sti_pwm_compat_data *cdata;
91 	struct regmap_field *prescale_low;
92 	struct regmap_field *prescale_high;
93 	struct regmap_field *pwm_out_en;
94 	struct regmap_field *pwm_cpt_en;
95 	struct regmap_field *pwm_cpt_int_en;
96 	struct regmap_field *pwm_cpt_int_stat;
97 	struct pwm_chip chip;
98 	struct pwm_device *cur;
99 	unsigned long configured;
100 	unsigned int en_count;
101 	struct mutex sti_pwm_lock; /* To sync between enable/disable calls */
102 	void __iomem *mmio;
103 };
104 
105 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
106 	[PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
107 	[PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
108 	[CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
109 	[PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
110 	[PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
111 	[PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
112 	[PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
113 };
114 
to_sti_pwmchip(struct pwm_chip * chip)115 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
116 {
117 	return container_of(chip, struct sti_pwm_chip, chip);
118 }
119 
120 /*
121  * Calculate the prescaler value corresponding to the period.
122  */
sti_pwm_get_prescale(struct sti_pwm_chip * pc,unsigned long period,unsigned int * prescale)123 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
124 				unsigned int *prescale)
125 {
126 	struct sti_pwm_compat_data *cdata = pc->cdata;
127 	unsigned long clk_rate;
128 	unsigned long value;
129 	unsigned int ps;
130 
131 	clk_rate = clk_get_rate(pc->pwm_clk);
132 	if (!clk_rate) {
133 		dev_err(pc->dev, "failed to get clock rate\n");
134 		return -EINVAL;
135 	}
136 
137 	/*
138 	 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
139 	 */
140 	value = NSEC_PER_SEC / clk_rate;
141 	value *= cdata->max_pwm_cnt + 1;
142 
143 	if (period % value)
144 		return -EINVAL;
145 
146 	ps  = period / value - 1;
147 	if (ps > cdata->max_prescale)
148 		return -EINVAL;
149 
150 	*prescale = ps;
151 
152 	return 0;
153 }
154 
155 /*
156  * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
157  * only way to change the period (apart from changing the PWM input clock) is
158  * to change the PWM clock prescaler.
159  *
160  * The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
161  * period values are supported (for a particular clock rate). The requested
162  * period will be applied only if it matches one of these 256 values.
163  */
sti_pwm_config(struct pwm_chip * chip,struct pwm_device * pwm,int duty_ns,int period_ns)164 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
165 			  int duty_ns, int period_ns)
166 {
167 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
168 	struct sti_pwm_compat_data *cdata = pc->cdata;
169 	unsigned int ncfg, value, prescale = 0;
170 	struct pwm_device *cur = pc->cur;
171 	struct device *dev = pc->dev;
172 	bool period_same = false;
173 	int ret;
174 
175 	ncfg = hweight_long(pc->configured);
176 	if (ncfg)
177 		period_same = (period_ns == pwm_get_period(cur));
178 
179 	/*
180 	 * Allow configuration changes if one of the following conditions
181 	 * satisfy.
182 	 * 1. No devices have been configured.
183 	 * 2. Only one device has been configured and the new request is for
184 	 *    the same device.
185 	 * 3. Only one device has been configured and the new request is for
186 	 *    a new device and period of the new device is same as the current
187 	 *    configured period.
188 	 * 4. More than one devices are configured and period of the new
189 	 *    requestis the same as the current period.
190 	 */
191 	if (!ncfg ||
192 	    ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
193 	    ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
194 	    ((ncfg > 1) && period_same)) {
195 		/* Enable clock before writing to PWM registers. */
196 		ret = clk_enable(pc->pwm_clk);
197 		if (ret)
198 			return ret;
199 
200 		ret = clk_enable(pc->cpt_clk);
201 		if (ret)
202 			return ret;
203 
204 		if (!period_same) {
205 			ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
206 			if (ret)
207 				goto clk_dis;
208 
209 			value = prescale & PWM_PRESCALE_LOW_MASK;
210 
211 			ret = regmap_field_write(pc->prescale_low, value);
212 			if (ret)
213 				goto clk_dis;
214 
215 			value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4;
216 
217 			ret = regmap_field_write(pc->prescale_high, value);
218 			if (ret)
219 				goto clk_dis;
220 		}
221 
222 		/*
223 		 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
224 		 * When PWMVal == max_pwm_count,
225 		 * PWM pulse = (max_pwm_count + 1) local cycles,
226 		 * that is continuous pulse: signal never goes low.
227 		 */
228 		value = cdata->max_pwm_cnt * duty_ns / period_ns;
229 
230 		ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value);
231 		if (ret)
232 			goto clk_dis;
233 
234 		ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
235 
236 		set_bit(pwm->hwpwm, &pc->configured);
237 		pc->cur = pwm;
238 
239 		dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n",
240 			prescale, period_ns, duty_ns, value);
241 	} else {
242 		return -EINVAL;
243 	}
244 
245 clk_dis:
246 	clk_disable(pc->pwm_clk);
247 	clk_disable(pc->cpt_clk);
248 	return ret;
249 }
250 
sti_pwm_enable(struct pwm_chip * chip,struct pwm_device * pwm)251 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
252 {
253 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
254 	struct device *dev = pc->dev;
255 	int ret = 0;
256 
257 	/*
258 	 * Since we have a common enable for all PWM devices, do not enable if
259 	 * already enabled.
260 	 */
261 	mutex_lock(&pc->sti_pwm_lock);
262 
263 	if (!pc->en_count) {
264 		ret = clk_enable(pc->pwm_clk);
265 		if (ret)
266 			goto out;
267 
268 		ret = clk_enable(pc->cpt_clk);
269 		if (ret)
270 			goto out;
271 
272 		ret = regmap_field_write(pc->pwm_out_en, 1);
273 		if (ret) {
274 			dev_err(dev, "failed to enable PWM device %u: %d\n",
275 				pwm->hwpwm, ret);
276 			goto out;
277 		}
278 	}
279 
280 	pc->en_count++;
281 
282 out:
283 	mutex_unlock(&pc->sti_pwm_lock);
284 	return ret;
285 }
286 
sti_pwm_disable(struct pwm_chip * chip,struct pwm_device * pwm)287 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
288 {
289 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
290 
291 	mutex_lock(&pc->sti_pwm_lock);
292 
293 	if (--pc->en_count) {
294 		mutex_unlock(&pc->sti_pwm_lock);
295 		return;
296 	}
297 
298 	regmap_field_write(pc->pwm_out_en, 0);
299 
300 	clk_disable(pc->pwm_clk);
301 	clk_disable(pc->cpt_clk);
302 
303 	mutex_unlock(&pc->sti_pwm_lock);
304 }
305 
sti_pwm_free(struct pwm_chip * chip,struct pwm_device * pwm)306 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
307 {
308 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
309 
310 	clear_bit(pwm->hwpwm, &pc->configured);
311 }
312 
sti_pwm_capture(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_capture * result,unsigned long timeout)313 static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
314 			   struct pwm_capture *result, unsigned long timeout)
315 {
316 	struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
317 	struct sti_pwm_compat_data *cdata = pc->cdata;
318 	struct sti_cpt_ddata *ddata = &cdata->ddata[pwm->hwpwm];
319 	struct device *dev = pc->dev;
320 	unsigned int effective_ticks;
321 	unsigned long long high, low;
322 	int ret;
323 
324 	if (pwm->hwpwm >= cdata->cpt_num_devs) {
325 		dev_err(dev, "device %u is not valid\n", pwm->hwpwm);
326 		return -EINVAL;
327 	}
328 
329 	mutex_lock(&ddata->lock);
330 	ddata->index = 0;
331 
332 	/* Prepare capture measurement */
333 	regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_RISING);
334 	regmap_field_write(pc->pwm_cpt_int_en, BIT(pwm->hwpwm));
335 
336 	/* Enable capture */
337 	ret = regmap_field_write(pc->pwm_cpt_en, 1);
338 	if (ret) {
339 		dev_err(dev, "failed to enable PWM capture %u: %d\n",
340 			pwm->hwpwm, ret);
341 		goto out;
342 	}
343 
344 	ret = wait_event_interruptible_timeout(ddata->wait, ddata->index > 1,
345 					       msecs_to_jiffies(timeout));
346 
347 	regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_DISABLED);
348 
349 	if (ret == -ERESTARTSYS)
350 		goto out;
351 
352 	switch (ddata->index) {
353 	case 0:
354 	case 1:
355 		/*
356 		 * Getting here could mean:
357 		 *  - input signal is constant of less than 1 Hz
358 		 *  - there is no input signal at all
359 		 *
360 		 * In such case the frequency is rounded down to 0
361 		 */
362 		result->period = 0;
363 		result->duty_cycle = 0;
364 
365 		break;
366 
367 	case 2:
368 		/* We have everying we need */
369 		high = ddata->snapshot[1] - ddata->snapshot[0];
370 		low = ddata->snapshot[2] - ddata->snapshot[1];
371 
372 		effective_ticks = clk_get_rate(pc->cpt_clk);
373 
374 		result->period = (high + low) * NSEC_PER_SEC;
375 		result->period /= effective_ticks;
376 
377 		result->duty_cycle = high * NSEC_PER_SEC;
378 		result->duty_cycle /= effective_ticks;
379 
380 		break;
381 
382 	default:
383 		dev_err(dev, "internal error\n");
384 		break;
385 	}
386 
387 out:
388 	/* Disable capture */
389 	regmap_field_write(pc->pwm_cpt_en, 0);
390 
391 	mutex_unlock(&ddata->lock);
392 	return ret;
393 }
394 
395 static const struct pwm_ops sti_pwm_ops = {
396 	.capture = sti_pwm_capture,
397 	.config = sti_pwm_config,
398 	.enable = sti_pwm_enable,
399 	.disable = sti_pwm_disable,
400 	.free = sti_pwm_free,
401 	.owner = THIS_MODULE,
402 };
403 
sti_pwm_interrupt(int irq,void * data)404 static irqreturn_t sti_pwm_interrupt(int irq, void *data)
405 {
406 	struct sti_pwm_chip *pc = data;
407 	struct device *dev = pc->dev;
408 	struct sti_cpt_ddata *ddata;
409 	int devicenum;
410 	unsigned int cpt_int_stat;
411 	unsigned int reg;
412 	int ret = IRQ_NONE;
413 
414 	ret = regmap_field_read(pc->pwm_cpt_int_stat, &cpt_int_stat);
415 	if (ret)
416 		return ret;
417 
418 	while (cpt_int_stat) {
419 		devicenum = ffs(cpt_int_stat) - 1;
420 
421 		ddata = &pc->cdata->ddata[devicenum];
422 
423 		/*
424 		 * Capture input:
425 		 *    _______                   _______
426 		 *   |       |                 |       |
427 		 * __|       |_________________|       |________
428 		 *   ^0      ^1                ^2
429 		 *
430 		 * Capture start by the first available rising edge. When a
431 		 * capture event occurs, capture value (CPT_VALx) is stored,
432 		 * index incremented, capture edge changed.
433 		 *
434 		 * After the capture, if the index > 1, we have collected the
435 		 * necessary data so we signal the thread waiting for it and
436 		 * disable the capture by setting capture edge to none
437 		 */
438 
439 		regmap_read(pc->regmap,
440 			    PWM_CPT_VAL(devicenum),
441 			    &ddata->snapshot[ddata->index]);
442 
443 		switch (ddata->index) {
444 		case 0:
445 		case 1:
446 			regmap_read(pc->regmap, PWM_CPT_EDGE(devicenum), &reg);
447 			reg ^= PWM_CPT_EDGE_MASK;
448 			regmap_write(pc->regmap, PWM_CPT_EDGE(devicenum), reg);
449 
450 			ddata->index++;
451 			break;
452 
453 		case 2:
454 			regmap_write(pc->regmap,
455 				     PWM_CPT_EDGE(devicenum),
456 				     CPT_EDGE_DISABLED);
457 			wake_up(&ddata->wait);
458 			break;
459 
460 		default:
461 			dev_err(dev, "Internal error\n");
462 		}
463 
464 		cpt_int_stat &= ~BIT_MASK(devicenum);
465 
466 		ret = IRQ_HANDLED;
467 	}
468 
469 	/* Just ACK everything */
470 	regmap_write(pc->regmap, PWM_INT_ACK, PWM_INT_ACK_MASK);
471 
472 	return ret;
473 }
474 
sti_pwm_probe_dt(struct sti_pwm_chip * pc)475 static int sti_pwm_probe_dt(struct sti_pwm_chip *pc)
476 {
477 	struct device *dev = pc->dev;
478 	const struct reg_field *reg_fields;
479 	struct device_node *np = dev->of_node;
480 	struct sti_pwm_compat_data *cdata = pc->cdata;
481 	u32 num_devs;
482 	int ret;
483 
484 	ret = of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
485 	if (!ret)
486 		cdata->pwm_num_devs = num_devs;
487 
488 	ret = of_property_read_u32(np, "st,capture-num-chan", &num_devs);
489 	if (!ret)
490 		cdata->cpt_num_devs = num_devs;
491 
492 	if (!cdata->pwm_num_devs && !cdata->cpt_num_devs) {
493 		dev_err(dev, "No channels configured\n");
494 		return -EINVAL;
495 	}
496 
497 	reg_fields = cdata->reg_fields;
498 
499 	pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
500 					reg_fields[PWMCLK_PRESCALE_LOW]);
501 	if (IS_ERR(pc->prescale_low))
502 		return PTR_ERR(pc->prescale_low);
503 
504 	pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
505 					reg_fields[PWMCLK_PRESCALE_HIGH]);
506 	if (IS_ERR(pc->prescale_high))
507 		return PTR_ERR(pc->prescale_high);
508 
509 	pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
510 						 reg_fields[PWM_OUT_EN]);
511 	if (IS_ERR(pc->pwm_out_en))
512 		return PTR_ERR(pc->pwm_out_en);
513 
514 	pc->pwm_cpt_en = devm_regmap_field_alloc(dev, pc->regmap,
515 						 reg_fields[PWM_CPT_EN]);
516 	if (IS_ERR(pc->pwm_cpt_en))
517 		return PTR_ERR(pc->pwm_cpt_en);
518 
519 	pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
520 						reg_fields[PWM_CPT_INT_EN]);
521 	if (IS_ERR(pc->pwm_cpt_int_en))
522 		return PTR_ERR(pc->pwm_cpt_int_en);
523 
524 	pc->pwm_cpt_int_stat = devm_regmap_field_alloc(dev, pc->regmap,
525 						reg_fields[PWM_CPT_INT_STAT]);
526 	if (PTR_ERR_OR_ZERO(pc->pwm_cpt_int_stat))
527 		return PTR_ERR(pc->pwm_cpt_int_stat);
528 
529 	return 0;
530 }
531 
532 static const struct regmap_config sti_pwm_regmap_config = {
533 	.reg_bits = 32,
534 	.val_bits = 32,
535 	.reg_stride = 4,
536 };
537 
sti_pwm_probe(struct platform_device * pdev)538 static int sti_pwm_probe(struct platform_device *pdev)
539 {
540 	struct device *dev = &pdev->dev;
541 	struct sti_pwm_compat_data *cdata;
542 	struct sti_pwm_chip *pc;
543 	unsigned int i;
544 	int irq, ret;
545 
546 	pc = devm_kzalloc(dev, sizeof(*pc), GFP_KERNEL);
547 	if (!pc)
548 		return -ENOMEM;
549 
550 	cdata = devm_kzalloc(dev, sizeof(*cdata), GFP_KERNEL);
551 	if (!cdata)
552 		return -ENOMEM;
553 
554 	pc->mmio = devm_platform_ioremap_resource(pdev, 0);
555 	if (IS_ERR(pc->mmio))
556 		return PTR_ERR(pc->mmio);
557 
558 	pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
559 					   &sti_pwm_regmap_config);
560 	if (IS_ERR(pc->regmap))
561 		return PTR_ERR(pc->regmap);
562 
563 	irq = platform_get_irq(pdev, 0);
564 	if (irq < 0)
565 		return irq;
566 
567 	ret = devm_request_irq(&pdev->dev, irq, sti_pwm_interrupt, 0,
568 			       pdev->name, pc);
569 	if (ret < 0) {
570 		dev_err(&pdev->dev, "Failed to request IRQ\n");
571 		return ret;
572 	}
573 
574 	/*
575 	 * Setup PWM data with default values: some values could be replaced
576 	 * with specific ones provided from Device Tree.
577 	 */
578 	cdata->reg_fields = sti_pwm_regfields;
579 	cdata->max_prescale = 0xff;
580 	cdata->max_pwm_cnt = 255;
581 	cdata->pwm_num_devs = 0;
582 	cdata->cpt_num_devs = 0;
583 
584 	pc->cdata = cdata;
585 	pc->dev = dev;
586 	pc->en_count = 0;
587 	mutex_init(&pc->sti_pwm_lock);
588 
589 	ret = sti_pwm_probe_dt(pc);
590 	if (ret)
591 		return ret;
592 
593 	if (cdata->pwm_num_devs) {
594 		pc->pwm_clk = of_clk_get_by_name(dev->of_node, "pwm");
595 		if (IS_ERR(pc->pwm_clk)) {
596 			dev_err(dev, "failed to get PWM clock\n");
597 			return PTR_ERR(pc->pwm_clk);
598 		}
599 
600 		ret = clk_prepare(pc->pwm_clk);
601 		if (ret) {
602 			dev_err(dev, "failed to prepare clock\n");
603 			return ret;
604 		}
605 	}
606 
607 	if (cdata->cpt_num_devs) {
608 		pc->cpt_clk = of_clk_get_by_name(dev->of_node, "capture");
609 		if (IS_ERR(pc->cpt_clk)) {
610 			dev_err(dev, "failed to get PWM capture clock\n");
611 			return PTR_ERR(pc->cpt_clk);
612 		}
613 
614 		ret = clk_prepare(pc->cpt_clk);
615 		if (ret) {
616 			dev_err(dev, "failed to prepare clock\n");
617 			return ret;
618 		}
619 
620 		cdata->ddata = devm_kzalloc(dev, cdata->cpt_num_devs * sizeof(*cdata->ddata), GFP_KERNEL);
621 		if (!cdata->ddata)
622 			return -ENOMEM;
623 	}
624 
625 	pc->chip.dev = dev;
626 	pc->chip.ops = &sti_pwm_ops;
627 	pc->chip.npwm = pc->cdata->pwm_num_devs;
628 
629 	for (i = 0; i < cdata->cpt_num_devs; i++) {
630 		struct sti_cpt_ddata *ddata = &cdata->ddata[i];
631 
632 		init_waitqueue_head(&ddata->wait);
633 		mutex_init(&ddata->lock);
634 	}
635 
636 	ret = pwmchip_add(&pc->chip);
637 	if (ret < 0) {
638 		clk_unprepare(pc->pwm_clk);
639 		clk_unprepare(pc->cpt_clk);
640 		return ret;
641 	}
642 
643 	platform_set_drvdata(pdev, pc);
644 
645 	return 0;
646 }
647 
sti_pwm_remove(struct platform_device * pdev)648 static int sti_pwm_remove(struct platform_device *pdev)
649 {
650 	struct sti_pwm_chip *pc = platform_get_drvdata(pdev);
651 
652 	pwmchip_remove(&pc->chip);
653 
654 	clk_unprepare(pc->pwm_clk);
655 	clk_unprepare(pc->cpt_clk);
656 
657 	return 0;
658 }
659 
660 static const struct of_device_id sti_pwm_of_match[] = {
661 	{ .compatible = "st,sti-pwm", },
662 	{ /* sentinel */ }
663 };
664 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
665 
666 static struct platform_driver sti_pwm_driver = {
667 	.driver = {
668 		.name = "sti-pwm",
669 		.of_match_table = sti_pwm_of_match,
670 	},
671 	.probe = sti_pwm_probe,
672 	.remove = sti_pwm_remove,
673 };
674 module_platform_driver(sti_pwm_driver);
675 
676 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
677 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
678 MODULE_LICENSE("GPL");
679