1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * driver for Microchip PQI-based storage controllers
4 * Copyright (c) 2019-2021 Microchip Technology Inc. and its subsidiaries
5 * Copyright (c) 2016-2018 Microsemi Corporation
6 * Copyright (c) 2016 PMC-Sierra, Inc.
7 *
8 * Questions/Comments/Bugfixes to storagedev@microchip.com
9 *
10 */
11
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/sched.h>
18 #include <linux/rtc.h>
19 #include <linux/bcd.h>
20 #include <linux/reboot.h>
21 #include <linux/cciss_ioctl.h>
22 #include <linux/blk-mq-pci.h>
23 #include <scsi/scsi_host.h>
24 #include <scsi/scsi_cmnd.h>
25 #include <scsi/scsi_device.h>
26 #include <scsi/scsi_eh.h>
27 #include <scsi/scsi_transport_sas.h>
28 #include <asm/unaligned.h>
29 #include "smartpqi.h"
30 #include "smartpqi_sis.h"
31
32 #if !defined(BUILD_TIMESTAMP)
33 #define BUILD_TIMESTAMP
34 #endif
35
36 #define DRIVER_VERSION "2.1.10-020"
37 #define DRIVER_MAJOR 2
38 #define DRIVER_MINOR 1
39 #define DRIVER_RELEASE 10
40 #define DRIVER_REVISION 20
41
42 #define DRIVER_NAME "Microchip SmartPQI Driver (v" \
43 DRIVER_VERSION BUILD_TIMESTAMP ")"
44 #define DRIVER_NAME_SHORT "smartpqi"
45
46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor))
47
48 #define PQI_POST_RESET_DELAY_SECS 5
49 #define PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS 10
50
51 MODULE_AUTHOR("Microchip");
52 MODULE_DESCRIPTION("Driver for Microchip Smart Family Controller version "
53 DRIVER_VERSION);
54 MODULE_VERSION(DRIVER_VERSION);
55 MODULE_LICENSE("GPL");
56
57 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info);
58 static void pqi_ctrl_offline_worker(struct work_struct *work);
59 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info);
60 static void pqi_scan_start(struct Scsi_Host *shost);
61 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
62 struct pqi_queue_group *queue_group, enum pqi_io_path path,
63 struct pqi_io_request *io_request);
64 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
65 struct pqi_iu_header *request, unsigned int flags,
66 struct pqi_raid_error_info *error_info);
67 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
68 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
69 unsigned int cdb_length, struct pqi_queue_group *queue_group,
70 struct pqi_encryption_info *encryption_info, bool raid_bypass);
71 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info,
72 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
73 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
74 struct pqi_scsi_dev_raid_map_data *rmd);
75 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info,
76 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
77 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
78 struct pqi_scsi_dev_raid_map_data *rmd);
79 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info);
80 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info);
81 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs);
82 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info);
83 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info);
84 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info);
85 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
86 struct pqi_scsi_dev *device, unsigned long timeout_msecs);
87
88 /* for flags argument to pqi_submit_raid_request_synchronous() */
89 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1
90
91 static struct scsi_transport_template *pqi_sas_transport_template;
92
93 static atomic_t pqi_controller_count = ATOMIC_INIT(0);
94
95 enum pqi_lockup_action {
96 NONE,
97 REBOOT,
98 PANIC
99 };
100
101 static enum pqi_lockup_action pqi_lockup_action = NONE;
102
103 static struct {
104 enum pqi_lockup_action action;
105 char *name;
106 } pqi_lockup_actions[] = {
107 {
108 .action = NONE,
109 .name = "none",
110 },
111 {
112 .action = REBOOT,
113 .name = "reboot",
114 },
115 {
116 .action = PANIC,
117 .name = "panic",
118 },
119 };
120
121 static unsigned int pqi_supported_event_types[] = {
122 PQI_EVENT_TYPE_HOTPLUG,
123 PQI_EVENT_TYPE_HARDWARE,
124 PQI_EVENT_TYPE_PHYSICAL_DEVICE,
125 PQI_EVENT_TYPE_LOGICAL_DEVICE,
126 PQI_EVENT_TYPE_OFA,
127 PQI_EVENT_TYPE_AIO_STATE_CHANGE,
128 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE,
129 };
130
131 static int pqi_disable_device_id_wildcards;
132 module_param_named(disable_device_id_wildcards,
133 pqi_disable_device_id_wildcards, int, 0644);
134 MODULE_PARM_DESC(disable_device_id_wildcards,
135 "Disable device ID wildcards.");
136
137 static int pqi_disable_heartbeat;
138 module_param_named(disable_heartbeat,
139 pqi_disable_heartbeat, int, 0644);
140 MODULE_PARM_DESC(disable_heartbeat,
141 "Disable heartbeat.");
142
143 static int pqi_disable_ctrl_shutdown;
144 module_param_named(disable_ctrl_shutdown,
145 pqi_disable_ctrl_shutdown, int, 0644);
146 MODULE_PARM_DESC(disable_ctrl_shutdown,
147 "Disable controller shutdown when controller locked up.");
148
149 static char *pqi_lockup_action_param;
150 module_param_named(lockup_action,
151 pqi_lockup_action_param, charp, 0644);
152 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n"
153 "\t\tSupported: none, reboot, panic\n"
154 "\t\tDefault: none");
155
156 static int pqi_expose_ld_first;
157 module_param_named(expose_ld_first,
158 pqi_expose_ld_first, int, 0644);
159 MODULE_PARM_DESC(expose_ld_first, "Expose logical drives before physical drives.");
160
161 static int pqi_hide_vsep;
162 module_param_named(hide_vsep,
163 pqi_hide_vsep, int, 0644);
164 MODULE_PARM_DESC(hide_vsep, "Hide the virtual SEP for direct attached drives.");
165
166 static char *raid_levels[] = {
167 "RAID-0",
168 "RAID-4",
169 "RAID-1(1+0)",
170 "RAID-5",
171 "RAID-5+1",
172 "RAID-6",
173 "RAID-1(Triple)",
174 };
175
pqi_raid_level_to_string(u8 raid_level)176 static char *pqi_raid_level_to_string(u8 raid_level)
177 {
178 if (raid_level < ARRAY_SIZE(raid_levels))
179 return raid_levels[raid_level];
180
181 return "RAID UNKNOWN";
182 }
183
184 #define SA_RAID_0 0
185 #define SA_RAID_4 1
186 #define SA_RAID_1 2 /* also used for RAID 10 */
187 #define SA_RAID_5 3 /* also used for RAID 50 */
188 #define SA_RAID_51 4
189 #define SA_RAID_6 5 /* also used for RAID 60 */
190 #define SA_RAID_TRIPLE 6 /* also used for RAID 1+0 Triple */
191 #define SA_RAID_MAX SA_RAID_TRIPLE
192 #define SA_RAID_UNKNOWN 0xff
193
pqi_scsi_done(struct scsi_cmnd * scmd)194 static inline void pqi_scsi_done(struct scsi_cmnd *scmd)
195 {
196 pqi_prep_for_scsi_done(scmd);
197 scmd->scsi_done(scmd);
198 }
199
pqi_disable_write_same(struct scsi_device * sdev)200 static inline void pqi_disable_write_same(struct scsi_device *sdev)
201 {
202 sdev->no_write_same = 1;
203 }
204
pqi_scsi3addr_equal(u8 * scsi3addr1,u8 * scsi3addr2)205 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2)
206 {
207 return memcmp(scsi3addr1, scsi3addr2, 8) == 0;
208 }
209
pqi_is_logical_device(struct pqi_scsi_dev * device)210 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device)
211 {
212 return !device->is_physical_device;
213 }
214
pqi_is_external_raid_addr(u8 * scsi3addr)215 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr)
216 {
217 return scsi3addr[2] != 0;
218 }
219
pqi_ctrl_offline(struct pqi_ctrl_info * ctrl_info)220 static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
221 {
222 return !ctrl_info->controller_online;
223 }
224
pqi_check_ctrl_health(struct pqi_ctrl_info * ctrl_info)225 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info)
226 {
227 if (ctrl_info->controller_online)
228 if (!sis_is_firmware_running(ctrl_info))
229 pqi_take_ctrl_offline(ctrl_info);
230 }
231
pqi_is_hba_lunid(u8 * scsi3addr)232 static inline bool pqi_is_hba_lunid(u8 *scsi3addr)
233 {
234 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID);
235 }
236
237 #define PQI_DRIVER_SCRATCH_PQI_MODE 0x1
238 #define PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED 0x2
239
pqi_get_ctrl_mode(struct pqi_ctrl_info * ctrl_info)240 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(struct pqi_ctrl_info *ctrl_info)
241 {
242 return sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_PQI_MODE ? PQI_MODE : SIS_MODE;
243 }
244
pqi_save_ctrl_mode(struct pqi_ctrl_info * ctrl_info,enum pqi_ctrl_mode mode)245 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info,
246 enum pqi_ctrl_mode mode)
247 {
248 u32 driver_scratch;
249
250 driver_scratch = sis_read_driver_scratch(ctrl_info);
251
252 if (mode == PQI_MODE)
253 driver_scratch |= PQI_DRIVER_SCRATCH_PQI_MODE;
254 else
255 driver_scratch &= ~PQI_DRIVER_SCRATCH_PQI_MODE;
256
257 sis_write_driver_scratch(ctrl_info, driver_scratch);
258 }
259
pqi_is_fw_triage_supported(struct pqi_ctrl_info * ctrl_info)260 static inline bool pqi_is_fw_triage_supported(struct pqi_ctrl_info *ctrl_info)
261 {
262 return (sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED) != 0;
263 }
264
pqi_save_fw_triage_setting(struct pqi_ctrl_info * ctrl_info,bool is_supported)265 static inline void pqi_save_fw_triage_setting(struct pqi_ctrl_info *ctrl_info, bool is_supported)
266 {
267 u32 driver_scratch;
268
269 driver_scratch = sis_read_driver_scratch(ctrl_info);
270
271 if (is_supported)
272 driver_scratch |= PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED;
273 else
274 driver_scratch &= ~PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED;
275
276 sis_write_driver_scratch(ctrl_info, driver_scratch);
277 }
278
pqi_ctrl_block_scan(struct pqi_ctrl_info * ctrl_info)279 static inline void pqi_ctrl_block_scan(struct pqi_ctrl_info *ctrl_info)
280 {
281 ctrl_info->scan_blocked = true;
282 mutex_lock(&ctrl_info->scan_mutex);
283 }
284
pqi_ctrl_unblock_scan(struct pqi_ctrl_info * ctrl_info)285 static inline void pqi_ctrl_unblock_scan(struct pqi_ctrl_info *ctrl_info)
286 {
287 ctrl_info->scan_blocked = false;
288 mutex_unlock(&ctrl_info->scan_mutex);
289 }
290
pqi_ctrl_scan_blocked(struct pqi_ctrl_info * ctrl_info)291 static inline bool pqi_ctrl_scan_blocked(struct pqi_ctrl_info *ctrl_info)
292 {
293 return ctrl_info->scan_blocked;
294 }
295
pqi_ctrl_block_device_reset(struct pqi_ctrl_info * ctrl_info)296 static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info)
297 {
298 mutex_lock(&ctrl_info->lun_reset_mutex);
299 }
300
pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info * ctrl_info)301 static inline void pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info *ctrl_info)
302 {
303 mutex_unlock(&ctrl_info->lun_reset_mutex);
304 }
305
pqi_scsi_block_requests(struct pqi_ctrl_info * ctrl_info)306 static inline void pqi_scsi_block_requests(struct pqi_ctrl_info *ctrl_info)
307 {
308 struct Scsi_Host *shost;
309 unsigned int num_loops;
310 int msecs_sleep;
311
312 shost = ctrl_info->scsi_host;
313
314 scsi_block_requests(shost);
315
316 num_loops = 0;
317 msecs_sleep = 20;
318 while (scsi_host_busy(shost)) {
319 num_loops++;
320 if (num_loops == 10)
321 msecs_sleep = 500;
322 msleep(msecs_sleep);
323 }
324 }
325
pqi_scsi_unblock_requests(struct pqi_ctrl_info * ctrl_info)326 static inline void pqi_scsi_unblock_requests(struct pqi_ctrl_info *ctrl_info)
327 {
328 scsi_unblock_requests(ctrl_info->scsi_host);
329 }
330
pqi_ctrl_busy(struct pqi_ctrl_info * ctrl_info)331 static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info)
332 {
333 atomic_inc(&ctrl_info->num_busy_threads);
334 }
335
pqi_ctrl_unbusy(struct pqi_ctrl_info * ctrl_info)336 static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info)
337 {
338 atomic_dec(&ctrl_info->num_busy_threads);
339 }
340
pqi_ctrl_blocked(struct pqi_ctrl_info * ctrl_info)341 static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info)
342 {
343 return ctrl_info->block_requests;
344 }
345
pqi_ctrl_block_requests(struct pqi_ctrl_info * ctrl_info)346 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info)
347 {
348 ctrl_info->block_requests = true;
349 }
350
pqi_ctrl_unblock_requests(struct pqi_ctrl_info * ctrl_info)351 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info)
352 {
353 ctrl_info->block_requests = false;
354 wake_up_all(&ctrl_info->block_requests_wait);
355 }
356
pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info * ctrl_info)357 static void pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info)
358 {
359 if (!pqi_ctrl_blocked(ctrl_info))
360 return;
361
362 atomic_inc(&ctrl_info->num_blocked_threads);
363 wait_event(ctrl_info->block_requests_wait,
364 !pqi_ctrl_blocked(ctrl_info));
365 atomic_dec(&ctrl_info->num_blocked_threads);
366 }
367
368 #define PQI_QUIESCE_WARNING_TIMEOUT_SECS 10
369
pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info * ctrl_info)370 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info)
371 {
372 unsigned long start_jiffies;
373 unsigned long warning_timeout;
374 bool displayed_warning;
375
376 displayed_warning = false;
377 start_jiffies = jiffies;
378 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * PQI_HZ) + start_jiffies;
379
380 while (atomic_read(&ctrl_info->num_busy_threads) >
381 atomic_read(&ctrl_info->num_blocked_threads)) {
382 if (time_after(jiffies, warning_timeout)) {
383 dev_warn(&ctrl_info->pci_dev->dev,
384 "waiting %u seconds for driver activity to quiesce\n",
385 jiffies_to_msecs(jiffies - start_jiffies) / 1000);
386 displayed_warning = true;
387 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * PQI_HZ) + jiffies;
388 }
389 usleep_range(1000, 2000);
390 }
391
392 if (displayed_warning)
393 dev_warn(&ctrl_info->pci_dev->dev,
394 "driver activity quiesced after waiting for %u seconds\n",
395 jiffies_to_msecs(jiffies - start_jiffies) / 1000);
396 }
397
pqi_device_offline(struct pqi_scsi_dev * device)398 static inline bool pqi_device_offline(struct pqi_scsi_dev *device)
399 {
400 return device->device_offline;
401 }
402
pqi_ctrl_ofa_start(struct pqi_ctrl_info * ctrl_info)403 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info)
404 {
405 mutex_lock(&ctrl_info->ofa_mutex);
406 }
407
pqi_ctrl_ofa_done(struct pqi_ctrl_info * ctrl_info)408 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info)
409 {
410 mutex_unlock(&ctrl_info->ofa_mutex);
411 }
412
pqi_wait_until_ofa_finished(struct pqi_ctrl_info * ctrl_info)413 static inline void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info)
414 {
415 mutex_lock(&ctrl_info->ofa_mutex);
416 mutex_unlock(&ctrl_info->ofa_mutex);
417 }
418
pqi_ofa_in_progress(struct pqi_ctrl_info * ctrl_info)419 static inline bool pqi_ofa_in_progress(struct pqi_ctrl_info *ctrl_info)
420 {
421 return mutex_is_locked(&ctrl_info->ofa_mutex);
422 }
423
pqi_device_remove_start(struct pqi_scsi_dev * device)424 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device)
425 {
426 device->in_remove = true;
427 }
428
pqi_device_in_remove(struct pqi_scsi_dev * device)429 static inline bool pqi_device_in_remove(struct pqi_scsi_dev *device)
430 {
431 return device->in_remove;
432 }
433
pqi_event_type_to_event_index(unsigned int event_type)434 static inline int pqi_event_type_to_event_index(unsigned int event_type)
435 {
436 int index;
437
438 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++)
439 if (event_type == pqi_supported_event_types[index])
440 return index;
441
442 return -1;
443 }
444
pqi_is_supported_event(unsigned int event_type)445 static inline bool pqi_is_supported_event(unsigned int event_type)
446 {
447 return pqi_event_type_to_event_index(event_type) != -1;
448 }
449
pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info * ctrl_info,unsigned long delay)450 static inline void pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info *ctrl_info,
451 unsigned long delay)
452 {
453 if (pqi_ctrl_offline(ctrl_info))
454 return;
455
456 schedule_delayed_work(&ctrl_info->rescan_work, delay);
457 }
458
pqi_schedule_rescan_worker(struct pqi_ctrl_info * ctrl_info)459 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info)
460 {
461 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0);
462 }
463
464 #define PQI_RESCAN_WORK_DELAY (10 * PQI_HZ)
465
pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info * ctrl_info)466 static inline void pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info *ctrl_info)
467 {
468 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY);
469 }
470
pqi_cancel_rescan_worker(struct pqi_ctrl_info * ctrl_info)471 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info)
472 {
473 cancel_delayed_work_sync(&ctrl_info->rescan_work);
474 }
475
pqi_read_heartbeat_counter(struct pqi_ctrl_info * ctrl_info)476 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info)
477 {
478 if (!ctrl_info->heartbeat_counter)
479 return 0;
480
481 return readl(ctrl_info->heartbeat_counter);
482 }
483
pqi_read_soft_reset_status(struct pqi_ctrl_info * ctrl_info)484 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
485 {
486 return readb(ctrl_info->soft_reset_status);
487 }
488
pqi_clear_soft_reset_status(struct pqi_ctrl_info * ctrl_info)489 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info)
490 {
491 u8 status;
492
493 status = pqi_read_soft_reset_status(ctrl_info);
494 status &= ~PQI_SOFT_RESET_ABORT;
495 writeb(status, ctrl_info->soft_reset_status);
496 }
497
pqi_map_single(struct pci_dev * pci_dev,struct pqi_sg_descriptor * sg_descriptor,void * buffer,size_t buffer_length,enum dma_data_direction data_direction)498 static int pqi_map_single(struct pci_dev *pci_dev,
499 struct pqi_sg_descriptor *sg_descriptor, void *buffer,
500 size_t buffer_length, enum dma_data_direction data_direction)
501 {
502 dma_addr_t bus_address;
503
504 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE)
505 return 0;
506
507 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length,
508 data_direction);
509 if (dma_mapping_error(&pci_dev->dev, bus_address))
510 return -ENOMEM;
511
512 put_unaligned_le64((u64)bus_address, &sg_descriptor->address);
513 put_unaligned_le32(buffer_length, &sg_descriptor->length);
514 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
515
516 return 0;
517 }
518
pqi_pci_unmap(struct pci_dev * pci_dev,struct pqi_sg_descriptor * descriptors,int num_descriptors,enum dma_data_direction data_direction)519 static void pqi_pci_unmap(struct pci_dev *pci_dev,
520 struct pqi_sg_descriptor *descriptors, int num_descriptors,
521 enum dma_data_direction data_direction)
522 {
523 int i;
524
525 if (data_direction == DMA_NONE)
526 return;
527
528 for (i = 0; i < num_descriptors; i++)
529 dma_unmap_single(&pci_dev->dev,
530 (dma_addr_t)get_unaligned_le64(&descriptors[i].address),
531 get_unaligned_le32(&descriptors[i].length),
532 data_direction);
533 }
534
pqi_build_raid_path_request(struct pqi_ctrl_info * ctrl_info,struct pqi_raid_path_request * request,u8 cmd,u8 * scsi3addr,void * buffer,size_t buffer_length,u16 vpd_page,enum dma_data_direction * dir)535 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info,
536 struct pqi_raid_path_request *request, u8 cmd,
537 u8 *scsi3addr, void *buffer, size_t buffer_length,
538 u16 vpd_page, enum dma_data_direction *dir)
539 {
540 u8 *cdb;
541 size_t cdb_length = buffer_length;
542
543 memset(request, 0, sizeof(*request));
544
545 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
546 put_unaligned_le16(offsetof(struct pqi_raid_path_request,
547 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH,
548 &request->header.iu_length);
549 put_unaligned_le32(buffer_length, &request->buffer_length);
550 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number));
551 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
552 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
553
554 cdb = request->cdb;
555
556 switch (cmd) {
557 case INQUIRY:
558 request->data_direction = SOP_READ_FLAG;
559 cdb[0] = INQUIRY;
560 if (vpd_page & VPD_PAGE) {
561 cdb[1] = 0x1;
562 cdb[2] = (u8)vpd_page;
563 }
564 cdb[4] = (u8)cdb_length;
565 break;
566 case CISS_REPORT_LOG:
567 case CISS_REPORT_PHYS:
568 request->data_direction = SOP_READ_FLAG;
569 cdb[0] = cmd;
570 if (cmd == CISS_REPORT_PHYS)
571 cdb[1] = CISS_REPORT_PHYS_FLAG_OTHER;
572 else
573 cdb[1] = ctrl_info->ciss_report_log_flags;
574 put_unaligned_be32(cdb_length, &cdb[6]);
575 break;
576 case CISS_GET_RAID_MAP:
577 request->data_direction = SOP_READ_FLAG;
578 cdb[0] = CISS_READ;
579 cdb[1] = CISS_GET_RAID_MAP;
580 put_unaligned_be32(cdb_length, &cdb[6]);
581 break;
582 case SA_FLUSH_CACHE:
583 request->header.driver_flags = PQI_DRIVER_NONBLOCKABLE_REQUEST;
584 request->data_direction = SOP_WRITE_FLAG;
585 cdb[0] = BMIC_WRITE;
586 cdb[6] = BMIC_FLUSH_CACHE;
587 put_unaligned_be16(cdb_length, &cdb[7]);
588 break;
589 case BMIC_SENSE_DIAG_OPTIONS:
590 cdb_length = 0;
591 fallthrough;
592 case BMIC_IDENTIFY_CONTROLLER:
593 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
594 case BMIC_SENSE_SUBSYSTEM_INFORMATION:
595 case BMIC_SENSE_FEATURE:
596 request->data_direction = SOP_READ_FLAG;
597 cdb[0] = BMIC_READ;
598 cdb[6] = cmd;
599 put_unaligned_be16(cdb_length, &cdb[7]);
600 break;
601 case BMIC_SET_DIAG_OPTIONS:
602 cdb_length = 0;
603 fallthrough;
604 case BMIC_WRITE_HOST_WELLNESS:
605 request->data_direction = SOP_WRITE_FLAG;
606 cdb[0] = BMIC_WRITE;
607 cdb[6] = cmd;
608 put_unaligned_be16(cdb_length, &cdb[7]);
609 break;
610 case BMIC_CSMI_PASSTHRU:
611 request->data_direction = SOP_BIDIRECTIONAL;
612 cdb[0] = BMIC_WRITE;
613 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU;
614 cdb[6] = cmd;
615 put_unaligned_be16(cdb_length, &cdb[7]);
616 break;
617 default:
618 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd);
619 break;
620 }
621
622 switch (request->data_direction) {
623 case SOP_READ_FLAG:
624 *dir = DMA_FROM_DEVICE;
625 break;
626 case SOP_WRITE_FLAG:
627 *dir = DMA_TO_DEVICE;
628 break;
629 case SOP_NO_DIRECTION_FLAG:
630 *dir = DMA_NONE;
631 break;
632 default:
633 *dir = DMA_BIDIRECTIONAL;
634 break;
635 }
636
637 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0],
638 buffer, buffer_length, *dir);
639 }
640
pqi_reinit_io_request(struct pqi_io_request * io_request)641 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request)
642 {
643 io_request->scmd = NULL;
644 io_request->status = 0;
645 io_request->error_info = NULL;
646 io_request->raid_bypass = false;
647 }
648
pqi_alloc_io_request(struct pqi_ctrl_info * ctrl_info)649 static struct pqi_io_request *pqi_alloc_io_request(
650 struct pqi_ctrl_info *ctrl_info)
651 {
652 struct pqi_io_request *io_request;
653 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */
654
655 while (1) {
656 io_request = &ctrl_info->io_request_pool[i];
657 if (atomic_inc_return(&io_request->refcount) == 1)
658 break;
659 atomic_dec(&io_request->refcount);
660 i = (i + 1) % ctrl_info->max_io_slots;
661 }
662
663 /* benignly racy */
664 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots;
665
666 pqi_reinit_io_request(io_request);
667
668 return io_request;
669 }
670
pqi_free_io_request(struct pqi_io_request * io_request)671 static void pqi_free_io_request(struct pqi_io_request *io_request)
672 {
673 atomic_dec(&io_request->refcount);
674 }
675
pqi_send_scsi_raid_request(struct pqi_ctrl_info * ctrl_info,u8 cmd,u8 * scsi3addr,void * buffer,size_t buffer_length,u16 vpd_page,struct pqi_raid_error_info * error_info)676 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd,
677 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page,
678 struct pqi_raid_error_info *error_info)
679 {
680 int rc;
681 struct pqi_raid_path_request request;
682 enum dma_data_direction dir;
683
684 rc = pqi_build_raid_path_request(ctrl_info, &request, cmd, scsi3addr,
685 buffer, buffer_length, vpd_page, &dir);
686 if (rc)
687 return rc;
688
689 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, error_info);
690
691 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
692
693 return rc;
694 }
695
696 /* helper functions for pqi_send_scsi_raid_request */
697
pqi_send_ctrl_raid_request(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length)698 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info,
699 u8 cmd, void *buffer, size_t buffer_length)
700 {
701 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
702 buffer, buffer_length, 0, NULL);
703 }
704
pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length,struct pqi_raid_error_info * error_info)705 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info,
706 u8 cmd, void *buffer, size_t buffer_length,
707 struct pqi_raid_error_info *error_info)
708 {
709 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID,
710 buffer, buffer_length, 0, error_info);
711 }
712
pqi_identify_controller(struct pqi_ctrl_info * ctrl_info,struct bmic_identify_controller * buffer)713 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info,
714 struct bmic_identify_controller *buffer)
715 {
716 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER,
717 buffer, sizeof(*buffer));
718 }
719
pqi_sense_subsystem_info(struct pqi_ctrl_info * ctrl_info,struct bmic_sense_subsystem_info * sense_info)720 static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info,
721 struct bmic_sense_subsystem_info *sense_info)
722 {
723 return pqi_send_ctrl_raid_request(ctrl_info,
724 BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info,
725 sizeof(*sense_info));
726 }
727
pqi_scsi_inquiry(struct pqi_ctrl_info * ctrl_info,u8 * scsi3addr,u16 vpd_page,void * buffer,size_t buffer_length)728 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info,
729 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length)
730 {
731 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr,
732 buffer, buffer_length, vpd_page, NULL);
733 }
734
pqi_identify_physical_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * buffer,size_t buffer_length)735 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info,
736 struct pqi_scsi_dev *device,
737 struct bmic_identify_physical_device *buffer, size_t buffer_length)
738 {
739 int rc;
740 enum dma_data_direction dir;
741 u16 bmic_device_index;
742 struct pqi_raid_path_request request;
743
744 rc = pqi_build_raid_path_request(ctrl_info, &request,
745 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer,
746 buffer_length, 0, &dir);
747 if (rc)
748 return rc;
749
750 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr);
751 request.cdb[2] = (u8)bmic_device_index;
752 request.cdb[9] = (u8)(bmic_device_index >> 8);
753
754 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
755
756 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
757
758 return rc;
759 }
760
pqi_aio_limit_to_bytes(__le16 * limit)761 static inline u32 pqi_aio_limit_to_bytes(__le16 *limit)
762 {
763 u32 bytes;
764
765 bytes = get_unaligned_le16(limit);
766 if (bytes == 0)
767 bytes = ~0;
768 else
769 bytes *= 1024;
770
771 return bytes;
772 }
773
774 #pragma pack(1)
775
776 struct bmic_sense_feature_buffer {
777 struct bmic_sense_feature_buffer_header header;
778 struct bmic_sense_feature_io_page_aio_subpage aio_subpage;
779 };
780
781 #pragma pack()
782
783 #define MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH \
784 offsetofend(struct bmic_sense_feature_buffer, \
785 aio_subpage.max_write_raid_1_10_3drive)
786
787 #define MINIMUM_AIO_SUBPAGE_LENGTH \
788 (offsetofend(struct bmic_sense_feature_io_page_aio_subpage, \
789 max_write_raid_1_10_3drive) - \
790 sizeof_field(struct bmic_sense_feature_io_page_aio_subpage, header))
791
pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info * ctrl_info)792 static int pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info *ctrl_info)
793 {
794 int rc;
795 enum dma_data_direction dir;
796 struct pqi_raid_path_request request;
797 struct bmic_sense_feature_buffer *buffer;
798
799 buffer = kmalloc(sizeof(*buffer), GFP_KERNEL);
800 if (!buffer)
801 return -ENOMEM;
802
803 rc = pqi_build_raid_path_request(ctrl_info, &request, BMIC_SENSE_FEATURE, RAID_CTLR_LUNID,
804 buffer, sizeof(*buffer), 0, &dir);
805 if (rc)
806 goto error;
807
808 request.cdb[2] = BMIC_SENSE_FEATURE_IO_PAGE;
809 request.cdb[3] = BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE;
810
811 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
812
813 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir);
814
815 if (rc)
816 goto error;
817
818 if (buffer->header.page_code != BMIC_SENSE_FEATURE_IO_PAGE ||
819 buffer->header.subpage_code !=
820 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE ||
821 get_unaligned_le16(&buffer->header.buffer_length) <
822 MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH ||
823 buffer->aio_subpage.header.page_code !=
824 BMIC_SENSE_FEATURE_IO_PAGE ||
825 buffer->aio_subpage.header.subpage_code !=
826 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE ||
827 get_unaligned_le16(&buffer->aio_subpage.header.page_length) <
828 MINIMUM_AIO_SUBPAGE_LENGTH) {
829 goto error;
830 }
831
832 ctrl_info->max_transfer_encrypted_sas_sata =
833 pqi_aio_limit_to_bytes(
834 &buffer->aio_subpage.max_transfer_encrypted_sas_sata);
835
836 ctrl_info->max_transfer_encrypted_nvme =
837 pqi_aio_limit_to_bytes(
838 &buffer->aio_subpage.max_transfer_encrypted_nvme);
839
840 ctrl_info->max_write_raid_5_6 =
841 pqi_aio_limit_to_bytes(
842 &buffer->aio_subpage.max_write_raid_5_6);
843
844 ctrl_info->max_write_raid_1_10_2drive =
845 pqi_aio_limit_to_bytes(
846 &buffer->aio_subpage.max_write_raid_1_10_2drive);
847
848 ctrl_info->max_write_raid_1_10_3drive =
849 pqi_aio_limit_to_bytes(
850 &buffer->aio_subpage.max_write_raid_1_10_3drive);
851
852 error:
853 kfree(buffer);
854
855 return rc;
856 }
857
pqi_flush_cache(struct pqi_ctrl_info * ctrl_info,enum bmic_flush_cache_shutdown_event shutdown_event)858 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info,
859 enum bmic_flush_cache_shutdown_event shutdown_event)
860 {
861 int rc;
862 struct bmic_flush_cache *flush_cache;
863
864 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL);
865 if (!flush_cache)
866 return -ENOMEM;
867
868 flush_cache->shutdown_event = shutdown_event;
869
870 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache,
871 sizeof(*flush_cache));
872
873 kfree(flush_cache);
874
875 return rc;
876 }
877
pqi_csmi_smp_passthru(struct pqi_ctrl_info * ctrl_info,struct bmic_csmi_smp_passthru_buffer * buffer,size_t buffer_length,struct pqi_raid_error_info * error_info)878 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info,
879 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length,
880 struct pqi_raid_error_info *error_info)
881 {
882 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU,
883 buffer, buffer_length, error_info);
884 }
885
886 #define PQI_FETCH_PTRAID_DATA (1 << 31)
887
pqi_set_diag_rescan(struct pqi_ctrl_info * ctrl_info)888 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info)
889 {
890 int rc;
891 struct bmic_diag_options *diag;
892
893 diag = kzalloc(sizeof(*diag), GFP_KERNEL);
894 if (!diag)
895 return -ENOMEM;
896
897 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS,
898 diag, sizeof(*diag));
899 if (rc)
900 goto out;
901
902 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA);
903
904 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag,
905 sizeof(*diag));
906
907 out:
908 kfree(diag);
909
910 return rc;
911 }
912
pqi_write_host_wellness(struct pqi_ctrl_info * ctrl_info,void * buffer,size_t buffer_length)913 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info,
914 void *buffer, size_t buffer_length)
915 {
916 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS,
917 buffer, buffer_length);
918 }
919
920 #pragma pack(1)
921
922 struct bmic_host_wellness_driver_version {
923 u8 start_tag[4];
924 u8 driver_version_tag[2];
925 __le16 driver_version_length;
926 char driver_version[32];
927 u8 dont_write_tag[2];
928 u8 end_tag[2];
929 };
930
931 #pragma pack()
932
pqi_write_driver_version_to_host_wellness(struct pqi_ctrl_info * ctrl_info)933 static int pqi_write_driver_version_to_host_wellness(
934 struct pqi_ctrl_info *ctrl_info)
935 {
936 int rc;
937 struct bmic_host_wellness_driver_version *buffer;
938 size_t buffer_length;
939
940 buffer_length = sizeof(*buffer);
941
942 buffer = kmalloc(buffer_length, GFP_KERNEL);
943 if (!buffer)
944 return -ENOMEM;
945
946 buffer->start_tag[0] = '<';
947 buffer->start_tag[1] = 'H';
948 buffer->start_tag[2] = 'W';
949 buffer->start_tag[3] = '>';
950 buffer->driver_version_tag[0] = 'D';
951 buffer->driver_version_tag[1] = 'V';
952 put_unaligned_le16(sizeof(buffer->driver_version),
953 &buffer->driver_version_length);
954 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION,
955 sizeof(buffer->driver_version) - 1);
956 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0';
957 buffer->dont_write_tag[0] = 'D';
958 buffer->dont_write_tag[1] = 'W';
959 buffer->end_tag[0] = 'Z';
960 buffer->end_tag[1] = 'Z';
961
962 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
963
964 kfree(buffer);
965
966 return rc;
967 }
968
969 #pragma pack(1)
970
971 struct bmic_host_wellness_time {
972 u8 start_tag[4];
973 u8 time_tag[2];
974 __le16 time_length;
975 u8 time[8];
976 u8 dont_write_tag[2];
977 u8 end_tag[2];
978 };
979
980 #pragma pack()
981
pqi_write_current_time_to_host_wellness(struct pqi_ctrl_info * ctrl_info)982 static int pqi_write_current_time_to_host_wellness(
983 struct pqi_ctrl_info *ctrl_info)
984 {
985 int rc;
986 struct bmic_host_wellness_time *buffer;
987 size_t buffer_length;
988 time64_t local_time;
989 unsigned int year;
990 struct tm tm;
991
992 buffer_length = sizeof(*buffer);
993
994 buffer = kmalloc(buffer_length, GFP_KERNEL);
995 if (!buffer)
996 return -ENOMEM;
997
998 buffer->start_tag[0] = '<';
999 buffer->start_tag[1] = 'H';
1000 buffer->start_tag[2] = 'W';
1001 buffer->start_tag[3] = '>';
1002 buffer->time_tag[0] = 'T';
1003 buffer->time_tag[1] = 'D';
1004 put_unaligned_le16(sizeof(buffer->time),
1005 &buffer->time_length);
1006
1007 local_time = ktime_get_real_seconds();
1008 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm);
1009 year = tm.tm_year + 1900;
1010
1011 buffer->time[0] = bin2bcd(tm.tm_hour);
1012 buffer->time[1] = bin2bcd(tm.tm_min);
1013 buffer->time[2] = bin2bcd(tm.tm_sec);
1014 buffer->time[3] = 0;
1015 buffer->time[4] = bin2bcd(tm.tm_mon + 1);
1016 buffer->time[5] = bin2bcd(tm.tm_mday);
1017 buffer->time[6] = bin2bcd(year / 100);
1018 buffer->time[7] = bin2bcd(year % 100);
1019
1020 buffer->dont_write_tag[0] = 'D';
1021 buffer->dont_write_tag[1] = 'W';
1022 buffer->end_tag[0] = 'Z';
1023 buffer->end_tag[1] = 'Z';
1024
1025 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length);
1026
1027 kfree(buffer);
1028
1029 return rc;
1030 }
1031
1032 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * PQI_HZ)
1033
pqi_update_time_worker(struct work_struct * work)1034 static void pqi_update_time_worker(struct work_struct *work)
1035 {
1036 int rc;
1037 struct pqi_ctrl_info *ctrl_info;
1038
1039 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1040 update_time_work);
1041
1042 rc = pqi_write_current_time_to_host_wellness(ctrl_info);
1043 if (rc)
1044 dev_warn(&ctrl_info->pci_dev->dev,
1045 "error updating time on controller\n");
1046
1047 schedule_delayed_work(&ctrl_info->update_time_work,
1048 PQI_UPDATE_TIME_WORK_INTERVAL);
1049 }
1050
pqi_schedule_update_time_worker(struct pqi_ctrl_info * ctrl_info)1051 static inline void pqi_schedule_update_time_worker(struct pqi_ctrl_info *ctrl_info)
1052 {
1053 schedule_delayed_work(&ctrl_info->update_time_work, 0);
1054 }
1055
pqi_cancel_update_time_worker(struct pqi_ctrl_info * ctrl_info)1056 static inline void pqi_cancel_update_time_worker(struct pqi_ctrl_info *ctrl_info)
1057 {
1058 cancel_delayed_work_sync(&ctrl_info->update_time_work);
1059 }
1060
pqi_report_luns(struct pqi_ctrl_info * ctrl_info,u8 cmd,void * buffer,size_t buffer_length)1061 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void *buffer,
1062 size_t buffer_length)
1063 {
1064 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, buffer_length);
1065 }
1066
pqi_report_phys_logical_luns(struct pqi_ctrl_info * ctrl_info,u8 cmd,void ** buffer)1067 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void **buffer)
1068 {
1069 int rc;
1070 size_t lun_list_length;
1071 size_t lun_data_length;
1072 size_t new_lun_list_length;
1073 void *lun_data = NULL;
1074 struct report_lun_header *report_lun_header;
1075
1076 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL);
1077 if (!report_lun_header) {
1078 rc = -ENOMEM;
1079 goto out;
1080 }
1081
1082 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, sizeof(*report_lun_header));
1083 if (rc)
1084 goto out;
1085
1086 lun_list_length = get_unaligned_be32(&report_lun_header->list_length);
1087
1088 again:
1089 lun_data_length = sizeof(struct report_lun_header) + lun_list_length;
1090
1091 lun_data = kmalloc(lun_data_length, GFP_KERNEL);
1092 if (!lun_data) {
1093 rc = -ENOMEM;
1094 goto out;
1095 }
1096
1097 if (lun_list_length == 0) {
1098 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header));
1099 goto out;
1100 }
1101
1102 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length);
1103 if (rc)
1104 goto out;
1105
1106 new_lun_list_length =
1107 get_unaligned_be32(&((struct report_lun_header *)lun_data)->list_length);
1108
1109 if (new_lun_list_length > lun_list_length) {
1110 lun_list_length = new_lun_list_length;
1111 kfree(lun_data);
1112 goto again;
1113 }
1114
1115 out:
1116 kfree(report_lun_header);
1117
1118 if (rc) {
1119 kfree(lun_data);
1120 lun_data = NULL;
1121 }
1122
1123 *buffer = lun_data;
1124
1125 return rc;
1126 }
1127
pqi_report_phys_luns(struct pqi_ctrl_info * ctrl_info,void ** buffer)1128 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, void **buffer)
1129 {
1130 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, buffer);
1131 }
1132
pqi_report_logical_luns(struct pqi_ctrl_info * ctrl_info,void ** buffer)1133 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, void **buffer)
1134 {
1135 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer);
1136 }
1137
pqi_get_device_lists(struct pqi_ctrl_info * ctrl_info,struct report_phys_lun_extended ** physdev_list,struct report_log_lun_extended ** logdev_list)1138 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info,
1139 struct report_phys_lun_extended **physdev_list,
1140 struct report_log_lun_extended **logdev_list)
1141 {
1142 int rc;
1143 size_t logdev_list_length;
1144 size_t logdev_data_length;
1145 struct report_log_lun_extended *internal_logdev_list;
1146 struct report_log_lun_extended *logdev_data;
1147 struct report_lun_header report_lun_header;
1148
1149 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list);
1150 if (rc)
1151 dev_err(&ctrl_info->pci_dev->dev,
1152 "report physical LUNs failed\n");
1153
1154 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list);
1155 if (rc)
1156 dev_err(&ctrl_info->pci_dev->dev,
1157 "report logical LUNs failed\n");
1158
1159 /*
1160 * Tack the controller itself onto the end of the logical device list.
1161 */
1162
1163 logdev_data = *logdev_list;
1164
1165 if (logdev_data) {
1166 logdev_list_length =
1167 get_unaligned_be32(&logdev_data->header.list_length);
1168 } else {
1169 memset(&report_lun_header, 0, sizeof(report_lun_header));
1170 logdev_data =
1171 (struct report_log_lun_extended *)&report_lun_header;
1172 logdev_list_length = 0;
1173 }
1174
1175 logdev_data_length = sizeof(struct report_lun_header) +
1176 logdev_list_length;
1177
1178 internal_logdev_list = kmalloc(logdev_data_length +
1179 sizeof(struct report_log_lun_extended), GFP_KERNEL);
1180 if (!internal_logdev_list) {
1181 kfree(*logdev_list);
1182 *logdev_list = NULL;
1183 return -ENOMEM;
1184 }
1185
1186 memcpy(internal_logdev_list, logdev_data, logdev_data_length);
1187 memset((u8 *)internal_logdev_list + logdev_data_length, 0,
1188 sizeof(struct report_log_lun_extended_entry));
1189 put_unaligned_be32(logdev_list_length +
1190 sizeof(struct report_log_lun_extended_entry),
1191 &internal_logdev_list->header.list_length);
1192
1193 kfree(*logdev_list);
1194 *logdev_list = internal_logdev_list;
1195
1196 return 0;
1197 }
1198
pqi_set_bus_target_lun(struct pqi_scsi_dev * device,int bus,int target,int lun)1199 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device,
1200 int bus, int target, int lun)
1201 {
1202 device->bus = bus;
1203 device->target = target;
1204 device->lun = lun;
1205 }
1206
pqi_assign_bus_target_lun(struct pqi_scsi_dev * device)1207 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device)
1208 {
1209 u8 *scsi3addr;
1210 u32 lunid;
1211 int bus;
1212 int target;
1213 int lun;
1214
1215 scsi3addr = device->scsi3addr;
1216 lunid = get_unaligned_le32(scsi3addr);
1217
1218 if (pqi_is_hba_lunid(scsi3addr)) {
1219 /* The specified device is the controller. */
1220 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff);
1221 device->target_lun_valid = true;
1222 return;
1223 }
1224
1225 if (pqi_is_logical_device(device)) {
1226 if (device->is_external_raid_device) {
1227 bus = PQI_EXTERNAL_RAID_VOLUME_BUS;
1228 target = (lunid >> 16) & 0x3fff;
1229 lun = lunid & 0xff;
1230 } else {
1231 bus = PQI_RAID_VOLUME_BUS;
1232 target = 0;
1233 lun = lunid & 0x3fff;
1234 }
1235 pqi_set_bus_target_lun(device, bus, target, lun);
1236 device->target_lun_valid = true;
1237 return;
1238 }
1239
1240 /*
1241 * Defer target and LUN assignment for non-controller physical devices
1242 * because the SAS transport layer will make these assignments later.
1243 */
1244 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0);
1245 }
1246
pqi_get_raid_level(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1247 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info,
1248 struct pqi_scsi_dev *device)
1249 {
1250 int rc;
1251 u8 raid_level;
1252 u8 *buffer;
1253
1254 raid_level = SA_RAID_UNKNOWN;
1255
1256 buffer = kmalloc(64, GFP_KERNEL);
1257 if (buffer) {
1258 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1259 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64);
1260 if (rc == 0) {
1261 raid_level = buffer[8];
1262 if (raid_level > SA_RAID_MAX)
1263 raid_level = SA_RAID_UNKNOWN;
1264 }
1265 kfree(buffer);
1266 }
1267
1268 device->raid_level = raid_level;
1269 }
1270
pqi_validate_raid_map(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct raid_map * raid_map)1271 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info,
1272 struct pqi_scsi_dev *device, struct raid_map *raid_map)
1273 {
1274 char *err_msg;
1275 u32 raid_map_size;
1276 u32 r5or6_blocks_per_row;
1277
1278 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1279
1280 if (raid_map_size < offsetof(struct raid_map, disk_data)) {
1281 err_msg = "RAID map too small";
1282 goto bad_raid_map;
1283 }
1284
1285 if (device->raid_level == SA_RAID_1) {
1286 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) {
1287 err_msg = "invalid RAID-1 map";
1288 goto bad_raid_map;
1289 }
1290 } else if (device->raid_level == SA_RAID_TRIPLE) {
1291 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) {
1292 err_msg = "invalid RAID-1(Triple) map";
1293 goto bad_raid_map;
1294 }
1295 } else if ((device->raid_level == SA_RAID_5 ||
1296 device->raid_level == SA_RAID_6) &&
1297 get_unaligned_le16(&raid_map->layout_map_count) > 1) {
1298 /* RAID 50/60 */
1299 r5or6_blocks_per_row =
1300 get_unaligned_le16(&raid_map->strip_size) *
1301 get_unaligned_le16(&raid_map->data_disks_per_row);
1302 if (r5or6_blocks_per_row == 0) {
1303 err_msg = "invalid RAID-5 or RAID-6 map";
1304 goto bad_raid_map;
1305 }
1306 }
1307
1308 return 0;
1309
1310 bad_raid_map:
1311 dev_warn(&ctrl_info->pci_dev->dev,
1312 "logical device %08x%08x %s\n",
1313 *((u32 *)&device->scsi3addr),
1314 *((u32 *)&device->scsi3addr[4]), err_msg);
1315
1316 return -EINVAL;
1317 }
1318
pqi_get_raid_map(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1319 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info,
1320 struct pqi_scsi_dev *device)
1321 {
1322 int rc;
1323 u32 raid_map_size;
1324 struct raid_map *raid_map;
1325
1326 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL);
1327 if (!raid_map)
1328 return -ENOMEM;
1329
1330 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1331 device->scsi3addr, raid_map, sizeof(*raid_map), 0, NULL);
1332 if (rc)
1333 goto error;
1334
1335 raid_map_size = get_unaligned_le32(&raid_map->structure_size);
1336
1337 if (raid_map_size > sizeof(*raid_map)) {
1338
1339 kfree(raid_map);
1340
1341 raid_map = kmalloc(raid_map_size, GFP_KERNEL);
1342 if (!raid_map)
1343 return -ENOMEM;
1344
1345 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP,
1346 device->scsi3addr, raid_map, raid_map_size, 0, NULL);
1347 if (rc)
1348 goto error;
1349
1350 if (get_unaligned_le32(&raid_map->structure_size)
1351 != raid_map_size) {
1352 dev_warn(&ctrl_info->pci_dev->dev,
1353 "requested %u bytes, received %u bytes\n",
1354 raid_map_size,
1355 get_unaligned_le32(&raid_map->structure_size));
1356 rc = -EINVAL;
1357 goto error;
1358 }
1359 }
1360
1361 rc = pqi_validate_raid_map(ctrl_info, device, raid_map);
1362 if (rc)
1363 goto error;
1364
1365 device->raid_map = raid_map;
1366
1367 return 0;
1368
1369 error:
1370 kfree(raid_map);
1371
1372 return rc;
1373 }
1374
pqi_set_max_transfer_encrypted(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1375 static void pqi_set_max_transfer_encrypted(struct pqi_ctrl_info *ctrl_info,
1376 struct pqi_scsi_dev *device)
1377 {
1378 if (!ctrl_info->lv_drive_type_mix_valid) {
1379 device->max_transfer_encrypted = ~0;
1380 return;
1381 }
1382
1383 switch (LV_GET_DRIVE_TYPE_MIX(device->scsi3addr)) {
1384 case LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY:
1385 case LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY:
1386 case LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY:
1387 case LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY:
1388 case LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY:
1389 case LV_DRIVE_TYPE_MIX_SAS_ONLY:
1390 case LV_DRIVE_TYPE_MIX_SATA_ONLY:
1391 device->max_transfer_encrypted =
1392 ctrl_info->max_transfer_encrypted_sas_sata;
1393 break;
1394 case LV_DRIVE_TYPE_MIX_NVME_ONLY:
1395 device->max_transfer_encrypted =
1396 ctrl_info->max_transfer_encrypted_nvme;
1397 break;
1398 case LV_DRIVE_TYPE_MIX_UNKNOWN:
1399 case LV_DRIVE_TYPE_MIX_NO_RESTRICTION:
1400 default:
1401 device->max_transfer_encrypted =
1402 min(ctrl_info->max_transfer_encrypted_sas_sata,
1403 ctrl_info->max_transfer_encrypted_nvme);
1404 break;
1405 }
1406 }
1407
pqi_get_raid_bypass_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1408 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info,
1409 struct pqi_scsi_dev *device)
1410 {
1411 int rc;
1412 u8 *buffer;
1413 u8 bypass_status;
1414
1415 buffer = kmalloc(64, GFP_KERNEL);
1416 if (!buffer)
1417 return;
1418
1419 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1420 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64);
1421 if (rc)
1422 goto out;
1423
1424 #define RAID_BYPASS_STATUS 4
1425 #define RAID_BYPASS_CONFIGURED 0x1
1426 #define RAID_BYPASS_ENABLED 0x2
1427
1428 bypass_status = buffer[RAID_BYPASS_STATUS];
1429 device->raid_bypass_configured =
1430 (bypass_status & RAID_BYPASS_CONFIGURED) != 0;
1431 if (device->raid_bypass_configured &&
1432 (bypass_status & RAID_BYPASS_ENABLED) &&
1433 pqi_get_raid_map(ctrl_info, device) == 0) {
1434 device->raid_bypass_enabled = true;
1435 if (get_unaligned_le16(&device->raid_map->flags) &
1436 RAID_MAP_ENCRYPTION_ENABLED)
1437 pqi_set_max_transfer_encrypted(ctrl_info, device);
1438 }
1439
1440 out:
1441 kfree(buffer);
1442 }
1443
1444 /*
1445 * Use vendor-specific VPD to determine online/offline status of a volume.
1446 */
1447
pqi_get_volume_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1448 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info,
1449 struct pqi_scsi_dev *device)
1450 {
1451 int rc;
1452 size_t page_length;
1453 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE;
1454 bool volume_offline = true;
1455 u32 volume_flags;
1456 struct ciss_vpd_logical_volume_status *vpd;
1457
1458 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL);
1459 if (!vpd)
1460 goto no_buffer;
1461
1462 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr,
1463 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd));
1464 if (rc)
1465 goto out;
1466
1467 if (vpd->page_code != CISS_VPD_LV_STATUS)
1468 goto out;
1469
1470 page_length = offsetof(struct ciss_vpd_logical_volume_status,
1471 volume_status) + vpd->page_length;
1472 if (page_length < sizeof(*vpd))
1473 goto out;
1474
1475 volume_status = vpd->volume_status;
1476 volume_flags = get_unaligned_be32(&vpd->flags);
1477 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0;
1478
1479 out:
1480 kfree(vpd);
1481 no_buffer:
1482 device->volume_status = volume_status;
1483 device->volume_offline = volume_offline;
1484 }
1485
1486 #define PQI_DEVICE_PHY_MAP_SUPPORTED 0x10
1487
pqi_get_physical_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1488 static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info,
1489 struct pqi_scsi_dev *device,
1490 struct bmic_identify_physical_device *id_phys)
1491 {
1492 int rc;
1493
1494 memset(id_phys, 0, sizeof(*id_phys));
1495
1496 rc = pqi_identify_physical_device(ctrl_info, device,
1497 id_phys, sizeof(*id_phys));
1498 if (rc) {
1499 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH;
1500 return rc;
1501 }
1502
1503 scsi_sanitize_inquiry_string(&id_phys->model[0], 8);
1504 scsi_sanitize_inquiry_string(&id_phys->model[8], 16);
1505
1506 memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor));
1507 memcpy(device->model, &id_phys->model[8], sizeof(device->model));
1508
1509 device->box_index = id_phys->box_index;
1510 device->phys_box_on_bus = id_phys->phys_box_on_bus;
1511 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0];
1512 device->queue_depth =
1513 get_unaligned_le16(&id_phys->current_queue_depth_limit);
1514 device->active_path_index = id_phys->active_path_number;
1515 device->path_map = id_phys->redundant_path_present_map;
1516 memcpy(&device->box,
1517 &id_phys->alternate_paths_phys_box_on_port,
1518 sizeof(device->box));
1519 memcpy(&device->phys_connector,
1520 &id_phys->alternate_paths_phys_connector,
1521 sizeof(device->phys_connector));
1522 device->bay = id_phys->phys_bay_in_box;
1523
1524 memcpy(&device->page_83_identifier, &id_phys->page_83_identifier,
1525 sizeof(device->page_83_identifier));
1526
1527 if ((id_phys->even_more_flags & PQI_DEVICE_PHY_MAP_SUPPORTED) &&
1528 id_phys->phy_count)
1529 device->phy_id =
1530 id_phys->phy_to_phy_map[device->active_path_index];
1531 else
1532 device->phy_id = 0xFF;
1533
1534 return 0;
1535 }
1536
pqi_get_logical_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1537 static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info,
1538 struct pqi_scsi_dev *device)
1539 {
1540 int rc;
1541 u8 *buffer;
1542
1543 buffer = kmalloc(64, GFP_KERNEL);
1544 if (!buffer)
1545 return -ENOMEM;
1546
1547 /* Send an inquiry to the device to see what it is. */
1548 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64);
1549 if (rc)
1550 goto out;
1551
1552 scsi_sanitize_inquiry_string(&buffer[8], 8);
1553 scsi_sanitize_inquiry_string(&buffer[16], 16);
1554
1555 device->devtype = buffer[0] & 0x1f;
1556 memcpy(device->vendor, &buffer[8], sizeof(device->vendor));
1557 memcpy(device->model, &buffer[16], sizeof(device->model));
1558
1559 if (device->devtype == TYPE_DISK) {
1560 if (device->is_external_raid_device) {
1561 device->raid_level = SA_RAID_UNKNOWN;
1562 device->volume_status = CISS_LV_OK;
1563 device->volume_offline = false;
1564 } else {
1565 pqi_get_raid_level(ctrl_info, device);
1566 pqi_get_raid_bypass_status(ctrl_info, device);
1567 pqi_get_volume_status(ctrl_info, device);
1568 }
1569 }
1570
1571 out:
1572 kfree(buffer);
1573
1574 return rc;
1575 }
1576
pqi_get_device_info(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct bmic_identify_physical_device * id_phys)1577 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info,
1578 struct pqi_scsi_dev *device,
1579 struct bmic_identify_physical_device *id_phys)
1580 {
1581 int rc;
1582
1583 if (device->is_expander_smp_device)
1584 return 0;
1585
1586 if (pqi_is_logical_device(device))
1587 rc = pqi_get_logical_device_info(ctrl_info, device);
1588 else
1589 rc = pqi_get_physical_device_info(ctrl_info, device, id_phys);
1590
1591 return rc;
1592 }
1593
pqi_show_volume_status(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1594 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info,
1595 struct pqi_scsi_dev *device)
1596 {
1597 char *status;
1598 static const char unknown_state_str[] =
1599 "Volume is in an unknown state (%u)";
1600 char unknown_state_buffer[sizeof(unknown_state_str) + 10];
1601
1602 switch (device->volume_status) {
1603 case CISS_LV_OK:
1604 status = "Volume online";
1605 break;
1606 case CISS_LV_FAILED:
1607 status = "Volume failed";
1608 break;
1609 case CISS_LV_NOT_CONFIGURED:
1610 status = "Volume not configured";
1611 break;
1612 case CISS_LV_DEGRADED:
1613 status = "Volume degraded";
1614 break;
1615 case CISS_LV_READY_FOR_RECOVERY:
1616 status = "Volume ready for recovery operation";
1617 break;
1618 case CISS_LV_UNDERGOING_RECOVERY:
1619 status = "Volume undergoing recovery";
1620 break;
1621 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED:
1622 status = "Wrong physical drive was replaced";
1623 break;
1624 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM:
1625 status = "A physical drive not properly connected";
1626 break;
1627 case CISS_LV_HARDWARE_OVERHEATING:
1628 status = "Hardware is overheating";
1629 break;
1630 case CISS_LV_HARDWARE_HAS_OVERHEATED:
1631 status = "Hardware has overheated";
1632 break;
1633 case CISS_LV_UNDERGOING_EXPANSION:
1634 status = "Volume undergoing expansion";
1635 break;
1636 case CISS_LV_NOT_AVAILABLE:
1637 status = "Volume waiting for transforming volume";
1638 break;
1639 case CISS_LV_QUEUED_FOR_EXPANSION:
1640 status = "Volume queued for expansion";
1641 break;
1642 case CISS_LV_DISABLED_SCSI_ID_CONFLICT:
1643 status = "Volume disabled due to SCSI ID conflict";
1644 break;
1645 case CISS_LV_EJECTED:
1646 status = "Volume has been ejected";
1647 break;
1648 case CISS_LV_UNDERGOING_ERASE:
1649 status = "Volume undergoing background erase";
1650 break;
1651 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD:
1652 status = "Volume ready for predictive spare rebuild";
1653 break;
1654 case CISS_LV_UNDERGOING_RPI:
1655 status = "Volume undergoing rapid parity initialization";
1656 break;
1657 case CISS_LV_PENDING_RPI:
1658 status = "Volume queued for rapid parity initialization";
1659 break;
1660 case CISS_LV_ENCRYPTED_NO_KEY:
1661 status = "Encrypted volume inaccessible - key not present";
1662 break;
1663 case CISS_LV_UNDERGOING_ENCRYPTION:
1664 status = "Volume undergoing encryption process";
1665 break;
1666 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING:
1667 status = "Volume undergoing encryption re-keying process";
1668 break;
1669 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1670 status = "Volume encrypted but encryption is disabled";
1671 break;
1672 case CISS_LV_PENDING_ENCRYPTION:
1673 status = "Volume pending migration to encrypted state";
1674 break;
1675 case CISS_LV_PENDING_ENCRYPTION_REKEYING:
1676 status = "Volume pending encryption rekeying";
1677 break;
1678 case CISS_LV_NOT_SUPPORTED:
1679 status = "Volume not supported on this controller";
1680 break;
1681 case CISS_LV_STATUS_UNAVAILABLE:
1682 status = "Volume status not available";
1683 break;
1684 default:
1685 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer),
1686 unknown_state_str, device->volume_status);
1687 status = unknown_state_buffer;
1688 break;
1689 }
1690
1691 dev_info(&ctrl_info->pci_dev->dev,
1692 "scsi %d:%d:%d:%d %s\n",
1693 ctrl_info->scsi_host->host_no,
1694 device->bus, device->target, device->lun, status);
1695 }
1696
pqi_rescan_worker(struct work_struct * work)1697 static void pqi_rescan_worker(struct work_struct *work)
1698 {
1699 struct pqi_ctrl_info *ctrl_info;
1700
1701 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info,
1702 rescan_work);
1703
1704 pqi_scan_scsi_devices(ctrl_info);
1705 }
1706
pqi_add_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1707 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info,
1708 struct pqi_scsi_dev *device)
1709 {
1710 int rc;
1711
1712 if (pqi_is_logical_device(device))
1713 rc = scsi_add_device(ctrl_info->scsi_host, device->bus,
1714 device->target, device->lun);
1715 else
1716 rc = pqi_add_sas_device(ctrl_info->sas_host, device);
1717
1718 return rc;
1719 }
1720
1721 #define PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS (20 * 1000)
1722
pqi_remove_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1723 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device)
1724 {
1725 int rc;
1726
1727 pqi_device_remove_start(device);
1728
1729 rc = pqi_device_wait_for_pending_io(ctrl_info, device,
1730 PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS);
1731 if (rc)
1732 dev_err(&ctrl_info->pci_dev->dev,
1733 "scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n",
1734 ctrl_info->scsi_host->host_no, device->bus,
1735 device->target, device->lun,
1736 atomic_read(&device->scsi_cmds_outstanding));
1737
1738 if (pqi_is_logical_device(device))
1739 scsi_remove_device(device->sdev);
1740 else
1741 pqi_remove_sas_device(device);
1742 }
1743
1744 /* Assumes the SCSI device list lock is held. */
1745
pqi_find_scsi_dev(struct pqi_ctrl_info * ctrl_info,int bus,int target,int lun)1746 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info,
1747 int bus, int target, int lun)
1748 {
1749 struct pqi_scsi_dev *device;
1750
1751 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
1752 if (device->bus == bus && device->target == target && device->lun == lun)
1753 return device;
1754
1755 return NULL;
1756 }
1757
pqi_device_equal(struct pqi_scsi_dev * dev1,struct pqi_scsi_dev * dev2)1758 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, struct pqi_scsi_dev *dev2)
1759 {
1760 if (dev1->is_physical_device != dev2->is_physical_device)
1761 return false;
1762
1763 if (dev1->is_physical_device)
1764 return dev1->wwid == dev2->wwid;
1765
1766 return memcmp(dev1->volume_id, dev2->volume_id, sizeof(dev1->volume_id)) == 0;
1767 }
1768
1769 enum pqi_find_result {
1770 DEVICE_NOT_FOUND,
1771 DEVICE_CHANGED,
1772 DEVICE_SAME,
1773 };
1774
pqi_scsi_find_entry(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device_to_find,struct pqi_scsi_dev ** matching_device)1775 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info,
1776 struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device)
1777 {
1778 struct pqi_scsi_dev *device;
1779
1780 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) {
1781 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) {
1782 *matching_device = device;
1783 if (pqi_device_equal(device_to_find, device)) {
1784 if (device_to_find->volume_offline)
1785 return DEVICE_CHANGED;
1786 return DEVICE_SAME;
1787 }
1788 return DEVICE_CHANGED;
1789 }
1790 }
1791
1792 return DEVICE_NOT_FOUND;
1793 }
1794
pqi_device_type(struct pqi_scsi_dev * device)1795 static inline const char *pqi_device_type(struct pqi_scsi_dev *device)
1796 {
1797 if (device->is_expander_smp_device)
1798 return "Enclosure SMP ";
1799
1800 return scsi_device_type(device->devtype);
1801 }
1802
1803 #define PQI_DEV_INFO_BUFFER_LENGTH 128
1804
pqi_dev_info(struct pqi_ctrl_info * ctrl_info,char * action,struct pqi_scsi_dev * device)1805 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info,
1806 char *action, struct pqi_scsi_dev *device)
1807 {
1808 ssize_t count;
1809 char buffer[PQI_DEV_INFO_BUFFER_LENGTH];
1810
1811 count = scnprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH,
1812 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus);
1813
1814 if (device->target_lun_valid)
1815 count += scnprintf(buffer + count,
1816 PQI_DEV_INFO_BUFFER_LENGTH - count,
1817 "%d:%d",
1818 device->target,
1819 device->lun);
1820 else
1821 count += scnprintf(buffer + count,
1822 PQI_DEV_INFO_BUFFER_LENGTH - count,
1823 "-:-");
1824
1825 if (pqi_is_logical_device(device))
1826 count += scnprintf(buffer + count,
1827 PQI_DEV_INFO_BUFFER_LENGTH - count,
1828 " %08x%08x",
1829 *((u32 *)&device->scsi3addr),
1830 *((u32 *)&device->scsi3addr[4]));
1831 else
1832 count += scnprintf(buffer + count,
1833 PQI_DEV_INFO_BUFFER_LENGTH - count,
1834 " %016llx", device->sas_address);
1835
1836 count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count,
1837 " %s %.8s %.16s ",
1838 pqi_device_type(device),
1839 device->vendor,
1840 device->model);
1841
1842 if (pqi_is_logical_device(device)) {
1843 if (device->devtype == TYPE_DISK)
1844 count += scnprintf(buffer + count,
1845 PQI_DEV_INFO_BUFFER_LENGTH - count,
1846 "SSDSmartPathCap%c En%c %-12s",
1847 device->raid_bypass_configured ? '+' : '-',
1848 device->raid_bypass_enabled ? '+' : '-',
1849 pqi_raid_level_to_string(device->raid_level));
1850 } else {
1851 count += scnprintf(buffer + count,
1852 PQI_DEV_INFO_BUFFER_LENGTH - count,
1853 "AIO%c", device->aio_enabled ? '+' : '-');
1854 if (device->devtype == TYPE_DISK ||
1855 device->devtype == TYPE_ZBC)
1856 count += scnprintf(buffer + count,
1857 PQI_DEV_INFO_BUFFER_LENGTH - count,
1858 " qd=%-6d", device->queue_depth);
1859 }
1860
1861 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer);
1862 }
1863
1864 /* Assumes the SCSI device list lock is held. */
1865
pqi_scsi_update_device(struct pqi_scsi_dev * existing_device,struct pqi_scsi_dev * new_device)1866 static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device,
1867 struct pqi_scsi_dev *new_device)
1868 {
1869 existing_device->device_type = new_device->device_type;
1870 existing_device->bus = new_device->bus;
1871 if (new_device->target_lun_valid) {
1872 existing_device->target = new_device->target;
1873 existing_device->lun = new_device->lun;
1874 existing_device->target_lun_valid = true;
1875 }
1876
1877 if ((existing_device->volume_status == CISS_LV_QUEUED_FOR_EXPANSION ||
1878 existing_device->volume_status == CISS_LV_UNDERGOING_EXPANSION) &&
1879 new_device->volume_status == CISS_LV_OK)
1880 existing_device->rescan = true;
1881
1882 /* By definition, the scsi3addr and wwid fields are already the same. */
1883
1884 existing_device->is_physical_device = new_device->is_physical_device;
1885 existing_device->is_external_raid_device =
1886 new_device->is_external_raid_device;
1887 existing_device->is_expander_smp_device =
1888 new_device->is_expander_smp_device;
1889 existing_device->aio_enabled = new_device->aio_enabled;
1890 memcpy(existing_device->vendor, new_device->vendor,
1891 sizeof(existing_device->vendor));
1892 memcpy(existing_device->model, new_device->model,
1893 sizeof(existing_device->model));
1894 existing_device->sas_address = new_device->sas_address;
1895 existing_device->raid_level = new_device->raid_level;
1896 existing_device->queue_depth = new_device->queue_depth;
1897 existing_device->aio_handle = new_device->aio_handle;
1898 existing_device->volume_status = new_device->volume_status;
1899 existing_device->active_path_index = new_device->active_path_index;
1900 existing_device->phy_id = new_device->phy_id;
1901 existing_device->path_map = new_device->path_map;
1902 existing_device->bay = new_device->bay;
1903 existing_device->box_index = new_device->box_index;
1904 existing_device->phys_box_on_bus = new_device->phys_box_on_bus;
1905 existing_device->phy_connected_dev_type = new_device->phy_connected_dev_type;
1906 memcpy(existing_device->box, new_device->box,
1907 sizeof(existing_device->box));
1908 memcpy(existing_device->phys_connector, new_device->phys_connector,
1909 sizeof(existing_device->phys_connector));
1910 existing_device->next_bypass_group = 0;
1911 kfree(existing_device->raid_map);
1912 existing_device->raid_map = new_device->raid_map;
1913 existing_device->raid_bypass_configured =
1914 new_device->raid_bypass_configured;
1915 existing_device->raid_bypass_enabled =
1916 new_device->raid_bypass_enabled;
1917 existing_device->device_offline = false;
1918
1919 /* To prevent this from being freed later. */
1920 new_device->raid_map = NULL;
1921 }
1922
pqi_free_device(struct pqi_scsi_dev * device)1923 static inline void pqi_free_device(struct pqi_scsi_dev *device)
1924 {
1925 if (device) {
1926 kfree(device->raid_map);
1927 kfree(device);
1928 }
1929 }
1930
1931 /*
1932 * Called when exposing a new device to the OS fails in order to re-adjust
1933 * our internal SCSI device list to match the SCSI ML's view.
1934 */
1935
pqi_fixup_botched_add(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)1936 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info,
1937 struct pqi_scsi_dev *device)
1938 {
1939 unsigned long flags;
1940
1941 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1942 list_del(&device->scsi_device_list_entry);
1943 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
1944
1945 /* Allow the device structure to be freed later. */
1946 device->keep_device = false;
1947 }
1948
pqi_is_device_added(struct pqi_scsi_dev * device)1949 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device)
1950 {
1951 if (device->is_expander_smp_device)
1952 return device->sas_port != NULL;
1953
1954 return device->sdev != NULL;
1955 }
1956
pqi_update_device_list(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * new_device_list[],unsigned int num_new_devices)1957 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info,
1958 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices)
1959 {
1960 int rc;
1961 unsigned int i;
1962 unsigned long flags;
1963 enum pqi_find_result find_result;
1964 struct pqi_scsi_dev *device;
1965 struct pqi_scsi_dev *next;
1966 struct pqi_scsi_dev *matching_device;
1967 LIST_HEAD(add_list);
1968 LIST_HEAD(delete_list);
1969
1970 /*
1971 * The idea here is to do as little work as possible while holding the
1972 * spinlock. That's why we go to great pains to defer anything other
1973 * than updating the internal device list until after we release the
1974 * spinlock.
1975 */
1976
1977 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
1978
1979 /* Assume that all devices in the existing list have gone away. */
1980 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry)
1981 device->device_gone = true;
1982
1983 for (i = 0; i < num_new_devices; i++) {
1984 device = new_device_list[i];
1985
1986 find_result = pqi_scsi_find_entry(ctrl_info, device,
1987 &matching_device);
1988
1989 switch (find_result) {
1990 case DEVICE_SAME:
1991 /*
1992 * The newly found device is already in the existing
1993 * device list.
1994 */
1995 device->new_device = false;
1996 matching_device->device_gone = false;
1997 pqi_scsi_update_device(matching_device, device);
1998 break;
1999 case DEVICE_NOT_FOUND:
2000 /*
2001 * The newly found device is NOT in the existing device
2002 * list.
2003 */
2004 device->new_device = true;
2005 break;
2006 case DEVICE_CHANGED:
2007 /*
2008 * The original device has gone away and we need to add
2009 * the new device.
2010 */
2011 device->new_device = true;
2012 break;
2013 }
2014 }
2015
2016 /* Process all devices that have gone away. */
2017 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list,
2018 scsi_device_list_entry) {
2019 if (device->device_gone) {
2020 list_del_init(&device->scsi_device_list_entry);
2021 list_add_tail(&device->delete_list_entry, &delete_list);
2022 }
2023 }
2024
2025 /* Process all new devices. */
2026 for (i = 0; i < num_new_devices; i++) {
2027 device = new_device_list[i];
2028 if (!device->new_device)
2029 continue;
2030 if (device->volume_offline)
2031 continue;
2032 list_add_tail(&device->scsi_device_list_entry,
2033 &ctrl_info->scsi_device_list);
2034 list_add_tail(&device->add_list_entry, &add_list);
2035 /* To prevent this device structure from being freed later. */
2036 device->keep_device = true;
2037 }
2038
2039 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
2040
2041 /*
2042 * If OFA is in progress and there are devices that need to be deleted,
2043 * allow any pending reset operations to continue and unblock any SCSI
2044 * requests before removal.
2045 */
2046 if (pqi_ofa_in_progress(ctrl_info)) {
2047 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry)
2048 if (pqi_is_device_added(device))
2049 pqi_device_remove_start(device);
2050 pqi_ctrl_unblock_device_reset(ctrl_info);
2051 pqi_scsi_unblock_requests(ctrl_info);
2052 }
2053
2054 /* Remove all devices that have gone away. */
2055 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) {
2056 if (device->volume_offline) {
2057 pqi_dev_info(ctrl_info, "offline", device);
2058 pqi_show_volume_status(ctrl_info, device);
2059 }
2060 list_del(&device->delete_list_entry);
2061 if (pqi_is_device_added(device)) {
2062 pqi_remove_device(ctrl_info, device);
2063 } else {
2064 if (!device->volume_offline)
2065 pqi_dev_info(ctrl_info, "removed", device);
2066 pqi_free_device(device);
2067 }
2068 }
2069
2070 /*
2071 * Notify the SCSI ML if the queue depth of any existing device has
2072 * changed.
2073 */
2074 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) {
2075 if (device->sdev && device->queue_depth != device->advertised_queue_depth) {
2076 device->advertised_queue_depth = device->queue_depth;
2077 scsi_change_queue_depth(device->sdev, device->advertised_queue_depth);
2078 if (device->rescan) {
2079 scsi_rescan_device(&device->sdev->sdev_gendev);
2080 device->rescan = false;
2081 }
2082 }
2083 }
2084
2085 /* Expose any new devices. */
2086 list_for_each_entry_safe(device, next, &add_list, add_list_entry) {
2087 if (!pqi_is_device_added(device)) {
2088 rc = pqi_add_device(ctrl_info, device);
2089 if (rc == 0) {
2090 pqi_dev_info(ctrl_info, "added", device);
2091 } else {
2092 dev_warn(&ctrl_info->pci_dev->dev,
2093 "scsi %d:%d:%d:%d addition failed, device not added\n",
2094 ctrl_info->scsi_host->host_no,
2095 device->bus, device->target,
2096 device->lun);
2097 pqi_fixup_botched_add(ctrl_info, device);
2098 }
2099 }
2100 }
2101 }
2102
pqi_is_supported_device(struct pqi_scsi_dev * device)2103 static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device)
2104 {
2105 /*
2106 * Only support the HBA controller itself as a RAID
2107 * controller. If it's a RAID controller other than
2108 * the HBA itself (an external RAID controller, for
2109 * example), we don't support it.
2110 */
2111 if (device->device_type == SA_DEVICE_TYPE_CONTROLLER &&
2112 !pqi_is_hba_lunid(device->scsi3addr))
2113 return false;
2114
2115 return true;
2116 }
2117
pqi_skip_device(u8 * scsi3addr)2118 static inline bool pqi_skip_device(u8 *scsi3addr)
2119 {
2120 /* Ignore all masked devices. */
2121 if (MASKED_DEVICE(scsi3addr))
2122 return true;
2123
2124 return false;
2125 }
2126
pqi_mask_device(u8 * scsi3addr)2127 static inline void pqi_mask_device(u8 *scsi3addr)
2128 {
2129 scsi3addr[3] |= 0xc0;
2130 }
2131
pqi_is_device_with_sas_address(struct pqi_scsi_dev * device)2132 static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device)
2133 {
2134 switch (device->device_type) {
2135 case SA_DEVICE_TYPE_SAS:
2136 case SA_DEVICE_TYPE_EXPANDER_SMP:
2137 case SA_DEVICE_TYPE_SES:
2138 return true;
2139 }
2140
2141 return false;
2142 }
2143
pqi_expose_device(struct pqi_scsi_dev * device)2144 static inline bool pqi_expose_device(struct pqi_scsi_dev *device)
2145 {
2146 return !device->is_physical_device || !pqi_skip_device(device->scsi3addr);
2147 }
2148
pqi_set_physical_device_wwid(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct report_phys_lun_extended_entry * phys_lun_ext_entry)2149 static inline void pqi_set_physical_device_wwid(struct pqi_ctrl_info *ctrl_info,
2150 struct pqi_scsi_dev *device, struct report_phys_lun_extended_entry *phys_lun_ext_entry)
2151 {
2152 if (ctrl_info->unique_wwid_in_report_phys_lun_supported ||
2153 pqi_is_device_with_sas_address(device))
2154 device->wwid = phys_lun_ext_entry->wwid;
2155 else
2156 device->wwid = cpu_to_be64(get_unaligned_be64(&device->page_83_identifier));
2157 }
2158
pqi_update_scsi_devices(struct pqi_ctrl_info * ctrl_info)2159 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2160 {
2161 int i;
2162 int rc;
2163 LIST_HEAD(new_device_list_head);
2164 struct report_phys_lun_extended *physdev_list = NULL;
2165 struct report_log_lun_extended *logdev_list = NULL;
2166 struct report_phys_lun_extended_entry *phys_lun_ext_entry;
2167 struct report_log_lun_extended_entry *log_lun_ext_entry;
2168 struct bmic_identify_physical_device *id_phys = NULL;
2169 u32 num_physicals;
2170 u32 num_logicals;
2171 struct pqi_scsi_dev **new_device_list = NULL;
2172 struct pqi_scsi_dev *device;
2173 struct pqi_scsi_dev *next;
2174 unsigned int num_new_devices;
2175 unsigned int num_valid_devices;
2176 bool is_physical_device;
2177 u8 *scsi3addr;
2178 unsigned int physical_index;
2179 unsigned int logical_index;
2180 static char *out_of_memory_msg =
2181 "failed to allocate memory, device discovery stopped";
2182
2183 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list);
2184 if (rc)
2185 goto out;
2186
2187 if (physdev_list)
2188 num_physicals =
2189 get_unaligned_be32(&physdev_list->header.list_length)
2190 / sizeof(physdev_list->lun_entries[0]);
2191 else
2192 num_physicals = 0;
2193
2194 if (logdev_list)
2195 num_logicals =
2196 get_unaligned_be32(&logdev_list->header.list_length)
2197 / sizeof(logdev_list->lun_entries[0]);
2198 else
2199 num_logicals = 0;
2200
2201 if (num_physicals) {
2202 /*
2203 * We need this buffer for calls to pqi_get_physical_disk_info()
2204 * below. We allocate it here instead of inside
2205 * pqi_get_physical_disk_info() because it's a fairly large
2206 * buffer.
2207 */
2208 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL);
2209 if (!id_phys) {
2210 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2211 out_of_memory_msg);
2212 rc = -ENOMEM;
2213 goto out;
2214 }
2215
2216 if (pqi_hide_vsep) {
2217 for (i = num_physicals - 1; i >= 0; i--) {
2218 phys_lun_ext_entry =
2219 &physdev_list->lun_entries[i];
2220 if (CISS_GET_DRIVE_NUMBER(phys_lun_ext_entry->lunid) == PQI_VSEP_CISS_BTL) {
2221 pqi_mask_device(phys_lun_ext_entry->lunid);
2222 break;
2223 }
2224 }
2225 }
2226 }
2227
2228 if (num_logicals &&
2229 (logdev_list->header.flags & CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX))
2230 ctrl_info->lv_drive_type_mix_valid = true;
2231
2232 num_new_devices = num_physicals + num_logicals;
2233
2234 new_device_list = kmalloc_array(num_new_devices,
2235 sizeof(*new_device_list),
2236 GFP_KERNEL);
2237 if (!new_device_list) {
2238 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg);
2239 rc = -ENOMEM;
2240 goto out;
2241 }
2242
2243 for (i = 0; i < num_new_devices; i++) {
2244 device = kzalloc(sizeof(*device), GFP_KERNEL);
2245 if (!device) {
2246 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2247 out_of_memory_msg);
2248 rc = -ENOMEM;
2249 goto out;
2250 }
2251 list_add_tail(&device->new_device_list_entry,
2252 &new_device_list_head);
2253 }
2254
2255 device = NULL;
2256 num_valid_devices = 0;
2257 physical_index = 0;
2258 logical_index = 0;
2259
2260 for (i = 0; i < num_new_devices; i++) {
2261
2262 if ((!pqi_expose_ld_first && i < num_physicals) ||
2263 (pqi_expose_ld_first && i >= num_logicals)) {
2264 is_physical_device = true;
2265 phys_lun_ext_entry =
2266 &physdev_list->lun_entries[physical_index++];
2267 log_lun_ext_entry = NULL;
2268 scsi3addr = phys_lun_ext_entry->lunid;
2269 } else {
2270 is_physical_device = false;
2271 phys_lun_ext_entry = NULL;
2272 log_lun_ext_entry =
2273 &logdev_list->lun_entries[logical_index++];
2274 scsi3addr = log_lun_ext_entry->lunid;
2275 }
2276
2277 if (is_physical_device && pqi_skip_device(scsi3addr))
2278 continue;
2279
2280 if (device)
2281 device = list_next_entry(device, new_device_list_entry);
2282 else
2283 device = list_first_entry(&new_device_list_head,
2284 struct pqi_scsi_dev, new_device_list_entry);
2285
2286 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
2287 device->is_physical_device = is_physical_device;
2288 if (is_physical_device) {
2289 device->device_type = phys_lun_ext_entry->device_type;
2290 if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP)
2291 device->is_expander_smp_device = true;
2292 } else {
2293 device->is_external_raid_device =
2294 pqi_is_external_raid_addr(scsi3addr);
2295 }
2296
2297 if (!pqi_is_supported_device(device))
2298 continue;
2299
2300 /* Gather information about the device. */
2301 rc = pqi_get_device_info(ctrl_info, device, id_phys);
2302 if (rc == -ENOMEM) {
2303 dev_warn(&ctrl_info->pci_dev->dev, "%s\n",
2304 out_of_memory_msg);
2305 goto out;
2306 }
2307 if (rc) {
2308 if (device->is_physical_device)
2309 dev_warn(&ctrl_info->pci_dev->dev,
2310 "obtaining device info failed, skipping physical device %016llx\n",
2311 get_unaligned_be64(&phys_lun_ext_entry->wwid));
2312 else
2313 dev_warn(&ctrl_info->pci_dev->dev,
2314 "obtaining device info failed, skipping logical device %08x%08x\n",
2315 *((u32 *)&device->scsi3addr),
2316 *((u32 *)&device->scsi3addr[4]));
2317 rc = 0;
2318 continue;
2319 }
2320
2321 pqi_assign_bus_target_lun(device);
2322
2323 if (device->is_physical_device) {
2324 pqi_set_physical_device_wwid(ctrl_info, device, phys_lun_ext_entry);
2325 if ((phys_lun_ext_entry->device_flags &
2326 CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) &&
2327 phys_lun_ext_entry->aio_handle) {
2328 device->aio_enabled = true;
2329 device->aio_handle =
2330 phys_lun_ext_entry->aio_handle;
2331 }
2332 } else {
2333 memcpy(device->volume_id, log_lun_ext_entry->volume_id,
2334 sizeof(device->volume_id));
2335 }
2336
2337 if (pqi_is_device_with_sas_address(device))
2338 device->sas_address = get_unaligned_be64(&device->wwid);
2339
2340 new_device_list[num_valid_devices++] = device;
2341 }
2342
2343 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices);
2344
2345 out:
2346 list_for_each_entry_safe(device, next, &new_device_list_head,
2347 new_device_list_entry) {
2348 if (device->keep_device)
2349 continue;
2350 list_del(&device->new_device_list_entry);
2351 pqi_free_device(device);
2352 }
2353
2354 kfree(new_device_list);
2355 kfree(physdev_list);
2356 kfree(logdev_list);
2357 kfree(id_phys);
2358
2359 return rc;
2360 }
2361
pqi_scan_scsi_devices(struct pqi_ctrl_info * ctrl_info)2362 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info)
2363 {
2364 int rc;
2365 int mutex_acquired;
2366
2367 if (pqi_ctrl_offline(ctrl_info))
2368 return -ENXIO;
2369
2370 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex);
2371
2372 if (!mutex_acquired) {
2373 if (pqi_ctrl_scan_blocked(ctrl_info))
2374 return -EBUSY;
2375 pqi_schedule_rescan_worker_delayed(ctrl_info);
2376 return -EINPROGRESS;
2377 }
2378
2379 rc = pqi_update_scsi_devices(ctrl_info);
2380 if (rc && !pqi_ctrl_scan_blocked(ctrl_info))
2381 pqi_schedule_rescan_worker_delayed(ctrl_info);
2382
2383 mutex_unlock(&ctrl_info->scan_mutex);
2384
2385 return rc;
2386 }
2387
pqi_scan_start(struct Scsi_Host * shost)2388 static void pqi_scan_start(struct Scsi_Host *shost)
2389 {
2390 struct pqi_ctrl_info *ctrl_info;
2391
2392 ctrl_info = shost_to_hba(shost);
2393
2394 pqi_scan_scsi_devices(ctrl_info);
2395 }
2396
2397 /* Returns TRUE if scan is finished. */
2398
pqi_scan_finished(struct Scsi_Host * shost,unsigned long elapsed_time)2399 static int pqi_scan_finished(struct Scsi_Host *shost,
2400 unsigned long elapsed_time)
2401 {
2402 struct pqi_ctrl_info *ctrl_info;
2403
2404 ctrl_info = shost_priv(shost);
2405
2406 return !mutex_is_locked(&ctrl_info->scan_mutex);
2407 }
2408
pqi_set_encryption_info(struct pqi_encryption_info * encryption_info,struct raid_map * raid_map,u64 first_block)2409 static inline void pqi_set_encryption_info(struct pqi_encryption_info *encryption_info,
2410 struct raid_map *raid_map, u64 first_block)
2411 {
2412 u32 volume_blk_size;
2413
2414 /*
2415 * Set the encryption tweak values based on logical block address.
2416 * If the block size is 512, the tweak value is equal to the LBA.
2417 * For other block sizes, tweak value is (LBA * block size) / 512.
2418 */
2419 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size);
2420 if (volume_blk_size != 512)
2421 first_block = (first_block * volume_blk_size) / 512;
2422
2423 encryption_info->data_encryption_key_index =
2424 get_unaligned_le16(&raid_map->data_encryption_key_index);
2425 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block);
2426 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block);
2427 }
2428
2429 /*
2430 * Attempt to perform RAID bypass mapping for a logical volume I/O.
2431 */
2432
pqi_aio_raid_level_supported(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev_raid_map_data * rmd)2433 static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info,
2434 struct pqi_scsi_dev_raid_map_data *rmd)
2435 {
2436 bool is_supported = true;
2437
2438 switch (rmd->raid_level) {
2439 case SA_RAID_0:
2440 break;
2441 case SA_RAID_1:
2442 if (rmd->is_write && (!ctrl_info->enable_r1_writes ||
2443 rmd->data_length > ctrl_info->max_write_raid_1_10_2drive))
2444 is_supported = false;
2445 break;
2446 case SA_RAID_TRIPLE:
2447 if (rmd->is_write && (!ctrl_info->enable_r1_writes ||
2448 rmd->data_length > ctrl_info->max_write_raid_1_10_3drive))
2449 is_supported = false;
2450 break;
2451 case SA_RAID_5:
2452 if (rmd->is_write && (!ctrl_info->enable_r5_writes ||
2453 rmd->data_length > ctrl_info->max_write_raid_5_6))
2454 is_supported = false;
2455 break;
2456 case SA_RAID_6:
2457 if (rmd->is_write && (!ctrl_info->enable_r6_writes ||
2458 rmd->data_length > ctrl_info->max_write_raid_5_6))
2459 is_supported = false;
2460 break;
2461 default:
2462 is_supported = false;
2463 break;
2464 }
2465
2466 return is_supported;
2467 }
2468
2469 #define PQI_RAID_BYPASS_INELIGIBLE 1
2470
pqi_get_aio_lba_and_block_count(struct scsi_cmnd * scmd,struct pqi_scsi_dev_raid_map_data * rmd)2471 static int pqi_get_aio_lba_and_block_count(struct scsi_cmnd *scmd,
2472 struct pqi_scsi_dev_raid_map_data *rmd)
2473 {
2474 /* Check for valid opcode, get LBA and block count. */
2475 switch (scmd->cmnd[0]) {
2476 case WRITE_6:
2477 rmd->is_write = true;
2478 fallthrough;
2479 case READ_6:
2480 rmd->first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) |
2481 (scmd->cmnd[2] << 8) | scmd->cmnd[3]);
2482 rmd->block_cnt = (u32)scmd->cmnd[4];
2483 if (rmd->block_cnt == 0)
2484 rmd->block_cnt = 256;
2485 break;
2486 case WRITE_10:
2487 rmd->is_write = true;
2488 fallthrough;
2489 case READ_10:
2490 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2491 rmd->block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]);
2492 break;
2493 case WRITE_12:
2494 rmd->is_write = true;
2495 fallthrough;
2496 case READ_12:
2497 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]);
2498 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[6]);
2499 break;
2500 case WRITE_16:
2501 rmd->is_write = true;
2502 fallthrough;
2503 case READ_16:
2504 rmd->first_block = get_unaligned_be64(&scmd->cmnd[2]);
2505 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[10]);
2506 break;
2507 default:
2508 /* Process via normal I/O path. */
2509 return PQI_RAID_BYPASS_INELIGIBLE;
2510 }
2511
2512 put_unaligned_le32(scsi_bufflen(scmd), &rmd->data_length);
2513
2514 return 0;
2515 }
2516
pci_get_aio_common_raid_map_values(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev_raid_map_data * rmd,struct raid_map * raid_map)2517 static int pci_get_aio_common_raid_map_values(struct pqi_ctrl_info *ctrl_info,
2518 struct pqi_scsi_dev_raid_map_data *rmd, struct raid_map *raid_map)
2519 {
2520 #if BITS_PER_LONG == 32
2521 u64 tmpdiv;
2522 #endif
2523
2524 rmd->last_block = rmd->first_block + rmd->block_cnt - 1;
2525
2526 /* Check for invalid block or wraparound. */
2527 if (rmd->last_block >=
2528 get_unaligned_le64(&raid_map->volume_blk_cnt) ||
2529 rmd->last_block < rmd->first_block)
2530 return PQI_RAID_BYPASS_INELIGIBLE;
2531
2532 rmd->data_disks_per_row =
2533 get_unaligned_le16(&raid_map->data_disks_per_row);
2534 rmd->strip_size = get_unaligned_le16(&raid_map->strip_size);
2535 rmd->layout_map_count = get_unaligned_le16(&raid_map->layout_map_count);
2536
2537 /* Calculate stripe information for the request. */
2538 rmd->blocks_per_row = rmd->data_disks_per_row * rmd->strip_size;
2539 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */
2540 return PQI_RAID_BYPASS_INELIGIBLE;
2541 #if BITS_PER_LONG == 32
2542 tmpdiv = rmd->first_block;
2543 do_div(tmpdiv, rmd->blocks_per_row);
2544 rmd->first_row = tmpdiv;
2545 tmpdiv = rmd->last_block;
2546 do_div(tmpdiv, rmd->blocks_per_row);
2547 rmd->last_row = tmpdiv;
2548 rmd->first_row_offset = (u32)(rmd->first_block - (rmd->first_row * rmd->blocks_per_row));
2549 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * rmd->blocks_per_row));
2550 tmpdiv = rmd->first_row_offset;
2551 do_div(tmpdiv, rmd->strip_size);
2552 rmd->first_column = tmpdiv;
2553 tmpdiv = rmd->last_row_offset;
2554 do_div(tmpdiv, rmd->strip_size);
2555 rmd->last_column = tmpdiv;
2556 #else
2557 rmd->first_row = rmd->first_block / rmd->blocks_per_row;
2558 rmd->last_row = rmd->last_block / rmd->blocks_per_row;
2559 rmd->first_row_offset = (u32)(rmd->first_block -
2560 (rmd->first_row * rmd->blocks_per_row));
2561 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row *
2562 rmd->blocks_per_row));
2563 rmd->first_column = rmd->first_row_offset / rmd->strip_size;
2564 rmd->last_column = rmd->last_row_offset / rmd->strip_size;
2565 #endif
2566
2567 /* If this isn't a single row/column then give to the controller. */
2568 if (rmd->first_row != rmd->last_row ||
2569 rmd->first_column != rmd->last_column)
2570 return PQI_RAID_BYPASS_INELIGIBLE;
2571
2572 /* Proceeding with driver mapping. */
2573 rmd->total_disks_per_row = rmd->data_disks_per_row +
2574 get_unaligned_le16(&raid_map->metadata_disks_per_row);
2575 rmd->map_row = ((u32)(rmd->first_row >>
2576 raid_map->parity_rotation_shift)) %
2577 get_unaligned_le16(&raid_map->row_cnt);
2578 rmd->map_index = (rmd->map_row * rmd->total_disks_per_row) +
2579 rmd->first_column;
2580
2581 return 0;
2582 }
2583
pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data * rmd,struct raid_map * raid_map)2584 static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd,
2585 struct raid_map *raid_map)
2586 {
2587 #if BITS_PER_LONG == 32
2588 u64 tmpdiv;
2589 #endif
2590
2591 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */
2592 return PQI_RAID_BYPASS_INELIGIBLE;
2593
2594 /* RAID 50/60 */
2595 /* Verify first and last block are in same RAID group. */
2596 rmd->stripesize = rmd->blocks_per_row * rmd->layout_map_count;
2597 #if BITS_PER_LONG == 32
2598 tmpdiv = rmd->first_block;
2599 rmd->first_group = do_div(tmpdiv, rmd->stripesize);
2600 tmpdiv = rmd->first_group;
2601 do_div(tmpdiv, rmd->blocks_per_row);
2602 rmd->first_group = tmpdiv;
2603 tmpdiv = rmd->last_block;
2604 rmd->last_group = do_div(tmpdiv, rmd->stripesize);
2605 tmpdiv = rmd->last_group;
2606 do_div(tmpdiv, rmd->blocks_per_row);
2607 rmd->last_group = tmpdiv;
2608 #else
2609 rmd->first_group = (rmd->first_block % rmd->stripesize) / rmd->blocks_per_row;
2610 rmd->last_group = (rmd->last_block % rmd->stripesize) / rmd->blocks_per_row;
2611 #endif
2612 if (rmd->first_group != rmd->last_group)
2613 return PQI_RAID_BYPASS_INELIGIBLE;
2614
2615 /* Verify request is in a single row of RAID 5/6. */
2616 #if BITS_PER_LONG == 32
2617 tmpdiv = rmd->first_block;
2618 do_div(tmpdiv, rmd->stripesize);
2619 rmd->first_row = tmpdiv;
2620 rmd->r5or6_first_row = tmpdiv;
2621 tmpdiv = rmd->last_block;
2622 do_div(tmpdiv, rmd->stripesize);
2623 rmd->r5or6_last_row = tmpdiv;
2624 #else
2625 rmd->first_row = rmd->r5or6_first_row =
2626 rmd->first_block / rmd->stripesize;
2627 rmd->r5or6_last_row = rmd->last_block / rmd->stripesize;
2628 #endif
2629 if (rmd->r5or6_first_row != rmd->r5or6_last_row)
2630 return PQI_RAID_BYPASS_INELIGIBLE;
2631
2632 /* Verify request is in a single column. */
2633 #if BITS_PER_LONG == 32
2634 tmpdiv = rmd->first_block;
2635 rmd->first_row_offset = do_div(tmpdiv, rmd->stripesize);
2636 tmpdiv = rmd->first_row_offset;
2637 rmd->first_row_offset = (u32)do_div(tmpdiv, rmd->blocks_per_row);
2638 rmd->r5or6_first_row_offset = rmd->first_row_offset;
2639 tmpdiv = rmd->last_block;
2640 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->stripesize);
2641 tmpdiv = rmd->r5or6_last_row_offset;
2642 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->blocks_per_row);
2643 tmpdiv = rmd->r5or6_first_row_offset;
2644 do_div(tmpdiv, rmd->strip_size);
2645 rmd->first_column = rmd->r5or6_first_column = tmpdiv;
2646 tmpdiv = rmd->r5or6_last_row_offset;
2647 do_div(tmpdiv, rmd->strip_size);
2648 rmd->r5or6_last_column = tmpdiv;
2649 #else
2650 rmd->first_row_offset = rmd->r5or6_first_row_offset =
2651 (u32)((rmd->first_block % rmd->stripesize) %
2652 rmd->blocks_per_row);
2653
2654 rmd->r5or6_last_row_offset =
2655 (u32)((rmd->last_block % rmd->stripesize) %
2656 rmd->blocks_per_row);
2657
2658 rmd->first_column =
2659 rmd->r5or6_first_row_offset / rmd->strip_size;
2660 rmd->r5or6_first_column = rmd->first_column;
2661 rmd->r5or6_last_column = rmd->r5or6_last_row_offset / rmd->strip_size;
2662 #endif
2663 if (rmd->r5or6_first_column != rmd->r5or6_last_column)
2664 return PQI_RAID_BYPASS_INELIGIBLE;
2665
2666 /* Request is eligible. */
2667 rmd->map_row =
2668 ((u32)(rmd->first_row >> raid_map->parity_rotation_shift)) %
2669 get_unaligned_le16(&raid_map->row_cnt);
2670
2671 rmd->map_index = (rmd->first_group *
2672 (get_unaligned_le16(&raid_map->row_cnt) *
2673 rmd->total_disks_per_row)) +
2674 (rmd->map_row * rmd->total_disks_per_row) + rmd->first_column;
2675
2676 if (rmd->is_write) {
2677 u32 index;
2678
2679 /*
2680 * p_parity_it_nexus and q_parity_it_nexus are pointers to the
2681 * parity entries inside the device's raid_map.
2682 *
2683 * A device's RAID map is bounded by: number of RAID disks squared.
2684 *
2685 * The devices RAID map size is checked during device
2686 * initialization.
2687 */
2688 index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row);
2689 index *= rmd->total_disks_per_row;
2690 index -= get_unaligned_le16(&raid_map->metadata_disks_per_row);
2691
2692 rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle;
2693 if (rmd->raid_level == SA_RAID_6) {
2694 rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle;
2695 rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1];
2696 }
2697 #if BITS_PER_LONG == 32
2698 tmpdiv = rmd->first_block;
2699 do_div(tmpdiv, rmd->blocks_per_row);
2700 rmd->row = tmpdiv;
2701 #else
2702 rmd->row = rmd->first_block / rmd->blocks_per_row;
2703 #endif
2704 }
2705
2706 return 0;
2707 }
2708
pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data * rmd)2709 static void pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data *rmd)
2710 {
2711 /* Build the new CDB for the physical disk I/O. */
2712 if (rmd->disk_block > 0xffffffff) {
2713 rmd->cdb[0] = rmd->is_write ? WRITE_16 : READ_16;
2714 rmd->cdb[1] = 0;
2715 put_unaligned_be64(rmd->disk_block, &rmd->cdb[2]);
2716 put_unaligned_be32(rmd->disk_block_cnt, &rmd->cdb[10]);
2717 rmd->cdb[14] = 0;
2718 rmd->cdb[15] = 0;
2719 rmd->cdb_length = 16;
2720 } else {
2721 rmd->cdb[0] = rmd->is_write ? WRITE_10 : READ_10;
2722 rmd->cdb[1] = 0;
2723 put_unaligned_be32((u32)rmd->disk_block, &rmd->cdb[2]);
2724 rmd->cdb[6] = 0;
2725 put_unaligned_be16((u16)rmd->disk_block_cnt, &rmd->cdb[7]);
2726 rmd->cdb[9] = 0;
2727 rmd->cdb_length = 10;
2728 }
2729 }
2730
pqi_calc_aio_r1_nexus(struct raid_map * raid_map,struct pqi_scsi_dev_raid_map_data * rmd)2731 static void pqi_calc_aio_r1_nexus(struct raid_map *raid_map,
2732 struct pqi_scsi_dev_raid_map_data *rmd)
2733 {
2734 u32 index;
2735 u32 group;
2736
2737 group = rmd->map_index / rmd->data_disks_per_row;
2738
2739 index = rmd->map_index - (group * rmd->data_disks_per_row);
2740 rmd->it_nexus[0] = raid_map->disk_data[index].aio_handle;
2741 index += rmd->data_disks_per_row;
2742 rmd->it_nexus[1] = raid_map->disk_data[index].aio_handle;
2743 if (rmd->layout_map_count > 2) {
2744 index += rmd->data_disks_per_row;
2745 rmd->it_nexus[2] = raid_map->disk_data[index].aio_handle;
2746 }
2747
2748 rmd->num_it_nexus_entries = rmd->layout_map_count;
2749 }
2750
pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)2751 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
2752 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
2753 struct pqi_queue_group *queue_group)
2754 {
2755 int rc;
2756 struct raid_map *raid_map;
2757 u32 group;
2758 u32 next_bypass_group;
2759 struct pqi_encryption_info *encryption_info_ptr;
2760 struct pqi_encryption_info encryption_info;
2761 struct pqi_scsi_dev_raid_map_data rmd = { 0 };
2762
2763 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd);
2764 if (rc)
2765 return PQI_RAID_BYPASS_INELIGIBLE;
2766
2767 rmd.raid_level = device->raid_level;
2768
2769 if (!pqi_aio_raid_level_supported(ctrl_info, &rmd))
2770 return PQI_RAID_BYPASS_INELIGIBLE;
2771
2772 if (unlikely(rmd.block_cnt == 0))
2773 return PQI_RAID_BYPASS_INELIGIBLE;
2774
2775 raid_map = device->raid_map;
2776
2777 rc = pci_get_aio_common_raid_map_values(ctrl_info, &rmd, raid_map);
2778 if (rc)
2779 return PQI_RAID_BYPASS_INELIGIBLE;
2780
2781 if (device->raid_level == SA_RAID_1 ||
2782 device->raid_level == SA_RAID_TRIPLE) {
2783 if (rmd.is_write) {
2784 pqi_calc_aio_r1_nexus(raid_map, &rmd);
2785 } else {
2786 group = device->next_bypass_group;
2787 next_bypass_group = group + 1;
2788 if (next_bypass_group >= rmd.layout_map_count)
2789 next_bypass_group = 0;
2790 device->next_bypass_group = next_bypass_group;
2791 rmd.map_index += group * rmd.data_disks_per_row;
2792 }
2793 } else if ((device->raid_level == SA_RAID_5 ||
2794 device->raid_level == SA_RAID_6) &&
2795 (rmd.layout_map_count > 1 || rmd.is_write)) {
2796 rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map);
2797 if (rc)
2798 return PQI_RAID_BYPASS_INELIGIBLE;
2799 }
2800
2801 if (unlikely(rmd.map_index >= RAID_MAP_MAX_ENTRIES))
2802 return PQI_RAID_BYPASS_INELIGIBLE;
2803
2804 rmd.aio_handle = raid_map->disk_data[rmd.map_index].aio_handle;
2805 rmd.disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) +
2806 rmd.first_row * rmd.strip_size +
2807 (rmd.first_row_offset - rmd.first_column * rmd.strip_size);
2808 rmd.disk_block_cnt = rmd.block_cnt;
2809
2810 /* Handle differing logical/physical block sizes. */
2811 if (raid_map->phys_blk_shift) {
2812 rmd.disk_block <<= raid_map->phys_blk_shift;
2813 rmd.disk_block_cnt <<= raid_map->phys_blk_shift;
2814 }
2815
2816 if (unlikely(rmd.disk_block_cnt > 0xffff))
2817 return PQI_RAID_BYPASS_INELIGIBLE;
2818
2819 pqi_set_aio_cdb(&rmd);
2820
2821 if (get_unaligned_le16(&raid_map->flags) & RAID_MAP_ENCRYPTION_ENABLED) {
2822 if (rmd.data_length > device->max_transfer_encrypted)
2823 return PQI_RAID_BYPASS_INELIGIBLE;
2824 pqi_set_encryption_info(&encryption_info, raid_map, rmd.first_block);
2825 encryption_info_ptr = &encryption_info;
2826 } else {
2827 encryption_info_ptr = NULL;
2828 }
2829
2830 if (rmd.is_write) {
2831 switch (device->raid_level) {
2832 case SA_RAID_1:
2833 case SA_RAID_TRIPLE:
2834 return pqi_aio_submit_r1_write_io(ctrl_info, scmd, queue_group,
2835 encryption_info_ptr, device, &rmd);
2836 case SA_RAID_5:
2837 case SA_RAID_6:
2838 return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group,
2839 encryption_info_ptr, device, &rmd);
2840 }
2841 }
2842
2843 return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle,
2844 rmd.cdb, rmd.cdb_length, queue_group,
2845 encryption_info_ptr, true);
2846 }
2847
2848 #define PQI_STATUS_IDLE 0x0
2849
2850 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1
2851 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2
2852
2853 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0
2854 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1
2855 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2
2856 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3
2857 #define PQI_DEVICE_STATE_ERROR 0x4
2858
2859 #define PQI_MODE_READY_TIMEOUT_SECS 30
2860 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1
2861
pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info * ctrl_info)2862 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info)
2863 {
2864 struct pqi_device_registers __iomem *pqi_registers;
2865 unsigned long timeout;
2866 u64 signature;
2867 u8 status;
2868
2869 pqi_registers = ctrl_info->pqi_registers;
2870 timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies;
2871
2872 while (1) {
2873 signature = readq(&pqi_registers->signature);
2874 if (memcmp(&signature, PQI_DEVICE_SIGNATURE,
2875 sizeof(signature)) == 0)
2876 break;
2877 if (time_after(jiffies, timeout)) {
2878 dev_err(&ctrl_info->pci_dev->dev,
2879 "timed out waiting for PQI signature\n");
2880 return -ETIMEDOUT;
2881 }
2882 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2883 }
2884
2885 while (1) {
2886 status = readb(&pqi_registers->function_and_status_code);
2887 if (status == PQI_STATUS_IDLE)
2888 break;
2889 if (time_after(jiffies, timeout)) {
2890 dev_err(&ctrl_info->pci_dev->dev,
2891 "timed out waiting for PQI IDLE\n");
2892 return -ETIMEDOUT;
2893 }
2894 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2895 }
2896
2897 while (1) {
2898 if (readl(&pqi_registers->device_status) ==
2899 PQI_DEVICE_STATE_ALL_REGISTERS_READY)
2900 break;
2901 if (time_after(jiffies, timeout)) {
2902 dev_err(&ctrl_info->pci_dev->dev,
2903 "timed out waiting for PQI all registers ready\n");
2904 return -ETIMEDOUT;
2905 }
2906 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS);
2907 }
2908
2909 return 0;
2910 }
2911
pqi_aio_path_disabled(struct pqi_io_request * io_request)2912 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request)
2913 {
2914 struct pqi_scsi_dev *device;
2915
2916 device = io_request->scmd->device->hostdata;
2917 device->raid_bypass_enabled = false;
2918 device->aio_enabled = false;
2919 }
2920
pqi_take_device_offline(struct scsi_device * sdev,char * path)2921 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path)
2922 {
2923 struct pqi_ctrl_info *ctrl_info;
2924 struct pqi_scsi_dev *device;
2925
2926 device = sdev->hostdata;
2927 if (device->device_offline)
2928 return;
2929
2930 device->device_offline = true;
2931 ctrl_info = shost_to_hba(sdev->host);
2932 pqi_schedule_rescan_worker(ctrl_info);
2933 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n",
2934 path, ctrl_info->scsi_host->host_no, device->bus,
2935 device->target, device->lun);
2936 }
2937
pqi_process_raid_io_error(struct pqi_io_request * io_request)2938 static void pqi_process_raid_io_error(struct pqi_io_request *io_request)
2939 {
2940 u8 scsi_status;
2941 u8 host_byte;
2942 struct scsi_cmnd *scmd;
2943 struct pqi_raid_error_info *error_info;
2944 size_t sense_data_length;
2945 int residual_count;
2946 int xfer_count;
2947 struct scsi_sense_hdr sshdr;
2948
2949 scmd = io_request->scmd;
2950 if (!scmd)
2951 return;
2952
2953 error_info = io_request->error_info;
2954 scsi_status = error_info->status;
2955 host_byte = DID_OK;
2956
2957 switch (error_info->data_out_result) {
2958 case PQI_DATA_IN_OUT_GOOD:
2959 break;
2960 case PQI_DATA_IN_OUT_UNDERFLOW:
2961 xfer_count =
2962 get_unaligned_le32(&error_info->data_out_transferred);
2963 residual_count = scsi_bufflen(scmd) - xfer_count;
2964 scsi_set_resid(scmd, residual_count);
2965 if (xfer_count < scmd->underflow)
2966 host_byte = DID_SOFT_ERROR;
2967 break;
2968 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
2969 case PQI_DATA_IN_OUT_ABORTED:
2970 host_byte = DID_ABORT;
2971 break;
2972 case PQI_DATA_IN_OUT_TIMEOUT:
2973 host_byte = DID_TIME_OUT;
2974 break;
2975 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
2976 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
2977 case PQI_DATA_IN_OUT_BUFFER_ERROR:
2978 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
2979 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
2980 case PQI_DATA_IN_OUT_ERROR:
2981 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
2982 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
2983 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
2984 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
2985 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
2986 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
2987 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
2988 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
2989 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
2990 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
2991 default:
2992 host_byte = DID_ERROR;
2993 break;
2994 }
2995
2996 sense_data_length = get_unaligned_le16(&error_info->sense_data_length);
2997 if (sense_data_length == 0)
2998 sense_data_length =
2999 get_unaligned_le16(&error_info->response_data_length);
3000 if (sense_data_length) {
3001 if (sense_data_length > sizeof(error_info->data))
3002 sense_data_length = sizeof(error_info->data);
3003
3004 if (scsi_status == SAM_STAT_CHECK_CONDITION &&
3005 scsi_normalize_sense(error_info->data,
3006 sense_data_length, &sshdr) &&
3007 sshdr.sense_key == HARDWARE_ERROR &&
3008 sshdr.asc == 0x3e) {
3009 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host);
3010 struct pqi_scsi_dev *device = scmd->device->hostdata;
3011
3012 switch (sshdr.ascq) {
3013 case 0x1: /* LOGICAL UNIT FAILURE */
3014 if (printk_ratelimit())
3015 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n",
3016 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
3017 pqi_take_device_offline(scmd->device, "RAID");
3018 host_byte = DID_NO_CONNECT;
3019 break;
3020
3021 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */
3022 if (printk_ratelimit())
3023 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n",
3024 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun);
3025 break;
3026 }
3027 }
3028
3029 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
3030 sense_data_length = SCSI_SENSE_BUFFERSIZE;
3031 memcpy(scmd->sense_buffer, error_info->data,
3032 sense_data_length);
3033 }
3034
3035 scmd->result = scsi_status;
3036 set_host_byte(scmd, host_byte);
3037 }
3038
pqi_process_aio_io_error(struct pqi_io_request * io_request)3039 static void pqi_process_aio_io_error(struct pqi_io_request *io_request)
3040 {
3041 u8 scsi_status;
3042 u8 host_byte;
3043 struct scsi_cmnd *scmd;
3044 struct pqi_aio_error_info *error_info;
3045 size_t sense_data_length;
3046 int residual_count;
3047 int xfer_count;
3048 bool device_offline;
3049
3050 scmd = io_request->scmd;
3051 error_info = io_request->error_info;
3052 host_byte = DID_OK;
3053 sense_data_length = 0;
3054 device_offline = false;
3055
3056 switch (error_info->service_response) {
3057 case PQI_AIO_SERV_RESPONSE_COMPLETE:
3058 scsi_status = error_info->status;
3059 break;
3060 case PQI_AIO_SERV_RESPONSE_FAILURE:
3061 switch (error_info->status) {
3062 case PQI_AIO_STATUS_IO_ABORTED:
3063 scsi_status = SAM_STAT_TASK_ABORTED;
3064 break;
3065 case PQI_AIO_STATUS_UNDERRUN:
3066 scsi_status = SAM_STAT_GOOD;
3067 residual_count = get_unaligned_le32(
3068 &error_info->residual_count);
3069 scsi_set_resid(scmd, residual_count);
3070 xfer_count = scsi_bufflen(scmd) - residual_count;
3071 if (xfer_count < scmd->underflow)
3072 host_byte = DID_SOFT_ERROR;
3073 break;
3074 case PQI_AIO_STATUS_OVERRUN:
3075 scsi_status = SAM_STAT_GOOD;
3076 break;
3077 case PQI_AIO_STATUS_AIO_PATH_DISABLED:
3078 pqi_aio_path_disabled(io_request);
3079 scsi_status = SAM_STAT_GOOD;
3080 io_request->status = -EAGAIN;
3081 break;
3082 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE:
3083 case PQI_AIO_STATUS_INVALID_DEVICE:
3084 if (!io_request->raid_bypass) {
3085 device_offline = true;
3086 pqi_take_device_offline(scmd->device, "AIO");
3087 host_byte = DID_NO_CONNECT;
3088 }
3089 scsi_status = SAM_STAT_CHECK_CONDITION;
3090 break;
3091 case PQI_AIO_STATUS_IO_ERROR:
3092 default:
3093 scsi_status = SAM_STAT_CHECK_CONDITION;
3094 break;
3095 }
3096 break;
3097 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE:
3098 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED:
3099 scsi_status = SAM_STAT_GOOD;
3100 break;
3101 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED:
3102 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN:
3103 default:
3104 scsi_status = SAM_STAT_CHECK_CONDITION;
3105 break;
3106 }
3107
3108 if (error_info->data_present) {
3109 sense_data_length =
3110 get_unaligned_le16(&error_info->data_length);
3111 if (sense_data_length) {
3112 if (sense_data_length > sizeof(error_info->data))
3113 sense_data_length = sizeof(error_info->data);
3114 if (sense_data_length > SCSI_SENSE_BUFFERSIZE)
3115 sense_data_length = SCSI_SENSE_BUFFERSIZE;
3116 memcpy(scmd->sense_buffer, error_info->data,
3117 sense_data_length);
3118 }
3119 }
3120
3121 if (device_offline && sense_data_length == 0)
3122 scsi_build_sense(scmd, 0, HARDWARE_ERROR, 0x3e, 0x1);
3123
3124 scmd->result = scsi_status;
3125 set_host_byte(scmd, host_byte);
3126 }
3127
pqi_process_io_error(unsigned int iu_type,struct pqi_io_request * io_request)3128 static void pqi_process_io_error(unsigned int iu_type,
3129 struct pqi_io_request *io_request)
3130 {
3131 switch (iu_type) {
3132 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
3133 pqi_process_raid_io_error(io_request);
3134 break;
3135 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
3136 pqi_process_aio_io_error(io_request);
3137 break;
3138 }
3139 }
3140
pqi_interpret_task_management_response(struct pqi_ctrl_info * ctrl_info,struct pqi_task_management_response * response)3141 static int pqi_interpret_task_management_response(struct pqi_ctrl_info *ctrl_info,
3142 struct pqi_task_management_response *response)
3143 {
3144 int rc;
3145
3146 switch (response->response_code) {
3147 case SOP_TMF_COMPLETE:
3148 case SOP_TMF_FUNCTION_SUCCEEDED:
3149 rc = 0;
3150 break;
3151 case SOP_TMF_REJECTED:
3152 rc = -EAGAIN;
3153 break;
3154 default:
3155 rc = -EIO;
3156 break;
3157 }
3158
3159 if (rc)
3160 dev_err(&ctrl_info->pci_dev->dev,
3161 "Task Management Function error: %d (response code: %u)\n", rc, response->response_code);
3162
3163 return rc;
3164 }
3165
pqi_invalid_response(struct pqi_ctrl_info * ctrl_info)3166 static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info)
3167 {
3168 pqi_take_ctrl_offline(ctrl_info);
3169 }
3170
pqi_process_io_intr(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group)3171 static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group)
3172 {
3173 int num_responses;
3174 pqi_index_t oq_pi;
3175 pqi_index_t oq_ci;
3176 struct pqi_io_request *io_request;
3177 struct pqi_io_response *response;
3178 u16 request_id;
3179
3180 num_responses = 0;
3181 oq_ci = queue_group->oq_ci_copy;
3182
3183 while (1) {
3184 oq_pi = readl(queue_group->oq_pi);
3185 if (oq_pi >= ctrl_info->num_elements_per_oq) {
3186 pqi_invalid_response(ctrl_info);
3187 dev_err(&ctrl_info->pci_dev->dev,
3188 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
3189 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci);
3190 return -1;
3191 }
3192 if (oq_pi == oq_ci)
3193 break;
3194
3195 num_responses++;
3196 response = queue_group->oq_element_array +
3197 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
3198
3199 request_id = get_unaligned_le16(&response->request_id);
3200 if (request_id >= ctrl_info->max_io_slots) {
3201 pqi_invalid_response(ctrl_info);
3202 dev_err(&ctrl_info->pci_dev->dev,
3203 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n",
3204 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci);
3205 return -1;
3206 }
3207
3208 io_request = &ctrl_info->io_request_pool[request_id];
3209 if (atomic_read(&io_request->refcount) == 0) {
3210 pqi_invalid_response(ctrl_info);
3211 dev_err(&ctrl_info->pci_dev->dev,
3212 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n",
3213 request_id, oq_pi, oq_ci);
3214 return -1;
3215 }
3216
3217 switch (response->header.iu_type) {
3218 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS:
3219 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS:
3220 if (io_request->scmd)
3221 io_request->scmd->result = 0;
3222 fallthrough;
3223 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT:
3224 break;
3225 case PQI_RESPONSE_IU_VENDOR_GENERAL:
3226 io_request->status =
3227 get_unaligned_le16(
3228 &((struct pqi_vendor_general_response *)response)->status);
3229 break;
3230 case PQI_RESPONSE_IU_TASK_MANAGEMENT:
3231 io_request->status = pqi_interpret_task_management_response(ctrl_info,
3232 (void *)response);
3233 break;
3234 case PQI_RESPONSE_IU_AIO_PATH_DISABLED:
3235 pqi_aio_path_disabled(io_request);
3236 io_request->status = -EAGAIN;
3237 break;
3238 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR:
3239 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR:
3240 io_request->error_info = ctrl_info->error_buffer +
3241 (get_unaligned_le16(&response->error_index) *
3242 PQI_ERROR_BUFFER_ELEMENT_LENGTH);
3243 pqi_process_io_error(response->header.iu_type, io_request);
3244 break;
3245 default:
3246 pqi_invalid_response(ctrl_info);
3247 dev_err(&ctrl_info->pci_dev->dev,
3248 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n",
3249 response->header.iu_type, oq_pi, oq_ci);
3250 return -1;
3251 }
3252
3253 io_request->io_complete_callback(io_request, io_request->context);
3254
3255 /*
3256 * Note that the I/O request structure CANNOT BE TOUCHED after
3257 * returning from the I/O completion callback!
3258 */
3259 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq;
3260 }
3261
3262 if (num_responses) {
3263 queue_group->oq_ci_copy = oq_ci;
3264 writel(oq_ci, queue_group->oq_ci);
3265 }
3266
3267 return num_responses;
3268 }
3269
pqi_num_elements_free(unsigned int pi,unsigned int ci,unsigned int elements_in_queue)3270 static inline unsigned int pqi_num_elements_free(unsigned int pi,
3271 unsigned int ci, unsigned int elements_in_queue)
3272 {
3273 unsigned int num_elements_used;
3274
3275 if (pi >= ci)
3276 num_elements_used = pi - ci;
3277 else
3278 num_elements_used = elements_in_queue - ci + pi;
3279
3280 return elements_in_queue - num_elements_used - 1;
3281 }
3282
pqi_send_event_ack(struct pqi_ctrl_info * ctrl_info,struct pqi_event_acknowledge_request * iu,size_t iu_length)3283 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info,
3284 struct pqi_event_acknowledge_request *iu, size_t iu_length)
3285 {
3286 pqi_index_t iq_pi;
3287 pqi_index_t iq_ci;
3288 unsigned long flags;
3289 void *next_element;
3290 struct pqi_queue_group *queue_group;
3291
3292 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP];
3293 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id);
3294
3295 while (1) {
3296 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags);
3297
3298 iq_pi = queue_group->iq_pi_copy[RAID_PATH];
3299 iq_ci = readl(queue_group->iq_ci[RAID_PATH]);
3300
3301 if (pqi_num_elements_free(iq_pi, iq_ci,
3302 ctrl_info->num_elements_per_iq))
3303 break;
3304
3305 spin_unlock_irqrestore(
3306 &queue_group->submit_lock[RAID_PATH], flags);
3307
3308 if (pqi_ctrl_offline(ctrl_info))
3309 return;
3310 }
3311
3312 next_element = queue_group->iq_element_array[RAID_PATH] +
3313 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
3314
3315 memcpy(next_element, iu, iu_length);
3316
3317 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq;
3318 queue_group->iq_pi_copy[RAID_PATH] = iq_pi;
3319
3320 /*
3321 * This write notifies the controller that an IU is available to be
3322 * processed.
3323 */
3324 writel(iq_pi, queue_group->iq_pi[RAID_PATH]);
3325
3326 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags);
3327 }
3328
pqi_acknowledge_event(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event)3329 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info,
3330 struct pqi_event *event)
3331 {
3332 struct pqi_event_acknowledge_request request;
3333
3334 memset(&request, 0, sizeof(request));
3335
3336 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT;
3337 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
3338 &request.header.iu_length);
3339 request.event_type = event->event_type;
3340 put_unaligned_le16(event->event_id, &request.event_id);
3341 put_unaligned_le32(event->additional_event_id, &request.additional_event_id);
3342
3343 pqi_send_event_ack(ctrl_info, &request, sizeof(request));
3344 }
3345
3346 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30
3347 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1
3348
pqi_poll_for_soft_reset_status(struct pqi_ctrl_info * ctrl_info)3349 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status(
3350 struct pqi_ctrl_info *ctrl_info)
3351 {
3352 u8 status;
3353 unsigned long timeout;
3354
3355 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies;
3356
3357 while (1) {
3358 status = pqi_read_soft_reset_status(ctrl_info);
3359 if (status & PQI_SOFT_RESET_INITIATE)
3360 return RESET_INITIATE_DRIVER;
3361
3362 if (status & PQI_SOFT_RESET_ABORT)
3363 return RESET_ABORT;
3364
3365 if (!sis_is_firmware_running(ctrl_info))
3366 return RESET_NORESPONSE;
3367
3368 if (time_after(jiffies, timeout)) {
3369 dev_warn(&ctrl_info->pci_dev->dev,
3370 "timed out waiting for soft reset status\n");
3371 return RESET_TIMEDOUT;
3372 }
3373
3374 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS);
3375 }
3376 }
3377
pqi_process_soft_reset(struct pqi_ctrl_info * ctrl_info)3378 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info)
3379 {
3380 int rc;
3381 unsigned int delay_secs;
3382 enum pqi_soft_reset_status reset_status;
3383
3384 if (ctrl_info->soft_reset_handshake_supported)
3385 reset_status = pqi_poll_for_soft_reset_status(ctrl_info);
3386 else
3387 reset_status = RESET_INITIATE_FIRMWARE;
3388
3389 delay_secs = PQI_POST_RESET_DELAY_SECS;
3390
3391 switch (reset_status) {
3392 case RESET_TIMEDOUT:
3393 delay_secs = PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS;
3394 fallthrough;
3395 case RESET_INITIATE_DRIVER:
3396 dev_info(&ctrl_info->pci_dev->dev,
3397 "Online Firmware Activation: resetting controller\n");
3398 sis_soft_reset(ctrl_info);
3399 fallthrough;
3400 case RESET_INITIATE_FIRMWARE:
3401 ctrl_info->pqi_mode_enabled = false;
3402 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
3403 rc = pqi_ofa_ctrl_restart(ctrl_info, delay_secs);
3404 pqi_ofa_free_host_buffer(ctrl_info);
3405 pqi_ctrl_ofa_done(ctrl_info);
3406 dev_info(&ctrl_info->pci_dev->dev,
3407 "Online Firmware Activation: %s\n",
3408 rc == 0 ? "SUCCESS" : "FAILED");
3409 break;
3410 case RESET_ABORT:
3411 dev_info(&ctrl_info->pci_dev->dev,
3412 "Online Firmware Activation ABORTED\n");
3413 if (ctrl_info->soft_reset_handshake_supported)
3414 pqi_clear_soft_reset_status(ctrl_info);
3415 pqi_ofa_free_host_buffer(ctrl_info);
3416 pqi_ctrl_ofa_done(ctrl_info);
3417 pqi_ofa_ctrl_unquiesce(ctrl_info);
3418 break;
3419 case RESET_NORESPONSE:
3420 fallthrough;
3421 default:
3422 dev_err(&ctrl_info->pci_dev->dev,
3423 "unexpected Online Firmware Activation reset status: 0x%x\n",
3424 reset_status);
3425 pqi_ofa_free_host_buffer(ctrl_info);
3426 pqi_ctrl_ofa_done(ctrl_info);
3427 pqi_ofa_ctrl_unquiesce(ctrl_info);
3428 pqi_take_ctrl_offline(ctrl_info);
3429 break;
3430 }
3431 }
3432
pqi_ofa_memory_alloc_worker(struct work_struct * work)3433 static void pqi_ofa_memory_alloc_worker(struct work_struct *work)
3434 {
3435 struct pqi_ctrl_info *ctrl_info;
3436
3437 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_memory_alloc_work);
3438
3439 pqi_ctrl_ofa_start(ctrl_info);
3440 pqi_ofa_setup_host_buffer(ctrl_info);
3441 pqi_ofa_host_memory_update(ctrl_info);
3442 }
3443
pqi_ofa_quiesce_worker(struct work_struct * work)3444 static void pqi_ofa_quiesce_worker(struct work_struct *work)
3445 {
3446 struct pqi_ctrl_info *ctrl_info;
3447 struct pqi_event *event;
3448
3449 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_quiesce_work);
3450
3451 event = &ctrl_info->events[pqi_event_type_to_event_index(PQI_EVENT_TYPE_OFA)];
3452
3453 pqi_ofa_ctrl_quiesce(ctrl_info);
3454 pqi_acknowledge_event(ctrl_info, event);
3455 pqi_process_soft_reset(ctrl_info);
3456 }
3457
pqi_ofa_process_event(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event)3458 static bool pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info,
3459 struct pqi_event *event)
3460 {
3461 bool ack_event;
3462
3463 ack_event = true;
3464
3465 switch (event->event_id) {
3466 case PQI_EVENT_OFA_MEMORY_ALLOCATION:
3467 dev_info(&ctrl_info->pci_dev->dev,
3468 "received Online Firmware Activation memory allocation request\n");
3469 schedule_work(&ctrl_info->ofa_memory_alloc_work);
3470 break;
3471 case PQI_EVENT_OFA_QUIESCE:
3472 dev_info(&ctrl_info->pci_dev->dev,
3473 "received Online Firmware Activation quiesce request\n");
3474 schedule_work(&ctrl_info->ofa_quiesce_work);
3475 ack_event = false;
3476 break;
3477 case PQI_EVENT_OFA_CANCELED:
3478 dev_info(&ctrl_info->pci_dev->dev,
3479 "received Online Firmware Activation cancel request: reason: %u\n",
3480 ctrl_info->ofa_cancel_reason);
3481 pqi_ofa_free_host_buffer(ctrl_info);
3482 pqi_ctrl_ofa_done(ctrl_info);
3483 break;
3484 default:
3485 dev_err(&ctrl_info->pci_dev->dev,
3486 "received unknown Online Firmware Activation request: event ID: %u\n",
3487 event->event_id);
3488 break;
3489 }
3490
3491 return ack_event;
3492 }
3493
pqi_event_worker(struct work_struct * work)3494 static void pqi_event_worker(struct work_struct *work)
3495 {
3496 unsigned int i;
3497 bool rescan_needed;
3498 struct pqi_ctrl_info *ctrl_info;
3499 struct pqi_event *event;
3500 bool ack_event;
3501
3502 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work);
3503
3504 pqi_ctrl_busy(ctrl_info);
3505 pqi_wait_if_ctrl_blocked(ctrl_info);
3506 if (pqi_ctrl_offline(ctrl_info))
3507 goto out;
3508
3509 rescan_needed = false;
3510 event = ctrl_info->events;
3511 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) {
3512 if (event->pending) {
3513 event->pending = false;
3514 if (event->event_type == PQI_EVENT_TYPE_OFA) {
3515 ack_event = pqi_ofa_process_event(ctrl_info, event);
3516 } else {
3517 ack_event = true;
3518 rescan_needed = true;
3519 }
3520 if (ack_event)
3521 pqi_acknowledge_event(ctrl_info, event);
3522 }
3523 event++;
3524 }
3525
3526 if (rescan_needed)
3527 pqi_schedule_rescan_worker_delayed(ctrl_info);
3528
3529 out:
3530 pqi_ctrl_unbusy(ctrl_info);
3531 }
3532
3533 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * PQI_HZ)
3534
pqi_heartbeat_timer_handler(struct timer_list * t)3535 static void pqi_heartbeat_timer_handler(struct timer_list *t)
3536 {
3537 int num_interrupts;
3538 u32 heartbeat_count;
3539 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, heartbeat_timer);
3540
3541 pqi_check_ctrl_health(ctrl_info);
3542 if (pqi_ctrl_offline(ctrl_info))
3543 return;
3544
3545 num_interrupts = atomic_read(&ctrl_info->num_interrupts);
3546 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info);
3547
3548 if (num_interrupts == ctrl_info->previous_num_interrupts) {
3549 if (heartbeat_count == ctrl_info->previous_heartbeat_count) {
3550 dev_err(&ctrl_info->pci_dev->dev,
3551 "no heartbeat detected - last heartbeat count: %u\n",
3552 heartbeat_count);
3553 pqi_take_ctrl_offline(ctrl_info);
3554 return;
3555 }
3556 } else {
3557 ctrl_info->previous_num_interrupts = num_interrupts;
3558 }
3559
3560 ctrl_info->previous_heartbeat_count = heartbeat_count;
3561 mod_timer(&ctrl_info->heartbeat_timer,
3562 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL);
3563 }
3564
pqi_start_heartbeat_timer(struct pqi_ctrl_info * ctrl_info)3565 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3566 {
3567 if (!ctrl_info->heartbeat_counter)
3568 return;
3569
3570 ctrl_info->previous_num_interrupts =
3571 atomic_read(&ctrl_info->num_interrupts);
3572 ctrl_info->previous_heartbeat_count =
3573 pqi_read_heartbeat_counter(ctrl_info);
3574
3575 ctrl_info->heartbeat_timer.expires =
3576 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL;
3577 add_timer(&ctrl_info->heartbeat_timer);
3578 }
3579
pqi_stop_heartbeat_timer(struct pqi_ctrl_info * ctrl_info)3580 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info)
3581 {
3582 del_timer_sync(&ctrl_info->heartbeat_timer);
3583 }
3584
pqi_ofa_capture_event_payload(struct pqi_ctrl_info * ctrl_info,struct pqi_event * event,struct pqi_event_response * response)3585 static void pqi_ofa_capture_event_payload(struct pqi_ctrl_info *ctrl_info,
3586 struct pqi_event *event, struct pqi_event_response *response)
3587 {
3588 switch (event->event_id) {
3589 case PQI_EVENT_OFA_MEMORY_ALLOCATION:
3590 ctrl_info->ofa_bytes_requested =
3591 get_unaligned_le32(&response->data.ofa_memory_allocation.bytes_requested);
3592 break;
3593 case PQI_EVENT_OFA_CANCELED:
3594 ctrl_info->ofa_cancel_reason =
3595 get_unaligned_le16(&response->data.ofa_cancelled.reason);
3596 break;
3597 }
3598 }
3599
pqi_process_event_intr(struct pqi_ctrl_info * ctrl_info)3600 static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info)
3601 {
3602 int num_events;
3603 pqi_index_t oq_pi;
3604 pqi_index_t oq_ci;
3605 struct pqi_event_queue *event_queue;
3606 struct pqi_event_response *response;
3607 struct pqi_event *event;
3608 int event_index;
3609
3610 event_queue = &ctrl_info->event_queue;
3611 num_events = 0;
3612 oq_ci = event_queue->oq_ci_copy;
3613
3614 while (1) {
3615 oq_pi = readl(event_queue->oq_pi);
3616 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) {
3617 pqi_invalid_response(ctrl_info);
3618 dev_err(&ctrl_info->pci_dev->dev,
3619 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n",
3620 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci);
3621 return -1;
3622 }
3623
3624 if (oq_pi == oq_ci)
3625 break;
3626
3627 num_events++;
3628 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH);
3629
3630 event_index = pqi_event_type_to_event_index(response->event_type);
3631
3632 if (event_index >= 0 && response->request_acknowledge) {
3633 event = &ctrl_info->events[event_index];
3634 event->pending = true;
3635 event->event_type = response->event_type;
3636 event->event_id = get_unaligned_le16(&response->event_id);
3637 event->additional_event_id =
3638 get_unaligned_le32(&response->additional_event_id);
3639 if (event->event_type == PQI_EVENT_TYPE_OFA)
3640 pqi_ofa_capture_event_payload(ctrl_info, event, response);
3641 }
3642
3643 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS;
3644 }
3645
3646 if (num_events) {
3647 event_queue->oq_ci_copy = oq_ci;
3648 writel(oq_ci, event_queue->oq_ci);
3649 schedule_work(&ctrl_info->event_work);
3650 }
3651
3652 return num_events;
3653 }
3654
3655 #define PQI_LEGACY_INTX_MASK 0x1
3656
pqi_configure_legacy_intx(struct pqi_ctrl_info * ctrl_info,bool enable_intx)3657 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, bool enable_intx)
3658 {
3659 u32 intx_mask;
3660 struct pqi_device_registers __iomem *pqi_registers;
3661 volatile void __iomem *register_addr;
3662
3663 pqi_registers = ctrl_info->pqi_registers;
3664
3665 if (enable_intx)
3666 register_addr = &pqi_registers->legacy_intx_mask_clear;
3667 else
3668 register_addr = &pqi_registers->legacy_intx_mask_set;
3669
3670 intx_mask = readl(register_addr);
3671 intx_mask |= PQI_LEGACY_INTX_MASK;
3672 writel(intx_mask, register_addr);
3673 }
3674
pqi_change_irq_mode(struct pqi_ctrl_info * ctrl_info,enum pqi_irq_mode new_mode)3675 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info,
3676 enum pqi_irq_mode new_mode)
3677 {
3678 switch (ctrl_info->irq_mode) {
3679 case IRQ_MODE_MSIX:
3680 switch (new_mode) {
3681 case IRQ_MODE_MSIX:
3682 break;
3683 case IRQ_MODE_INTX:
3684 pqi_configure_legacy_intx(ctrl_info, true);
3685 sis_enable_intx(ctrl_info);
3686 break;
3687 case IRQ_MODE_NONE:
3688 break;
3689 }
3690 break;
3691 case IRQ_MODE_INTX:
3692 switch (new_mode) {
3693 case IRQ_MODE_MSIX:
3694 pqi_configure_legacy_intx(ctrl_info, false);
3695 sis_enable_msix(ctrl_info);
3696 break;
3697 case IRQ_MODE_INTX:
3698 break;
3699 case IRQ_MODE_NONE:
3700 pqi_configure_legacy_intx(ctrl_info, false);
3701 break;
3702 }
3703 break;
3704 case IRQ_MODE_NONE:
3705 switch (new_mode) {
3706 case IRQ_MODE_MSIX:
3707 sis_enable_msix(ctrl_info);
3708 break;
3709 case IRQ_MODE_INTX:
3710 pqi_configure_legacy_intx(ctrl_info, true);
3711 sis_enable_intx(ctrl_info);
3712 break;
3713 case IRQ_MODE_NONE:
3714 break;
3715 }
3716 break;
3717 }
3718
3719 ctrl_info->irq_mode = new_mode;
3720 }
3721
3722 #define PQI_LEGACY_INTX_PENDING 0x1
3723
pqi_is_valid_irq(struct pqi_ctrl_info * ctrl_info)3724 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info)
3725 {
3726 bool valid_irq;
3727 u32 intx_status;
3728
3729 switch (ctrl_info->irq_mode) {
3730 case IRQ_MODE_MSIX:
3731 valid_irq = true;
3732 break;
3733 case IRQ_MODE_INTX:
3734 intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status);
3735 if (intx_status & PQI_LEGACY_INTX_PENDING)
3736 valid_irq = true;
3737 else
3738 valid_irq = false;
3739 break;
3740 case IRQ_MODE_NONE:
3741 default:
3742 valid_irq = false;
3743 break;
3744 }
3745
3746 return valid_irq;
3747 }
3748
pqi_irq_handler(int irq,void * data)3749 static irqreturn_t pqi_irq_handler(int irq, void *data)
3750 {
3751 struct pqi_ctrl_info *ctrl_info;
3752 struct pqi_queue_group *queue_group;
3753 int num_io_responses_handled;
3754 int num_events_handled;
3755
3756 queue_group = data;
3757 ctrl_info = queue_group->ctrl_info;
3758
3759 if (!pqi_is_valid_irq(ctrl_info))
3760 return IRQ_NONE;
3761
3762 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group);
3763 if (num_io_responses_handled < 0)
3764 goto out;
3765
3766 if (irq == ctrl_info->event_irq) {
3767 num_events_handled = pqi_process_event_intr(ctrl_info);
3768 if (num_events_handled < 0)
3769 goto out;
3770 } else {
3771 num_events_handled = 0;
3772 }
3773
3774 if (num_io_responses_handled + num_events_handled > 0)
3775 atomic_inc(&ctrl_info->num_interrupts);
3776
3777 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL);
3778 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL);
3779
3780 out:
3781 return IRQ_HANDLED;
3782 }
3783
pqi_request_irqs(struct pqi_ctrl_info * ctrl_info)3784 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info)
3785 {
3786 struct pci_dev *pci_dev = ctrl_info->pci_dev;
3787 int i;
3788 int rc;
3789
3790 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0);
3791
3792 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) {
3793 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0,
3794 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]);
3795 if (rc) {
3796 dev_err(&pci_dev->dev,
3797 "irq %u init failed with error %d\n",
3798 pci_irq_vector(pci_dev, i), rc);
3799 return rc;
3800 }
3801 ctrl_info->num_msix_vectors_initialized++;
3802 }
3803
3804 return 0;
3805 }
3806
pqi_free_irqs(struct pqi_ctrl_info * ctrl_info)3807 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info)
3808 {
3809 int i;
3810
3811 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++)
3812 free_irq(pci_irq_vector(ctrl_info->pci_dev, i),
3813 &ctrl_info->queue_groups[i]);
3814
3815 ctrl_info->num_msix_vectors_initialized = 0;
3816 }
3817
pqi_enable_msix_interrupts(struct pqi_ctrl_info * ctrl_info)3818 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3819 {
3820 int num_vectors_enabled;
3821
3822 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev,
3823 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups,
3824 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY);
3825 if (num_vectors_enabled < 0) {
3826 dev_err(&ctrl_info->pci_dev->dev,
3827 "MSI-X init failed with error %d\n",
3828 num_vectors_enabled);
3829 return num_vectors_enabled;
3830 }
3831
3832 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled;
3833 ctrl_info->irq_mode = IRQ_MODE_MSIX;
3834 return 0;
3835 }
3836
pqi_disable_msix_interrupts(struct pqi_ctrl_info * ctrl_info)3837 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info)
3838 {
3839 if (ctrl_info->num_msix_vectors_enabled) {
3840 pci_free_irq_vectors(ctrl_info->pci_dev);
3841 ctrl_info->num_msix_vectors_enabled = 0;
3842 }
3843 }
3844
pqi_alloc_operational_queues(struct pqi_ctrl_info * ctrl_info)3845 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info)
3846 {
3847 unsigned int i;
3848 size_t alloc_length;
3849 size_t element_array_length_per_iq;
3850 size_t element_array_length_per_oq;
3851 void *element_array;
3852 void __iomem *next_queue_index;
3853 void *aligned_pointer;
3854 unsigned int num_inbound_queues;
3855 unsigned int num_outbound_queues;
3856 unsigned int num_queue_indexes;
3857 struct pqi_queue_group *queue_group;
3858
3859 element_array_length_per_iq =
3860 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH *
3861 ctrl_info->num_elements_per_iq;
3862 element_array_length_per_oq =
3863 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH *
3864 ctrl_info->num_elements_per_oq;
3865 num_inbound_queues = ctrl_info->num_queue_groups * 2;
3866 num_outbound_queues = ctrl_info->num_queue_groups;
3867 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1;
3868
3869 aligned_pointer = NULL;
3870
3871 for (i = 0; i < num_inbound_queues; i++) {
3872 aligned_pointer = PTR_ALIGN(aligned_pointer,
3873 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3874 aligned_pointer += element_array_length_per_iq;
3875 }
3876
3877 for (i = 0; i < num_outbound_queues; i++) {
3878 aligned_pointer = PTR_ALIGN(aligned_pointer,
3879 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3880 aligned_pointer += element_array_length_per_oq;
3881 }
3882
3883 aligned_pointer = PTR_ALIGN(aligned_pointer,
3884 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3885 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3886 PQI_EVENT_OQ_ELEMENT_LENGTH;
3887
3888 for (i = 0; i < num_queue_indexes; i++) {
3889 aligned_pointer = PTR_ALIGN(aligned_pointer,
3890 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3891 aligned_pointer += sizeof(pqi_index_t);
3892 }
3893
3894 alloc_length = (size_t)aligned_pointer +
3895 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
3896
3897 alloc_length += PQI_EXTRA_SGL_MEMORY;
3898
3899 ctrl_info->queue_memory_base =
3900 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
3901 &ctrl_info->queue_memory_base_dma_handle,
3902 GFP_KERNEL);
3903
3904 if (!ctrl_info->queue_memory_base)
3905 return -ENOMEM;
3906
3907 ctrl_info->queue_memory_length = alloc_length;
3908
3909 element_array = PTR_ALIGN(ctrl_info->queue_memory_base,
3910 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3911
3912 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3913 queue_group = &ctrl_info->queue_groups[i];
3914 queue_group->iq_element_array[RAID_PATH] = element_array;
3915 queue_group->iq_element_array_bus_addr[RAID_PATH] =
3916 ctrl_info->queue_memory_base_dma_handle +
3917 (element_array - ctrl_info->queue_memory_base);
3918 element_array += element_array_length_per_iq;
3919 element_array = PTR_ALIGN(element_array,
3920 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3921 queue_group->iq_element_array[AIO_PATH] = element_array;
3922 queue_group->iq_element_array_bus_addr[AIO_PATH] =
3923 ctrl_info->queue_memory_base_dma_handle +
3924 (element_array - ctrl_info->queue_memory_base);
3925 element_array += element_array_length_per_iq;
3926 element_array = PTR_ALIGN(element_array,
3927 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3928 }
3929
3930 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3931 queue_group = &ctrl_info->queue_groups[i];
3932 queue_group->oq_element_array = element_array;
3933 queue_group->oq_element_array_bus_addr =
3934 ctrl_info->queue_memory_base_dma_handle +
3935 (element_array - ctrl_info->queue_memory_base);
3936 element_array += element_array_length_per_oq;
3937 element_array = PTR_ALIGN(element_array,
3938 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
3939 }
3940
3941 ctrl_info->event_queue.oq_element_array = element_array;
3942 ctrl_info->event_queue.oq_element_array_bus_addr =
3943 ctrl_info->queue_memory_base_dma_handle +
3944 (element_array - ctrl_info->queue_memory_base);
3945 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS *
3946 PQI_EVENT_OQ_ELEMENT_LENGTH;
3947
3948 next_queue_index = (void __iomem *)PTR_ALIGN(element_array,
3949 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3950
3951 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
3952 queue_group = &ctrl_info->queue_groups[i];
3953 queue_group->iq_ci[RAID_PATH] = next_queue_index;
3954 queue_group->iq_ci_bus_addr[RAID_PATH] =
3955 ctrl_info->queue_memory_base_dma_handle +
3956 (next_queue_index -
3957 (void __iomem *)ctrl_info->queue_memory_base);
3958 next_queue_index += sizeof(pqi_index_t);
3959 next_queue_index = PTR_ALIGN(next_queue_index,
3960 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3961 queue_group->iq_ci[AIO_PATH] = next_queue_index;
3962 queue_group->iq_ci_bus_addr[AIO_PATH] =
3963 ctrl_info->queue_memory_base_dma_handle +
3964 (next_queue_index -
3965 (void __iomem *)ctrl_info->queue_memory_base);
3966 next_queue_index += sizeof(pqi_index_t);
3967 next_queue_index = PTR_ALIGN(next_queue_index,
3968 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3969 queue_group->oq_pi = next_queue_index;
3970 queue_group->oq_pi_bus_addr =
3971 ctrl_info->queue_memory_base_dma_handle +
3972 (next_queue_index -
3973 (void __iomem *)ctrl_info->queue_memory_base);
3974 next_queue_index += sizeof(pqi_index_t);
3975 next_queue_index = PTR_ALIGN(next_queue_index,
3976 PQI_OPERATIONAL_INDEX_ALIGNMENT);
3977 }
3978
3979 ctrl_info->event_queue.oq_pi = next_queue_index;
3980 ctrl_info->event_queue.oq_pi_bus_addr =
3981 ctrl_info->queue_memory_base_dma_handle +
3982 (next_queue_index -
3983 (void __iomem *)ctrl_info->queue_memory_base);
3984
3985 return 0;
3986 }
3987
pqi_init_operational_queues(struct pqi_ctrl_info * ctrl_info)3988 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info)
3989 {
3990 unsigned int i;
3991 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3992 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID;
3993
3994 /*
3995 * Initialize the backpointers to the controller structure in
3996 * each operational queue group structure.
3997 */
3998 for (i = 0; i < ctrl_info->num_queue_groups; i++)
3999 ctrl_info->queue_groups[i].ctrl_info = ctrl_info;
4000
4001 /*
4002 * Assign IDs to all operational queues. Note that the IDs
4003 * assigned to operational IQs are independent of the IDs
4004 * assigned to operational OQs.
4005 */
4006 ctrl_info->event_queue.oq_id = next_oq_id++;
4007 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4008 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++;
4009 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++;
4010 ctrl_info->queue_groups[i].oq_id = next_oq_id++;
4011 }
4012
4013 /*
4014 * Assign MSI-X table entry indexes to all queues. Note that the
4015 * interrupt for the event queue is shared with the first queue group.
4016 */
4017 ctrl_info->event_queue.int_msg_num = 0;
4018 for (i = 0; i < ctrl_info->num_queue_groups; i++)
4019 ctrl_info->queue_groups[i].int_msg_num = i;
4020
4021 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4022 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]);
4023 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]);
4024 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]);
4025 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]);
4026 }
4027 }
4028
pqi_alloc_admin_queues(struct pqi_ctrl_info * ctrl_info)4029 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info)
4030 {
4031 size_t alloc_length;
4032 struct pqi_admin_queues_aligned *admin_queues_aligned;
4033 struct pqi_admin_queues *admin_queues;
4034
4035 alloc_length = sizeof(struct pqi_admin_queues_aligned) +
4036 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT;
4037
4038 ctrl_info->admin_queue_memory_base =
4039 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length,
4040 &ctrl_info->admin_queue_memory_base_dma_handle,
4041 GFP_KERNEL);
4042
4043 if (!ctrl_info->admin_queue_memory_base)
4044 return -ENOMEM;
4045
4046 ctrl_info->admin_queue_memory_length = alloc_length;
4047
4048 admin_queues = &ctrl_info->admin_queues;
4049 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base,
4050 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT);
4051 admin_queues->iq_element_array =
4052 &admin_queues_aligned->iq_element_array;
4053 admin_queues->oq_element_array =
4054 &admin_queues_aligned->oq_element_array;
4055 admin_queues->iq_ci =
4056 (pqi_index_t __iomem *)&admin_queues_aligned->iq_ci;
4057 admin_queues->oq_pi =
4058 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi;
4059
4060 admin_queues->iq_element_array_bus_addr =
4061 ctrl_info->admin_queue_memory_base_dma_handle +
4062 (admin_queues->iq_element_array -
4063 ctrl_info->admin_queue_memory_base);
4064 admin_queues->oq_element_array_bus_addr =
4065 ctrl_info->admin_queue_memory_base_dma_handle +
4066 (admin_queues->oq_element_array -
4067 ctrl_info->admin_queue_memory_base);
4068 admin_queues->iq_ci_bus_addr =
4069 ctrl_info->admin_queue_memory_base_dma_handle +
4070 ((void __iomem *)admin_queues->iq_ci -
4071 (void __iomem *)ctrl_info->admin_queue_memory_base);
4072 admin_queues->oq_pi_bus_addr =
4073 ctrl_info->admin_queue_memory_base_dma_handle +
4074 ((void __iomem *)admin_queues->oq_pi -
4075 (void __iomem *)ctrl_info->admin_queue_memory_base);
4076
4077 return 0;
4078 }
4079
4080 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES PQI_HZ
4081 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1
4082
pqi_create_admin_queues(struct pqi_ctrl_info * ctrl_info)4083 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info)
4084 {
4085 struct pqi_device_registers __iomem *pqi_registers;
4086 struct pqi_admin_queues *admin_queues;
4087 unsigned long timeout;
4088 u8 status;
4089 u32 reg;
4090
4091 pqi_registers = ctrl_info->pqi_registers;
4092 admin_queues = &ctrl_info->admin_queues;
4093
4094 writeq((u64)admin_queues->iq_element_array_bus_addr,
4095 &pqi_registers->admin_iq_element_array_addr);
4096 writeq((u64)admin_queues->oq_element_array_bus_addr,
4097 &pqi_registers->admin_oq_element_array_addr);
4098 writeq((u64)admin_queues->iq_ci_bus_addr,
4099 &pqi_registers->admin_iq_ci_addr);
4100 writeq((u64)admin_queues->oq_pi_bus_addr,
4101 &pqi_registers->admin_oq_pi_addr);
4102
4103 reg = PQI_ADMIN_IQ_NUM_ELEMENTS |
4104 (PQI_ADMIN_OQ_NUM_ELEMENTS << 8) |
4105 (admin_queues->int_msg_num << 16);
4106 writel(reg, &pqi_registers->admin_iq_num_elements);
4107
4108 writel(PQI_CREATE_ADMIN_QUEUE_PAIR,
4109 &pqi_registers->function_and_status_code);
4110
4111 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies;
4112 while (1) {
4113 status = readb(&pqi_registers->function_and_status_code);
4114 if (status == PQI_STATUS_IDLE)
4115 break;
4116 if (time_after(jiffies, timeout))
4117 return -ETIMEDOUT;
4118 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS);
4119 }
4120
4121 /*
4122 * The offset registers are not initialized to the correct
4123 * offsets until *after* the create admin queue pair command
4124 * completes successfully.
4125 */
4126 admin_queues->iq_pi = ctrl_info->iomem_base +
4127 PQI_DEVICE_REGISTERS_OFFSET +
4128 readq(&pqi_registers->admin_iq_pi_offset);
4129 admin_queues->oq_ci = ctrl_info->iomem_base +
4130 PQI_DEVICE_REGISTERS_OFFSET +
4131 readq(&pqi_registers->admin_oq_ci_offset);
4132
4133 return 0;
4134 }
4135
pqi_submit_admin_request(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_request * request)4136 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info,
4137 struct pqi_general_admin_request *request)
4138 {
4139 struct pqi_admin_queues *admin_queues;
4140 void *next_element;
4141 pqi_index_t iq_pi;
4142
4143 admin_queues = &ctrl_info->admin_queues;
4144 iq_pi = admin_queues->iq_pi_copy;
4145
4146 next_element = admin_queues->iq_element_array +
4147 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH);
4148
4149 memcpy(next_element, request, sizeof(*request));
4150
4151 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS;
4152 admin_queues->iq_pi_copy = iq_pi;
4153
4154 /*
4155 * This write notifies the controller that an IU is available to be
4156 * processed.
4157 */
4158 writel(iq_pi, admin_queues->iq_pi);
4159 }
4160
4161 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60
4162
pqi_poll_for_admin_response(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_response * response)4163 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info,
4164 struct pqi_general_admin_response *response)
4165 {
4166 struct pqi_admin_queues *admin_queues;
4167 pqi_index_t oq_pi;
4168 pqi_index_t oq_ci;
4169 unsigned long timeout;
4170
4171 admin_queues = &ctrl_info->admin_queues;
4172 oq_ci = admin_queues->oq_ci_copy;
4173
4174 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies;
4175
4176 while (1) {
4177 oq_pi = readl(admin_queues->oq_pi);
4178 if (oq_pi != oq_ci)
4179 break;
4180 if (time_after(jiffies, timeout)) {
4181 dev_err(&ctrl_info->pci_dev->dev,
4182 "timed out waiting for admin response\n");
4183 return -ETIMEDOUT;
4184 }
4185 if (!sis_is_firmware_running(ctrl_info))
4186 return -ENXIO;
4187 usleep_range(1000, 2000);
4188 }
4189
4190 memcpy(response, admin_queues->oq_element_array +
4191 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response));
4192
4193 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS;
4194 admin_queues->oq_ci_copy = oq_ci;
4195 writel(oq_ci, admin_queues->oq_ci);
4196
4197 return 0;
4198 }
4199
pqi_start_io(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group,enum pqi_io_path path,struct pqi_io_request * io_request)4200 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info,
4201 struct pqi_queue_group *queue_group, enum pqi_io_path path,
4202 struct pqi_io_request *io_request)
4203 {
4204 struct pqi_io_request *next;
4205 void *next_element;
4206 pqi_index_t iq_pi;
4207 pqi_index_t iq_ci;
4208 size_t iu_length;
4209 unsigned long flags;
4210 unsigned int num_elements_needed;
4211 unsigned int num_elements_to_end_of_queue;
4212 size_t copy_count;
4213 struct pqi_iu_header *request;
4214
4215 spin_lock_irqsave(&queue_group->submit_lock[path], flags);
4216
4217 if (io_request) {
4218 io_request->queue_group = queue_group;
4219 list_add_tail(&io_request->request_list_entry,
4220 &queue_group->request_list[path]);
4221 }
4222
4223 iq_pi = queue_group->iq_pi_copy[path];
4224
4225 list_for_each_entry_safe(io_request, next,
4226 &queue_group->request_list[path], request_list_entry) {
4227
4228 request = io_request->iu;
4229
4230 iu_length = get_unaligned_le16(&request->iu_length) +
4231 PQI_REQUEST_HEADER_LENGTH;
4232 num_elements_needed =
4233 DIV_ROUND_UP(iu_length,
4234 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4235
4236 iq_ci = readl(queue_group->iq_ci[path]);
4237
4238 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci,
4239 ctrl_info->num_elements_per_iq))
4240 break;
4241
4242 put_unaligned_le16(queue_group->oq_id,
4243 &request->response_queue_id);
4244
4245 next_element = queue_group->iq_element_array[path] +
4246 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4247
4248 num_elements_to_end_of_queue =
4249 ctrl_info->num_elements_per_iq - iq_pi;
4250
4251 if (num_elements_needed <= num_elements_to_end_of_queue) {
4252 memcpy(next_element, request, iu_length);
4253 } else {
4254 copy_count = num_elements_to_end_of_queue *
4255 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
4256 memcpy(next_element, request, copy_count);
4257 memcpy(queue_group->iq_element_array[path],
4258 (u8 *)request + copy_count,
4259 iu_length - copy_count);
4260 }
4261
4262 iq_pi = (iq_pi + num_elements_needed) %
4263 ctrl_info->num_elements_per_iq;
4264
4265 list_del(&io_request->request_list_entry);
4266 }
4267
4268 if (iq_pi != queue_group->iq_pi_copy[path]) {
4269 queue_group->iq_pi_copy[path] = iq_pi;
4270 /*
4271 * This write notifies the controller that one or more IUs are
4272 * available to be processed.
4273 */
4274 writel(iq_pi, queue_group->iq_pi[path]);
4275 }
4276
4277 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags);
4278 }
4279
4280 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10
4281
pqi_wait_for_completion_io(struct pqi_ctrl_info * ctrl_info,struct completion * wait)4282 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info,
4283 struct completion *wait)
4284 {
4285 int rc;
4286
4287 while (1) {
4288 if (wait_for_completion_io_timeout(wait,
4289 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) {
4290 rc = 0;
4291 break;
4292 }
4293
4294 pqi_check_ctrl_health(ctrl_info);
4295 if (pqi_ctrl_offline(ctrl_info)) {
4296 rc = -ENXIO;
4297 break;
4298 }
4299 }
4300
4301 return rc;
4302 }
4303
pqi_raid_synchronous_complete(struct pqi_io_request * io_request,void * context)4304 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request,
4305 void *context)
4306 {
4307 struct completion *waiting = context;
4308
4309 complete(waiting);
4310 }
4311
pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info * error_info)4312 static int pqi_process_raid_io_error_synchronous(
4313 struct pqi_raid_error_info *error_info)
4314 {
4315 int rc = -EIO;
4316
4317 switch (error_info->data_out_result) {
4318 case PQI_DATA_IN_OUT_GOOD:
4319 if (error_info->status == SAM_STAT_GOOD)
4320 rc = 0;
4321 break;
4322 case PQI_DATA_IN_OUT_UNDERFLOW:
4323 if (error_info->status == SAM_STAT_GOOD ||
4324 error_info->status == SAM_STAT_CHECK_CONDITION)
4325 rc = 0;
4326 break;
4327 case PQI_DATA_IN_OUT_ABORTED:
4328 rc = PQI_CMD_STATUS_ABORTED;
4329 break;
4330 }
4331
4332 return rc;
4333 }
4334
pqi_is_blockable_request(struct pqi_iu_header * request)4335 static inline bool pqi_is_blockable_request(struct pqi_iu_header *request)
4336 {
4337 return (request->driver_flags & PQI_DRIVER_NONBLOCKABLE_REQUEST) == 0;
4338 }
4339
pqi_submit_raid_request_synchronous(struct pqi_ctrl_info * ctrl_info,struct pqi_iu_header * request,unsigned int flags,struct pqi_raid_error_info * error_info)4340 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info,
4341 struct pqi_iu_header *request, unsigned int flags,
4342 struct pqi_raid_error_info *error_info)
4343 {
4344 int rc = 0;
4345 struct pqi_io_request *io_request;
4346 size_t iu_length;
4347 DECLARE_COMPLETION_ONSTACK(wait);
4348
4349 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) {
4350 if (down_interruptible(&ctrl_info->sync_request_sem))
4351 return -ERESTARTSYS;
4352 } else {
4353 down(&ctrl_info->sync_request_sem);
4354 }
4355
4356 pqi_ctrl_busy(ctrl_info);
4357 /*
4358 * Wait for other admin queue updates such as;
4359 * config table changes, OFA memory updates, ...
4360 */
4361 if (pqi_is_blockable_request(request))
4362 pqi_wait_if_ctrl_blocked(ctrl_info);
4363
4364 if (pqi_ctrl_offline(ctrl_info)) {
4365 rc = -ENXIO;
4366 goto out;
4367 }
4368
4369 io_request = pqi_alloc_io_request(ctrl_info);
4370
4371 put_unaligned_le16(io_request->index,
4372 &(((struct pqi_raid_path_request *)request)->request_id));
4373
4374 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO)
4375 ((struct pqi_raid_path_request *)request)->error_index =
4376 ((struct pqi_raid_path_request *)request)->request_id;
4377
4378 iu_length = get_unaligned_le16(&request->iu_length) +
4379 PQI_REQUEST_HEADER_LENGTH;
4380 memcpy(io_request->iu, request, iu_length);
4381
4382 io_request->io_complete_callback = pqi_raid_synchronous_complete;
4383 io_request->context = &wait;
4384
4385 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
4386 io_request);
4387
4388 pqi_wait_for_completion_io(ctrl_info, &wait);
4389
4390 if (error_info) {
4391 if (io_request->error_info)
4392 memcpy(error_info, io_request->error_info, sizeof(*error_info));
4393 else
4394 memset(error_info, 0, sizeof(*error_info));
4395 } else if (rc == 0 && io_request->error_info) {
4396 rc = pqi_process_raid_io_error_synchronous(io_request->error_info);
4397 }
4398
4399 pqi_free_io_request(io_request);
4400
4401 out:
4402 pqi_ctrl_unbusy(ctrl_info);
4403 up(&ctrl_info->sync_request_sem);
4404
4405 return rc;
4406 }
4407
pqi_validate_admin_response(struct pqi_general_admin_response * response,u8 expected_function_code)4408 static int pqi_validate_admin_response(
4409 struct pqi_general_admin_response *response, u8 expected_function_code)
4410 {
4411 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN)
4412 return -EINVAL;
4413
4414 if (get_unaligned_le16(&response->header.iu_length) !=
4415 PQI_GENERAL_ADMIN_IU_LENGTH)
4416 return -EINVAL;
4417
4418 if (response->function_code != expected_function_code)
4419 return -EINVAL;
4420
4421 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS)
4422 return -EINVAL;
4423
4424 return 0;
4425 }
4426
pqi_submit_admin_request_synchronous(struct pqi_ctrl_info * ctrl_info,struct pqi_general_admin_request * request,struct pqi_general_admin_response * response)4427 static int pqi_submit_admin_request_synchronous(
4428 struct pqi_ctrl_info *ctrl_info,
4429 struct pqi_general_admin_request *request,
4430 struct pqi_general_admin_response *response)
4431 {
4432 int rc;
4433
4434 pqi_submit_admin_request(ctrl_info, request);
4435
4436 rc = pqi_poll_for_admin_response(ctrl_info, response);
4437
4438 if (rc == 0)
4439 rc = pqi_validate_admin_response(response, request->function_code);
4440
4441 return rc;
4442 }
4443
pqi_report_device_capability(struct pqi_ctrl_info * ctrl_info)4444 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info)
4445 {
4446 int rc;
4447 struct pqi_general_admin_request request;
4448 struct pqi_general_admin_response response;
4449 struct pqi_device_capability *capability;
4450 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor;
4451
4452 capability = kmalloc(sizeof(*capability), GFP_KERNEL);
4453 if (!capability)
4454 return -ENOMEM;
4455
4456 memset(&request, 0, sizeof(request));
4457
4458 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4459 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4460 &request.header.iu_length);
4461 request.function_code =
4462 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY;
4463 put_unaligned_le32(sizeof(*capability),
4464 &request.data.report_device_capability.buffer_length);
4465
4466 rc = pqi_map_single(ctrl_info->pci_dev,
4467 &request.data.report_device_capability.sg_descriptor,
4468 capability, sizeof(*capability),
4469 DMA_FROM_DEVICE);
4470 if (rc)
4471 goto out;
4472
4473 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, &response);
4474
4475 pqi_pci_unmap(ctrl_info->pci_dev,
4476 &request.data.report_device_capability.sg_descriptor, 1,
4477 DMA_FROM_DEVICE);
4478
4479 if (rc)
4480 goto out;
4481
4482 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) {
4483 rc = -EIO;
4484 goto out;
4485 }
4486
4487 ctrl_info->max_inbound_queues =
4488 get_unaligned_le16(&capability->max_inbound_queues);
4489 ctrl_info->max_elements_per_iq =
4490 get_unaligned_le16(&capability->max_elements_per_iq);
4491 ctrl_info->max_iq_element_length =
4492 get_unaligned_le16(&capability->max_iq_element_length)
4493 * 16;
4494 ctrl_info->max_outbound_queues =
4495 get_unaligned_le16(&capability->max_outbound_queues);
4496 ctrl_info->max_elements_per_oq =
4497 get_unaligned_le16(&capability->max_elements_per_oq);
4498 ctrl_info->max_oq_element_length =
4499 get_unaligned_le16(&capability->max_oq_element_length)
4500 * 16;
4501
4502 sop_iu_layer_descriptor =
4503 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP];
4504
4505 ctrl_info->max_inbound_iu_length_per_firmware =
4506 get_unaligned_le16(
4507 &sop_iu_layer_descriptor->max_inbound_iu_length);
4508 ctrl_info->inbound_spanning_supported =
4509 sop_iu_layer_descriptor->inbound_spanning_supported;
4510 ctrl_info->outbound_spanning_supported =
4511 sop_iu_layer_descriptor->outbound_spanning_supported;
4512
4513 out:
4514 kfree(capability);
4515
4516 return rc;
4517 }
4518
pqi_validate_device_capability(struct pqi_ctrl_info * ctrl_info)4519 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info)
4520 {
4521 if (ctrl_info->max_iq_element_length <
4522 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4523 dev_err(&ctrl_info->pci_dev->dev,
4524 "max. inbound queue element length of %d is less than the required length of %d\n",
4525 ctrl_info->max_iq_element_length,
4526 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4527 return -EINVAL;
4528 }
4529
4530 if (ctrl_info->max_oq_element_length <
4531 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) {
4532 dev_err(&ctrl_info->pci_dev->dev,
4533 "max. outbound queue element length of %d is less than the required length of %d\n",
4534 ctrl_info->max_oq_element_length,
4535 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH);
4536 return -EINVAL;
4537 }
4538
4539 if (ctrl_info->max_inbound_iu_length_per_firmware <
4540 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) {
4541 dev_err(&ctrl_info->pci_dev->dev,
4542 "max. inbound IU length of %u is less than the min. required length of %d\n",
4543 ctrl_info->max_inbound_iu_length_per_firmware,
4544 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
4545 return -EINVAL;
4546 }
4547
4548 if (!ctrl_info->inbound_spanning_supported) {
4549 dev_err(&ctrl_info->pci_dev->dev,
4550 "the controller does not support inbound spanning\n");
4551 return -EINVAL;
4552 }
4553
4554 if (ctrl_info->outbound_spanning_supported) {
4555 dev_err(&ctrl_info->pci_dev->dev,
4556 "the controller supports outbound spanning but this driver does not\n");
4557 return -EINVAL;
4558 }
4559
4560 return 0;
4561 }
4562
pqi_create_event_queue(struct pqi_ctrl_info * ctrl_info)4563 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info)
4564 {
4565 int rc;
4566 struct pqi_event_queue *event_queue;
4567 struct pqi_general_admin_request request;
4568 struct pqi_general_admin_response response;
4569
4570 event_queue = &ctrl_info->event_queue;
4571
4572 /*
4573 * Create OQ (Outbound Queue - device to host queue) to dedicate
4574 * to events.
4575 */
4576 memset(&request, 0, sizeof(request));
4577 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4578 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4579 &request.header.iu_length);
4580 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4581 put_unaligned_le16(event_queue->oq_id,
4582 &request.data.create_operational_oq.queue_id);
4583 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr,
4584 &request.data.create_operational_oq.element_array_addr);
4585 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr,
4586 &request.data.create_operational_oq.pi_addr);
4587 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS,
4588 &request.data.create_operational_oq.num_elements);
4589 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16,
4590 &request.data.create_operational_oq.element_length);
4591 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4592 put_unaligned_le16(event_queue->int_msg_num,
4593 &request.data.create_operational_oq.int_msg_num);
4594
4595 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4596 &response);
4597 if (rc)
4598 return rc;
4599
4600 event_queue->oq_ci = ctrl_info->iomem_base +
4601 PQI_DEVICE_REGISTERS_OFFSET +
4602 get_unaligned_le64(
4603 &response.data.create_operational_oq.oq_ci_offset);
4604
4605 return 0;
4606 }
4607
pqi_create_queue_group(struct pqi_ctrl_info * ctrl_info,unsigned int group_number)4608 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info,
4609 unsigned int group_number)
4610 {
4611 int rc;
4612 struct pqi_queue_group *queue_group;
4613 struct pqi_general_admin_request request;
4614 struct pqi_general_admin_response response;
4615
4616 queue_group = &ctrl_info->queue_groups[group_number];
4617
4618 /*
4619 * Create IQ (Inbound Queue - host to device queue) for
4620 * RAID path.
4621 */
4622 memset(&request, 0, sizeof(request));
4623 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4624 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4625 &request.header.iu_length);
4626 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4627 put_unaligned_le16(queue_group->iq_id[RAID_PATH],
4628 &request.data.create_operational_iq.queue_id);
4629 put_unaligned_le64(
4630 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH],
4631 &request.data.create_operational_iq.element_array_addr);
4632 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH],
4633 &request.data.create_operational_iq.ci_addr);
4634 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4635 &request.data.create_operational_iq.num_elements);
4636 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4637 &request.data.create_operational_iq.element_length);
4638 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4639
4640 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4641 &response);
4642 if (rc) {
4643 dev_err(&ctrl_info->pci_dev->dev,
4644 "error creating inbound RAID queue\n");
4645 return rc;
4646 }
4647
4648 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base +
4649 PQI_DEVICE_REGISTERS_OFFSET +
4650 get_unaligned_le64(
4651 &response.data.create_operational_iq.iq_pi_offset);
4652
4653 /*
4654 * Create IQ (Inbound Queue - host to device queue) for
4655 * Advanced I/O (AIO) path.
4656 */
4657 memset(&request, 0, sizeof(request));
4658 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4659 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4660 &request.header.iu_length);
4661 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ;
4662 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4663 &request.data.create_operational_iq.queue_id);
4664 put_unaligned_le64((u64)queue_group->
4665 iq_element_array_bus_addr[AIO_PATH],
4666 &request.data.create_operational_iq.element_array_addr);
4667 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH],
4668 &request.data.create_operational_iq.ci_addr);
4669 put_unaligned_le16(ctrl_info->num_elements_per_iq,
4670 &request.data.create_operational_iq.num_elements);
4671 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16,
4672 &request.data.create_operational_iq.element_length);
4673 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP;
4674
4675 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4676 &response);
4677 if (rc) {
4678 dev_err(&ctrl_info->pci_dev->dev,
4679 "error creating inbound AIO queue\n");
4680 return rc;
4681 }
4682
4683 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base +
4684 PQI_DEVICE_REGISTERS_OFFSET +
4685 get_unaligned_le64(
4686 &response.data.create_operational_iq.iq_pi_offset);
4687
4688 /*
4689 * Designate the 2nd IQ as the AIO path. By default, all IQs are
4690 * assumed to be for RAID path I/O unless we change the queue's
4691 * property.
4692 */
4693 memset(&request, 0, sizeof(request));
4694 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4695 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4696 &request.header.iu_length);
4697 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY;
4698 put_unaligned_le16(queue_group->iq_id[AIO_PATH],
4699 &request.data.change_operational_iq_properties.queue_id);
4700 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE,
4701 &request.data.change_operational_iq_properties.vendor_specific);
4702
4703 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4704 &response);
4705 if (rc) {
4706 dev_err(&ctrl_info->pci_dev->dev,
4707 "error changing queue property\n");
4708 return rc;
4709 }
4710
4711 /*
4712 * Create OQ (Outbound Queue - device to host queue).
4713 */
4714 memset(&request, 0, sizeof(request));
4715 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN;
4716 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH,
4717 &request.header.iu_length);
4718 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ;
4719 put_unaligned_le16(queue_group->oq_id,
4720 &request.data.create_operational_oq.queue_id);
4721 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr,
4722 &request.data.create_operational_oq.element_array_addr);
4723 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr,
4724 &request.data.create_operational_oq.pi_addr);
4725 put_unaligned_le16(ctrl_info->num_elements_per_oq,
4726 &request.data.create_operational_oq.num_elements);
4727 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16,
4728 &request.data.create_operational_oq.element_length);
4729 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP;
4730 put_unaligned_le16(queue_group->int_msg_num,
4731 &request.data.create_operational_oq.int_msg_num);
4732
4733 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request,
4734 &response);
4735 if (rc) {
4736 dev_err(&ctrl_info->pci_dev->dev,
4737 "error creating outbound queue\n");
4738 return rc;
4739 }
4740
4741 queue_group->oq_ci = ctrl_info->iomem_base +
4742 PQI_DEVICE_REGISTERS_OFFSET +
4743 get_unaligned_le64(
4744 &response.data.create_operational_oq.oq_ci_offset);
4745
4746 return 0;
4747 }
4748
pqi_create_queues(struct pqi_ctrl_info * ctrl_info)4749 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info)
4750 {
4751 int rc;
4752 unsigned int i;
4753
4754 rc = pqi_create_event_queue(ctrl_info);
4755 if (rc) {
4756 dev_err(&ctrl_info->pci_dev->dev,
4757 "error creating event queue\n");
4758 return rc;
4759 }
4760
4761 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
4762 rc = pqi_create_queue_group(ctrl_info, i);
4763 if (rc) {
4764 dev_err(&ctrl_info->pci_dev->dev,
4765 "error creating queue group number %u/%u\n",
4766 i, ctrl_info->num_queue_groups);
4767 return rc;
4768 }
4769 }
4770
4771 return 0;
4772 }
4773
4774 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \
4775 struct_size((struct pqi_event_config *)0, descriptors, PQI_MAX_EVENT_DESCRIPTORS)
4776
pqi_configure_events(struct pqi_ctrl_info * ctrl_info,bool enable_events)4777 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info,
4778 bool enable_events)
4779 {
4780 int rc;
4781 unsigned int i;
4782 struct pqi_event_config *event_config;
4783 struct pqi_event_descriptor *event_descriptor;
4784 struct pqi_general_management_request request;
4785
4786 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4787 GFP_KERNEL);
4788 if (!event_config)
4789 return -ENOMEM;
4790
4791 memset(&request, 0, sizeof(request));
4792
4793 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG;
4794 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4795 data.report_event_configuration.sg_descriptors[1]) -
4796 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4797 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4798 &request.data.report_event_configuration.buffer_length);
4799
4800 rc = pqi_map_single(ctrl_info->pci_dev,
4801 request.data.report_event_configuration.sg_descriptors,
4802 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4803 DMA_FROM_DEVICE);
4804 if (rc)
4805 goto out;
4806
4807 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
4808
4809 pqi_pci_unmap(ctrl_info->pci_dev,
4810 request.data.report_event_configuration.sg_descriptors, 1,
4811 DMA_FROM_DEVICE);
4812
4813 if (rc)
4814 goto out;
4815
4816 for (i = 0; i < event_config->num_event_descriptors; i++) {
4817 event_descriptor = &event_config->descriptors[i];
4818 if (enable_events &&
4819 pqi_is_supported_event(event_descriptor->event_type))
4820 put_unaligned_le16(ctrl_info->event_queue.oq_id,
4821 &event_descriptor->oq_id);
4822 else
4823 put_unaligned_le16(0, &event_descriptor->oq_id);
4824 }
4825
4826 memset(&request, 0, sizeof(request));
4827
4828 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG;
4829 put_unaligned_le16(offsetof(struct pqi_general_management_request,
4830 data.report_event_configuration.sg_descriptors[1]) -
4831 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length);
4832 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4833 &request.data.report_event_configuration.buffer_length);
4834
4835 rc = pqi_map_single(ctrl_info->pci_dev,
4836 request.data.report_event_configuration.sg_descriptors,
4837 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH,
4838 DMA_TO_DEVICE);
4839 if (rc)
4840 goto out;
4841
4842 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
4843
4844 pqi_pci_unmap(ctrl_info->pci_dev,
4845 request.data.report_event_configuration.sg_descriptors, 1,
4846 DMA_TO_DEVICE);
4847
4848 out:
4849 kfree(event_config);
4850
4851 return rc;
4852 }
4853
pqi_enable_events(struct pqi_ctrl_info * ctrl_info)4854 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info)
4855 {
4856 return pqi_configure_events(ctrl_info, true);
4857 }
4858
pqi_free_all_io_requests(struct pqi_ctrl_info * ctrl_info)4859 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info)
4860 {
4861 unsigned int i;
4862 struct device *dev;
4863 size_t sg_chain_buffer_length;
4864 struct pqi_io_request *io_request;
4865
4866 if (!ctrl_info->io_request_pool)
4867 return;
4868
4869 dev = &ctrl_info->pci_dev->dev;
4870 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4871 io_request = ctrl_info->io_request_pool;
4872
4873 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4874 kfree(io_request->iu);
4875 if (!io_request->sg_chain_buffer)
4876 break;
4877 dma_free_coherent(dev, sg_chain_buffer_length,
4878 io_request->sg_chain_buffer,
4879 io_request->sg_chain_buffer_dma_handle);
4880 io_request++;
4881 }
4882
4883 kfree(ctrl_info->io_request_pool);
4884 ctrl_info->io_request_pool = NULL;
4885 }
4886
pqi_alloc_error_buffer(struct pqi_ctrl_info * ctrl_info)4887 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info)
4888 {
4889 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev,
4890 ctrl_info->error_buffer_length,
4891 &ctrl_info->error_buffer_dma_handle,
4892 GFP_KERNEL);
4893 if (!ctrl_info->error_buffer)
4894 return -ENOMEM;
4895
4896 return 0;
4897 }
4898
pqi_alloc_io_resources(struct pqi_ctrl_info * ctrl_info)4899 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info)
4900 {
4901 unsigned int i;
4902 void *sg_chain_buffer;
4903 size_t sg_chain_buffer_length;
4904 dma_addr_t sg_chain_buffer_dma_handle;
4905 struct device *dev;
4906 struct pqi_io_request *io_request;
4907
4908 ctrl_info->io_request_pool = kcalloc(ctrl_info->max_io_slots,
4909 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL);
4910
4911 if (!ctrl_info->io_request_pool) {
4912 dev_err(&ctrl_info->pci_dev->dev,
4913 "failed to allocate I/O request pool\n");
4914 goto error;
4915 }
4916
4917 dev = &ctrl_info->pci_dev->dev;
4918 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length;
4919 io_request = ctrl_info->io_request_pool;
4920
4921 for (i = 0; i < ctrl_info->max_io_slots; i++) {
4922 io_request->iu = kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL);
4923
4924 if (!io_request->iu) {
4925 dev_err(&ctrl_info->pci_dev->dev,
4926 "failed to allocate IU buffers\n");
4927 goto error;
4928 }
4929
4930 sg_chain_buffer = dma_alloc_coherent(dev,
4931 sg_chain_buffer_length, &sg_chain_buffer_dma_handle,
4932 GFP_KERNEL);
4933
4934 if (!sg_chain_buffer) {
4935 dev_err(&ctrl_info->pci_dev->dev,
4936 "failed to allocate PQI scatter-gather chain buffers\n");
4937 goto error;
4938 }
4939
4940 io_request->index = i;
4941 io_request->sg_chain_buffer = sg_chain_buffer;
4942 io_request->sg_chain_buffer_dma_handle = sg_chain_buffer_dma_handle;
4943 io_request++;
4944 }
4945
4946 return 0;
4947
4948 error:
4949 pqi_free_all_io_requests(ctrl_info);
4950
4951 return -ENOMEM;
4952 }
4953
4954 /*
4955 * Calculate required resources that are sized based on max. outstanding
4956 * requests and max. transfer size.
4957 */
4958
pqi_calculate_io_resources(struct pqi_ctrl_info * ctrl_info)4959 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info)
4960 {
4961 u32 max_transfer_size;
4962 u32 max_sg_entries;
4963
4964 ctrl_info->scsi_ml_can_queue =
4965 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS;
4966 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests;
4967
4968 ctrl_info->error_buffer_length =
4969 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH;
4970
4971 if (reset_devices)
4972 max_transfer_size = min(ctrl_info->max_transfer_size,
4973 PQI_MAX_TRANSFER_SIZE_KDUMP);
4974 else
4975 max_transfer_size = min(ctrl_info->max_transfer_size,
4976 PQI_MAX_TRANSFER_SIZE);
4977
4978 max_sg_entries = max_transfer_size / PAGE_SIZE;
4979
4980 /* +1 to cover when the buffer is not page-aligned. */
4981 max_sg_entries++;
4982
4983 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries);
4984
4985 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE;
4986
4987 ctrl_info->sg_chain_buffer_length =
4988 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) +
4989 PQI_EXTRA_SGL_MEMORY;
4990 ctrl_info->sg_tablesize = max_sg_entries;
4991 ctrl_info->max_sectors = max_transfer_size / 512;
4992 }
4993
pqi_calculate_queue_resources(struct pqi_ctrl_info * ctrl_info)4994 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info)
4995 {
4996 int num_queue_groups;
4997 u16 num_elements_per_iq;
4998 u16 num_elements_per_oq;
4999
5000 if (reset_devices) {
5001 num_queue_groups = 1;
5002 } else {
5003 int num_cpus;
5004 int max_queue_groups;
5005
5006 max_queue_groups = min(ctrl_info->max_inbound_queues / 2,
5007 ctrl_info->max_outbound_queues - 1);
5008 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS);
5009
5010 num_cpus = num_online_cpus();
5011 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors);
5012 num_queue_groups = min(num_queue_groups, max_queue_groups);
5013 }
5014
5015 ctrl_info->num_queue_groups = num_queue_groups;
5016 ctrl_info->max_hw_queue_index = num_queue_groups - 1;
5017
5018 /*
5019 * Make sure that the max. inbound IU length is an even multiple
5020 * of our inbound element length.
5021 */
5022 ctrl_info->max_inbound_iu_length =
5023 (ctrl_info->max_inbound_iu_length_per_firmware /
5024 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) *
5025 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH;
5026
5027 num_elements_per_iq =
5028 (ctrl_info->max_inbound_iu_length /
5029 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
5030
5031 /* Add one because one element in each queue is unusable. */
5032 num_elements_per_iq++;
5033
5034 num_elements_per_iq = min(num_elements_per_iq,
5035 ctrl_info->max_elements_per_iq);
5036
5037 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1;
5038 num_elements_per_oq = min(num_elements_per_oq,
5039 ctrl_info->max_elements_per_oq);
5040
5041 ctrl_info->num_elements_per_iq = num_elements_per_iq;
5042 ctrl_info->num_elements_per_oq = num_elements_per_oq;
5043
5044 ctrl_info->max_sg_per_iu =
5045 ((ctrl_info->max_inbound_iu_length -
5046 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
5047 sizeof(struct pqi_sg_descriptor)) +
5048 PQI_MAX_EMBEDDED_SG_DESCRIPTORS;
5049
5050 ctrl_info->max_sg_per_r56_iu =
5051 ((ctrl_info->max_inbound_iu_length -
5052 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) /
5053 sizeof(struct pqi_sg_descriptor)) +
5054 PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS;
5055 }
5056
pqi_set_sg_descriptor(struct pqi_sg_descriptor * sg_descriptor,struct scatterlist * sg)5057 static inline void pqi_set_sg_descriptor(struct pqi_sg_descriptor *sg_descriptor,
5058 struct scatterlist *sg)
5059 {
5060 u64 address = (u64)sg_dma_address(sg);
5061 unsigned int length = sg_dma_len(sg);
5062
5063 put_unaligned_le64(address, &sg_descriptor->address);
5064 put_unaligned_le32(length, &sg_descriptor->length);
5065 put_unaligned_le32(0, &sg_descriptor->flags);
5066 }
5067
pqi_build_sg_list(struct pqi_sg_descriptor * sg_descriptor,struct scatterlist * sg,int sg_count,struct pqi_io_request * io_request,int max_sg_per_iu,bool * chained)5068 static unsigned int pqi_build_sg_list(struct pqi_sg_descriptor *sg_descriptor,
5069 struct scatterlist *sg, int sg_count, struct pqi_io_request *io_request,
5070 int max_sg_per_iu, bool *chained)
5071 {
5072 int i;
5073 unsigned int num_sg_in_iu;
5074
5075 *chained = false;
5076 i = 0;
5077 num_sg_in_iu = 0;
5078 max_sg_per_iu--; /* Subtract 1 to leave room for chain marker. */
5079
5080 while (1) {
5081 pqi_set_sg_descriptor(sg_descriptor, sg);
5082 if (!*chained)
5083 num_sg_in_iu++;
5084 i++;
5085 if (i == sg_count)
5086 break;
5087 sg_descriptor++;
5088 if (i == max_sg_per_iu) {
5089 put_unaligned_le64((u64)io_request->sg_chain_buffer_dma_handle,
5090 &sg_descriptor->address);
5091 put_unaligned_le32((sg_count - num_sg_in_iu) * sizeof(*sg_descriptor),
5092 &sg_descriptor->length);
5093 put_unaligned_le32(CISS_SG_CHAIN, &sg_descriptor->flags);
5094 *chained = true;
5095 num_sg_in_iu++;
5096 sg_descriptor = io_request->sg_chain_buffer;
5097 }
5098 sg = sg_next(sg);
5099 }
5100
5101 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags);
5102
5103 return num_sg_in_iu;
5104 }
5105
pqi_build_raid_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_raid_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5106 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info,
5107 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd,
5108 struct pqi_io_request *io_request)
5109 {
5110 u16 iu_length;
5111 int sg_count;
5112 bool chained;
5113 unsigned int num_sg_in_iu;
5114 struct scatterlist *sg;
5115 struct pqi_sg_descriptor *sg_descriptor;
5116
5117 sg_count = scsi_dma_map(scmd);
5118 if (sg_count < 0)
5119 return sg_count;
5120
5121 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
5122 PQI_REQUEST_HEADER_LENGTH;
5123
5124 if (sg_count == 0)
5125 goto out;
5126
5127 sg = scsi_sglist(scmd);
5128 sg_descriptor = request->sg_descriptors;
5129
5130 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5131 ctrl_info->max_sg_per_iu, &chained);
5132
5133 request->partial = chained;
5134 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5135
5136 out:
5137 put_unaligned_le16(iu_length, &request->header.iu_length);
5138
5139 return 0;
5140 }
5141
pqi_build_aio_r1_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_r1_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5142 static int pqi_build_aio_r1_sg_list(struct pqi_ctrl_info *ctrl_info,
5143 struct pqi_aio_r1_path_request *request, struct scsi_cmnd *scmd,
5144 struct pqi_io_request *io_request)
5145 {
5146 u16 iu_length;
5147 int sg_count;
5148 bool chained;
5149 unsigned int num_sg_in_iu;
5150 struct scatterlist *sg;
5151 struct pqi_sg_descriptor *sg_descriptor;
5152
5153 sg_count = scsi_dma_map(scmd);
5154 if (sg_count < 0)
5155 return sg_count;
5156
5157 iu_length = offsetof(struct pqi_aio_r1_path_request, sg_descriptors) -
5158 PQI_REQUEST_HEADER_LENGTH;
5159 num_sg_in_iu = 0;
5160
5161 if (sg_count == 0)
5162 goto out;
5163
5164 sg = scsi_sglist(scmd);
5165 sg_descriptor = request->sg_descriptors;
5166
5167 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5168 ctrl_info->max_sg_per_iu, &chained);
5169
5170 request->partial = chained;
5171 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5172
5173 out:
5174 put_unaligned_le16(iu_length, &request->header.iu_length);
5175 request->num_sg_descriptors = num_sg_in_iu;
5176
5177 return 0;
5178 }
5179
pqi_build_aio_r56_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_r56_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5180 static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info,
5181 struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd,
5182 struct pqi_io_request *io_request)
5183 {
5184 u16 iu_length;
5185 int sg_count;
5186 bool chained;
5187 unsigned int num_sg_in_iu;
5188 struct scatterlist *sg;
5189 struct pqi_sg_descriptor *sg_descriptor;
5190
5191 sg_count = scsi_dma_map(scmd);
5192 if (sg_count < 0)
5193 return sg_count;
5194
5195 iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) -
5196 PQI_REQUEST_HEADER_LENGTH;
5197 num_sg_in_iu = 0;
5198
5199 if (sg_count != 0) {
5200 sg = scsi_sglist(scmd);
5201 sg_descriptor = request->sg_descriptors;
5202
5203 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5204 ctrl_info->max_sg_per_r56_iu, &chained);
5205
5206 request->partial = chained;
5207 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5208 }
5209
5210 put_unaligned_le16(iu_length, &request->header.iu_length);
5211 request->num_sg_descriptors = num_sg_in_iu;
5212
5213 return 0;
5214 }
5215
pqi_build_aio_sg_list(struct pqi_ctrl_info * ctrl_info,struct pqi_aio_path_request * request,struct scsi_cmnd * scmd,struct pqi_io_request * io_request)5216 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info,
5217 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd,
5218 struct pqi_io_request *io_request)
5219 {
5220 u16 iu_length;
5221 int sg_count;
5222 bool chained;
5223 unsigned int num_sg_in_iu;
5224 struct scatterlist *sg;
5225 struct pqi_sg_descriptor *sg_descriptor;
5226
5227 sg_count = scsi_dma_map(scmd);
5228 if (sg_count < 0)
5229 return sg_count;
5230
5231 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) -
5232 PQI_REQUEST_HEADER_LENGTH;
5233 num_sg_in_iu = 0;
5234
5235 if (sg_count == 0)
5236 goto out;
5237
5238 sg = scsi_sglist(scmd);
5239 sg_descriptor = request->sg_descriptors;
5240
5241 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request,
5242 ctrl_info->max_sg_per_iu, &chained);
5243
5244 request->partial = chained;
5245 iu_length += num_sg_in_iu * sizeof(*sg_descriptor);
5246
5247 out:
5248 put_unaligned_le16(iu_length, &request->header.iu_length);
5249 request->num_sg_descriptors = num_sg_in_iu;
5250
5251 return 0;
5252 }
5253
pqi_raid_io_complete(struct pqi_io_request * io_request,void * context)5254 static void pqi_raid_io_complete(struct pqi_io_request *io_request,
5255 void *context)
5256 {
5257 struct scsi_cmnd *scmd;
5258
5259 scmd = io_request->scmd;
5260 pqi_free_io_request(io_request);
5261 scsi_dma_unmap(scmd);
5262 pqi_scsi_done(scmd);
5263 }
5264
pqi_raid_submit_scsi_cmd_with_io_request(struct pqi_ctrl_info * ctrl_info,struct pqi_io_request * io_request,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5265 static int pqi_raid_submit_scsi_cmd_with_io_request(
5266 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request,
5267 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5268 struct pqi_queue_group *queue_group)
5269 {
5270 int rc;
5271 size_t cdb_length;
5272 struct pqi_raid_path_request *request;
5273
5274 io_request->io_complete_callback = pqi_raid_io_complete;
5275 io_request->scmd = scmd;
5276
5277 request = io_request->iu;
5278 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors));
5279
5280 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
5281 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5282 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5283 put_unaligned_le16(io_request->index, &request->request_id);
5284 request->error_index = request->request_id;
5285 memcpy(request->lun_number, device->scsi3addr, sizeof(request->lun_number));
5286
5287 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb));
5288 memcpy(request->cdb, scmd->cmnd, cdb_length);
5289
5290 switch (cdb_length) {
5291 case 6:
5292 case 10:
5293 case 12:
5294 case 16:
5295 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
5296 break;
5297 case 20:
5298 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_4;
5299 break;
5300 case 24:
5301 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_8;
5302 break;
5303 case 28:
5304 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_12;
5305 break;
5306 case 32:
5307 default:
5308 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_16;
5309 break;
5310 }
5311
5312 switch (scmd->sc_data_direction) {
5313 case DMA_FROM_DEVICE:
5314 request->data_direction = SOP_READ_FLAG;
5315 break;
5316 case DMA_TO_DEVICE:
5317 request->data_direction = SOP_WRITE_FLAG;
5318 break;
5319 case DMA_NONE:
5320 request->data_direction = SOP_NO_DIRECTION_FLAG;
5321 break;
5322 case DMA_BIDIRECTIONAL:
5323 request->data_direction = SOP_BIDIRECTIONAL;
5324 break;
5325 default:
5326 dev_err(&ctrl_info->pci_dev->dev,
5327 "unknown data direction: %d\n",
5328 scmd->sc_data_direction);
5329 break;
5330 }
5331
5332 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request);
5333 if (rc) {
5334 pqi_free_io_request(io_request);
5335 return SCSI_MLQUEUE_HOST_BUSY;
5336 }
5337
5338 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request);
5339
5340 return 0;
5341 }
5342
pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5343 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5344 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5345 struct pqi_queue_group *queue_group)
5346 {
5347 struct pqi_io_request *io_request;
5348
5349 io_request = pqi_alloc_io_request(ctrl_info);
5350
5351 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request,
5352 device, scmd, queue_group);
5353 }
5354
pqi_raid_bypass_retry_needed(struct pqi_io_request * io_request)5355 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request)
5356 {
5357 struct scsi_cmnd *scmd;
5358 struct pqi_scsi_dev *device;
5359 struct pqi_ctrl_info *ctrl_info;
5360
5361 if (!io_request->raid_bypass)
5362 return false;
5363
5364 scmd = io_request->scmd;
5365 if ((scmd->result & 0xff) == SAM_STAT_GOOD)
5366 return false;
5367 if (host_byte(scmd->result) == DID_NO_CONNECT)
5368 return false;
5369
5370 device = scmd->device->hostdata;
5371 if (pqi_device_offline(device) || pqi_device_in_remove(device))
5372 return false;
5373
5374 ctrl_info = shost_to_hba(scmd->device->host);
5375 if (pqi_ctrl_offline(ctrl_info))
5376 return false;
5377
5378 return true;
5379 }
5380
pqi_aio_io_complete(struct pqi_io_request * io_request,void * context)5381 static void pqi_aio_io_complete(struct pqi_io_request *io_request,
5382 void *context)
5383 {
5384 struct scsi_cmnd *scmd;
5385
5386 scmd = io_request->scmd;
5387 scsi_dma_unmap(scmd);
5388 if (io_request->status == -EAGAIN || pqi_raid_bypass_retry_needed(io_request)) {
5389 set_host_byte(scmd, DID_IMM_RETRY);
5390 scmd->SCp.this_residual++;
5391 }
5392
5393 pqi_free_io_request(io_request);
5394 pqi_scsi_done(scmd);
5395 }
5396
pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group)5397 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info,
5398 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd,
5399 struct pqi_queue_group *queue_group)
5400 {
5401 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle,
5402 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false);
5403 }
5404
pqi_aio_submit_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,u32 aio_handle,u8 * cdb,unsigned int cdb_length,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,bool raid_bypass)5405 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info,
5406 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb,
5407 unsigned int cdb_length, struct pqi_queue_group *queue_group,
5408 struct pqi_encryption_info *encryption_info, bool raid_bypass)
5409 {
5410 int rc;
5411 struct pqi_io_request *io_request;
5412 struct pqi_aio_path_request *request;
5413
5414 io_request = pqi_alloc_io_request(ctrl_info);
5415 io_request->io_complete_callback = pqi_aio_io_complete;
5416 io_request->scmd = scmd;
5417 io_request->raid_bypass = raid_bypass;
5418
5419 request = io_request->iu;
5420 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors));
5421
5422 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO;
5423 put_unaligned_le32(aio_handle, &request->nexus_id);
5424 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length);
5425 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5426 put_unaligned_le16(io_request->index, &request->request_id);
5427 request->error_index = request->request_id;
5428 if (cdb_length > sizeof(request->cdb))
5429 cdb_length = sizeof(request->cdb);
5430 request->cdb_length = cdb_length;
5431 memcpy(request->cdb, cdb, cdb_length);
5432
5433 switch (scmd->sc_data_direction) {
5434 case DMA_TO_DEVICE:
5435 request->data_direction = SOP_READ_FLAG;
5436 break;
5437 case DMA_FROM_DEVICE:
5438 request->data_direction = SOP_WRITE_FLAG;
5439 break;
5440 case DMA_NONE:
5441 request->data_direction = SOP_NO_DIRECTION_FLAG;
5442 break;
5443 case DMA_BIDIRECTIONAL:
5444 request->data_direction = SOP_BIDIRECTIONAL;
5445 break;
5446 default:
5447 dev_err(&ctrl_info->pci_dev->dev,
5448 "unknown data direction: %d\n",
5449 scmd->sc_data_direction);
5450 break;
5451 }
5452
5453 if (encryption_info) {
5454 request->encryption_enable = true;
5455 put_unaligned_le16(encryption_info->data_encryption_key_index,
5456 &request->data_encryption_key_index);
5457 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5458 &request->encrypt_tweak_lower);
5459 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5460 &request->encrypt_tweak_upper);
5461 }
5462
5463 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request);
5464 if (rc) {
5465 pqi_free_io_request(io_request);
5466 return SCSI_MLQUEUE_HOST_BUSY;
5467 }
5468
5469 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5470
5471 return 0;
5472 }
5473
pqi_aio_submit_r1_write_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,struct pqi_scsi_dev * device,struct pqi_scsi_dev_raid_map_data * rmd)5474 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info,
5475 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
5476 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
5477 struct pqi_scsi_dev_raid_map_data *rmd)
5478 {
5479 int rc;
5480 struct pqi_io_request *io_request;
5481 struct pqi_aio_r1_path_request *r1_request;
5482
5483 io_request = pqi_alloc_io_request(ctrl_info);
5484 io_request->io_complete_callback = pqi_aio_io_complete;
5485 io_request->scmd = scmd;
5486 io_request->raid_bypass = true;
5487
5488 r1_request = io_request->iu;
5489 memset(r1_request, 0, offsetof(struct pqi_aio_r1_path_request, sg_descriptors));
5490
5491 r1_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID1_IO;
5492 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r1_request->volume_id);
5493 r1_request->num_drives = rmd->num_it_nexus_entries;
5494 put_unaligned_le32(rmd->it_nexus[0], &r1_request->it_nexus_1);
5495 put_unaligned_le32(rmd->it_nexus[1], &r1_request->it_nexus_2);
5496 if (rmd->num_it_nexus_entries == 3)
5497 put_unaligned_le32(rmd->it_nexus[2], &r1_request->it_nexus_3);
5498
5499 put_unaligned_le32(scsi_bufflen(scmd), &r1_request->data_length);
5500 r1_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5501 put_unaligned_le16(io_request->index, &r1_request->request_id);
5502 r1_request->error_index = r1_request->request_id;
5503 if (rmd->cdb_length > sizeof(r1_request->cdb))
5504 rmd->cdb_length = sizeof(r1_request->cdb);
5505 r1_request->cdb_length = rmd->cdb_length;
5506 memcpy(r1_request->cdb, rmd->cdb, rmd->cdb_length);
5507
5508 /* The direction is always write. */
5509 r1_request->data_direction = SOP_READ_FLAG;
5510
5511 if (encryption_info) {
5512 r1_request->encryption_enable = true;
5513 put_unaligned_le16(encryption_info->data_encryption_key_index,
5514 &r1_request->data_encryption_key_index);
5515 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5516 &r1_request->encrypt_tweak_lower);
5517 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5518 &r1_request->encrypt_tweak_upper);
5519 }
5520
5521 rc = pqi_build_aio_r1_sg_list(ctrl_info, r1_request, scmd, io_request);
5522 if (rc) {
5523 pqi_free_io_request(io_request);
5524 return SCSI_MLQUEUE_HOST_BUSY;
5525 }
5526
5527 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5528
5529 return 0;
5530 }
5531
pqi_aio_submit_r56_write_io(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd,struct pqi_queue_group * queue_group,struct pqi_encryption_info * encryption_info,struct pqi_scsi_dev * device,struct pqi_scsi_dev_raid_map_data * rmd)5532 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info,
5533 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group,
5534 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device,
5535 struct pqi_scsi_dev_raid_map_data *rmd)
5536 {
5537 int rc;
5538 struct pqi_io_request *io_request;
5539 struct pqi_aio_r56_path_request *r56_request;
5540
5541 io_request = pqi_alloc_io_request(ctrl_info);
5542 io_request->io_complete_callback = pqi_aio_io_complete;
5543 io_request->scmd = scmd;
5544 io_request->raid_bypass = true;
5545
5546 r56_request = io_request->iu;
5547 memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors));
5548
5549 if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51)
5550 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO;
5551 else
5552 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO;
5553
5554 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id);
5555 put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus);
5556 put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus);
5557 if (rmd->raid_level == SA_RAID_6) {
5558 put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus);
5559 r56_request->xor_multiplier = rmd->xor_mult;
5560 }
5561 put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length);
5562 r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
5563 put_unaligned_le64(rmd->row, &r56_request->row);
5564
5565 put_unaligned_le16(io_request->index, &r56_request->request_id);
5566 r56_request->error_index = r56_request->request_id;
5567
5568 if (rmd->cdb_length > sizeof(r56_request->cdb))
5569 rmd->cdb_length = sizeof(r56_request->cdb);
5570 r56_request->cdb_length = rmd->cdb_length;
5571 memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length);
5572
5573 /* The direction is always write. */
5574 r56_request->data_direction = SOP_READ_FLAG;
5575
5576 if (encryption_info) {
5577 r56_request->encryption_enable = true;
5578 put_unaligned_le16(encryption_info->data_encryption_key_index,
5579 &r56_request->data_encryption_key_index);
5580 put_unaligned_le32(encryption_info->encrypt_tweak_lower,
5581 &r56_request->encrypt_tweak_lower);
5582 put_unaligned_le32(encryption_info->encrypt_tweak_upper,
5583 &r56_request->encrypt_tweak_upper);
5584 }
5585
5586 rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request);
5587 if (rc) {
5588 pqi_free_io_request(io_request);
5589 return SCSI_MLQUEUE_HOST_BUSY;
5590 }
5591
5592 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request);
5593
5594 return 0;
5595 }
5596
pqi_get_hw_queue(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd)5597 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info,
5598 struct scsi_cmnd *scmd)
5599 {
5600 u16 hw_queue;
5601
5602 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scsi_cmd_to_rq(scmd)));
5603 if (hw_queue > ctrl_info->max_hw_queue_index)
5604 hw_queue = 0;
5605
5606 return hw_queue;
5607 }
5608
pqi_is_bypass_eligible_request(struct scsi_cmnd * scmd)5609 static inline bool pqi_is_bypass_eligible_request(struct scsi_cmnd *scmd)
5610 {
5611 if (blk_rq_is_passthrough(scsi_cmd_to_rq(scmd)))
5612 return false;
5613
5614 return scmd->SCp.this_residual == 0;
5615 }
5616
5617 /*
5618 * This function gets called just before we hand the completed SCSI request
5619 * back to the SML.
5620 */
5621
pqi_prep_for_scsi_done(struct scsi_cmnd * scmd)5622 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd)
5623 {
5624 struct pqi_scsi_dev *device;
5625
5626 if (!scmd->device) {
5627 set_host_byte(scmd, DID_NO_CONNECT);
5628 return;
5629 }
5630
5631 device = scmd->device->hostdata;
5632 if (!device) {
5633 set_host_byte(scmd, DID_NO_CONNECT);
5634 return;
5635 }
5636
5637 atomic_dec(&device->scsi_cmds_outstanding);
5638 }
5639
pqi_is_parity_write_stream(struct pqi_ctrl_info * ctrl_info,struct scsi_cmnd * scmd)5640 static bool pqi_is_parity_write_stream(struct pqi_ctrl_info *ctrl_info,
5641 struct scsi_cmnd *scmd)
5642 {
5643 u32 oldest_jiffies;
5644 u8 lru_index;
5645 int i;
5646 int rc;
5647 struct pqi_scsi_dev *device;
5648 struct pqi_stream_data *pqi_stream_data;
5649 struct pqi_scsi_dev_raid_map_data rmd;
5650
5651 if (!ctrl_info->enable_stream_detection)
5652 return false;
5653
5654 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd);
5655 if (rc)
5656 return false;
5657
5658 /* Check writes only. */
5659 if (!rmd.is_write)
5660 return false;
5661
5662 device = scmd->device->hostdata;
5663
5664 /* Check for RAID 5/6 streams. */
5665 if (device->raid_level != SA_RAID_5 && device->raid_level != SA_RAID_6)
5666 return false;
5667
5668 /*
5669 * If controller does not support AIO RAID{5,6} writes, need to send
5670 * requests down non-AIO path.
5671 */
5672 if ((device->raid_level == SA_RAID_5 && !ctrl_info->enable_r5_writes) ||
5673 (device->raid_level == SA_RAID_6 && !ctrl_info->enable_r6_writes))
5674 return true;
5675
5676 lru_index = 0;
5677 oldest_jiffies = INT_MAX;
5678 for (i = 0; i < NUM_STREAMS_PER_LUN; i++) {
5679 pqi_stream_data = &device->stream_data[i];
5680 /*
5681 * Check for adjacent request or request is within
5682 * the previous request.
5683 */
5684 if ((pqi_stream_data->next_lba &&
5685 rmd.first_block >= pqi_stream_data->next_lba) &&
5686 rmd.first_block <= pqi_stream_data->next_lba +
5687 rmd.block_cnt) {
5688 pqi_stream_data->next_lba = rmd.first_block +
5689 rmd.block_cnt;
5690 pqi_stream_data->last_accessed = jiffies;
5691 return true;
5692 }
5693
5694 /* unused entry */
5695 if (pqi_stream_data->last_accessed == 0) {
5696 lru_index = i;
5697 break;
5698 }
5699
5700 /* Find entry with oldest last accessed time. */
5701 if (pqi_stream_data->last_accessed <= oldest_jiffies) {
5702 oldest_jiffies = pqi_stream_data->last_accessed;
5703 lru_index = i;
5704 }
5705 }
5706
5707 /* Set LRU entry. */
5708 pqi_stream_data = &device->stream_data[lru_index];
5709 pqi_stream_data->last_accessed = jiffies;
5710 pqi_stream_data->next_lba = rmd.first_block + rmd.block_cnt;
5711
5712 return false;
5713 }
5714
pqi_scsi_queue_command(struct Scsi_Host * shost,struct scsi_cmnd * scmd)5715 static int pqi_scsi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
5716 {
5717 int rc;
5718 struct pqi_ctrl_info *ctrl_info;
5719 struct pqi_scsi_dev *device;
5720 u16 hw_queue;
5721 struct pqi_queue_group *queue_group;
5722 bool raid_bypassed;
5723
5724 device = scmd->device->hostdata;
5725
5726 if (!device) {
5727 set_host_byte(scmd, DID_NO_CONNECT);
5728 pqi_scsi_done(scmd);
5729 return 0;
5730 }
5731
5732 atomic_inc(&device->scsi_cmds_outstanding);
5733
5734 ctrl_info = shost_to_hba(shost);
5735
5736 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(device)) {
5737 set_host_byte(scmd, DID_NO_CONNECT);
5738 pqi_scsi_done(scmd);
5739 return 0;
5740 }
5741
5742 if (pqi_ctrl_blocked(ctrl_info)) {
5743 rc = SCSI_MLQUEUE_HOST_BUSY;
5744 goto out;
5745 }
5746
5747 /*
5748 * This is necessary because the SML doesn't zero out this field during
5749 * error recovery.
5750 */
5751 scmd->result = 0;
5752
5753 hw_queue = pqi_get_hw_queue(ctrl_info, scmd);
5754 queue_group = &ctrl_info->queue_groups[hw_queue];
5755
5756 if (pqi_is_logical_device(device)) {
5757 raid_bypassed = false;
5758 if (device->raid_bypass_enabled &&
5759 pqi_is_bypass_eligible_request(scmd) &&
5760 !pqi_is_parity_write_stream(ctrl_info, scmd)) {
5761 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5762 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) {
5763 raid_bypassed = true;
5764 atomic_inc(&device->raid_bypass_cnt);
5765 }
5766 }
5767 if (!raid_bypassed)
5768 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5769 } else {
5770 if (device->aio_enabled)
5771 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5772 else
5773 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group);
5774 }
5775
5776 out:
5777 if (rc)
5778 atomic_dec(&device->scsi_cmds_outstanding);
5779
5780 return rc;
5781 }
5782
pqi_wait_until_queued_io_drained(struct pqi_ctrl_info * ctrl_info,struct pqi_queue_group * queue_group)5783 static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info,
5784 struct pqi_queue_group *queue_group)
5785 {
5786 unsigned int path;
5787 unsigned long flags;
5788 bool list_is_empty;
5789
5790 for (path = 0; path < 2; path++) {
5791 while (1) {
5792 spin_lock_irqsave(
5793 &queue_group->submit_lock[path], flags);
5794 list_is_empty =
5795 list_empty(&queue_group->request_list[path]);
5796 spin_unlock_irqrestore(
5797 &queue_group->submit_lock[path], flags);
5798 if (list_is_empty)
5799 break;
5800 pqi_check_ctrl_health(ctrl_info);
5801 if (pqi_ctrl_offline(ctrl_info))
5802 return -ENXIO;
5803 usleep_range(1000, 2000);
5804 }
5805 }
5806
5807 return 0;
5808 }
5809
pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info * ctrl_info)5810 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info)
5811 {
5812 int rc;
5813 unsigned int i;
5814 unsigned int path;
5815 struct pqi_queue_group *queue_group;
5816 pqi_index_t iq_pi;
5817 pqi_index_t iq_ci;
5818
5819 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5820 queue_group = &ctrl_info->queue_groups[i];
5821
5822 rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group);
5823 if (rc)
5824 return rc;
5825
5826 for (path = 0; path < 2; path++) {
5827 iq_pi = queue_group->iq_pi_copy[path];
5828
5829 while (1) {
5830 iq_ci = readl(queue_group->iq_ci[path]);
5831 if (iq_ci == iq_pi)
5832 break;
5833 pqi_check_ctrl_health(ctrl_info);
5834 if (pqi_ctrl_offline(ctrl_info))
5835 return -ENXIO;
5836 usleep_range(1000, 2000);
5837 }
5838 }
5839 }
5840
5841 return 0;
5842 }
5843
pqi_fail_io_queued_for_device(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)5844 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info,
5845 struct pqi_scsi_dev *device)
5846 {
5847 unsigned int i;
5848 unsigned int path;
5849 struct pqi_queue_group *queue_group;
5850 unsigned long flags;
5851 struct pqi_io_request *io_request;
5852 struct pqi_io_request *next;
5853 struct scsi_cmnd *scmd;
5854 struct pqi_scsi_dev *scsi_device;
5855
5856 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
5857 queue_group = &ctrl_info->queue_groups[i];
5858
5859 for (path = 0; path < 2; path++) {
5860 spin_lock_irqsave(
5861 &queue_group->submit_lock[path], flags);
5862
5863 list_for_each_entry_safe(io_request, next,
5864 &queue_group->request_list[path],
5865 request_list_entry) {
5866
5867 scmd = io_request->scmd;
5868 if (!scmd)
5869 continue;
5870
5871 scsi_device = scmd->device->hostdata;
5872 if (scsi_device != device)
5873 continue;
5874
5875 list_del(&io_request->request_list_entry);
5876 set_host_byte(scmd, DID_RESET);
5877 pqi_free_io_request(io_request);
5878 scsi_dma_unmap(scmd);
5879 pqi_scsi_done(scmd);
5880 }
5881
5882 spin_unlock_irqrestore(
5883 &queue_group->submit_lock[path], flags);
5884 }
5885 }
5886 }
5887
5888 #define PQI_PENDING_IO_WARNING_TIMEOUT_SECS 10
5889
pqi_device_wait_for_pending_io(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,unsigned long timeout_msecs)5890 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info,
5891 struct pqi_scsi_dev *device, unsigned long timeout_msecs)
5892 {
5893 int cmds_outstanding;
5894 unsigned long start_jiffies;
5895 unsigned long warning_timeout;
5896 unsigned long msecs_waiting;
5897
5898 start_jiffies = jiffies;
5899 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * PQI_HZ) + start_jiffies;
5900
5901 while ((cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding)) > 0) {
5902 pqi_check_ctrl_health(ctrl_info);
5903 if (pqi_ctrl_offline(ctrl_info))
5904 return -ENXIO;
5905 msecs_waiting = jiffies_to_msecs(jiffies - start_jiffies);
5906 if (msecs_waiting > timeout_msecs) {
5907 dev_err(&ctrl_info->pci_dev->dev,
5908 "scsi %d:%d:%d:%d: timed out after %lu seconds waiting for %d outstanding command(s)\n",
5909 ctrl_info->scsi_host->host_no, device->bus, device->target,
5910 device->lun, msecs_waiting / 1000, cmds_outstanding);
5911 return -ETIMEDOUT;
5912 }
5913 if (time_after(jiffies, warning_timeout)) {
5914 dev_warn(&ctrl_info->pci_dev->dev,
5915 "scsi %d:%d:%d:%d: waiting %lu seconds for %d outstanding command(s)\n",
5916 ctrl_info->scsi_host->host_no, device->bus, device->target,
5917 device->lun, msecs_waiting / 1000, cmds_outstanding);
5918 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * PQI_HZ) + jiffies;
5919 }
5920 usleep_range(1000, 2000);
5921 }
5922
5923 return 0;
5924 }
5925
pqi_lun_reset_complete(struct pqi_io_request * io_request,void * context)5926 static void pqi_lun_reset_complete(struct pqi_io_request *io_request,
5927 void *context)
5928 {
5929 struct completion *waiting = context;
5930
5931 complete(waiting);
5932 }
5933
5934 #define PQI_LUN_RESET_POLL_COMPLETION_SECS 10
5935
pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device,struct completion * wait)5936 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info,
5937 struct pqi_scsi_dev *device, struct completion *wait)
5938 {
5939 int rc;
5940 unsigned int wait_secs;
5941
5942 wait_secs = 0;
5943
5944 while (1) {
5945 if (wait_for_completion_io_timeout(wait,
5946 PQI_LUN_RESET_POLL_COMPLETION_SECS * PQI_HZ)) {
5947 rc = 0;
5948 break;
5949 }
5950
5951 pqi_check_ctrl_health(ctrl_info);
5952 if (pqi_ctrl_offline(ctrl_info)) {
5953 rc = -ENXIO;
5954 break;
5955 }
5956
5957 wait_secs += PQI_LUN_RESET_POLL_COMPLETION_SECS;
5958
5959 dev_warn(&ctrl_info->pci_dev->dev,
5960 "scsi %d:%d:%d:%d: waiting %u seconds for LUN reset to complete\n",
5961 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun,
5962 wait_secs);
5963 }
5964
5965 return rc;
5966 }
5967
5968 #define PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS 30
5969
pqi_lun_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)5970 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device)
5971 {
5972 int rc;
5973 struct pqi_io_request *io_request;
5974 DECLARE_COMPLETION_ONSTACK(wait);
5975 struct pqi_task_management_request *request;
5976
5977 io_request = pqi_alloc_io_request(ctrl_info);
5978 io_request->io_complete_callback = pqi_lun_reset_complete;
5979 io_request->context = &wait;
5980
5981 request = io_request->iu;
5982 memset(request, 0, sizeof(*request));
5983
5984 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT;
5985 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH,
5986 &request->header.iu_length);
5987 put_unaligned_le16(io_request->index, &request->request_id);
5988 memcpy(request->lun_number, device->scsi3addr,
5989 sizeof(request->lun_number));
5990 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET;
5991 if (ctrl_info->tmf_iu_timeout_supported)
5992 put_unaligned_le16(PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS, &request->timeout);
5993
5994 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH,
5995 io_request);
5996
5997 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait);
5998 if (rc == 0)
5999 rc = io_request->status;
6000
6001 pqi_free_io_request(io_request);
6002
6003 return rc;
6004 }
6005
6006 #define PQI_LUN_RESET_RETRIES 3
6007 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS (10 * 1000)
6008 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS (10 * 60 * 1000)
6009 #define PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS (2 * 60 * 1000)
6010
pqi_lun_reset_with_retries(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)6011 static int pqi_lun_reset_with_retries(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device)
6012 {
6013 int reset_rc;
6014 int wait_rc;
6015 unsigned int retries;
6016 unsigned long timeout_msecs;
6017
6018 for (retries = 0;;) {
6019 reset_rc = pqi_lun_reset(ctrl_info, device);
6020 if (reset_rc == 0 || ++retries > PQI_LUN_RESET_RETRIES)
6021 break;
6022 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS);
6023 }
6024
6025 timeout_msecs = reset_rc ? PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS :
6026 PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS;
6027
6028 wait_rc = pqi_device_wait_for_pending_io(ctrl_info, device, timeout_msecs);
6029 if (wait_rc && reset_rc == 0)
6030 reset_rc = wait_rc;
6031
6032 return reset_rc == 0 ? SUCCESS : FAILED;
6033 }
6034
pqi_device_reset(struct pqi_ctrl_info * ctrl_info,struct pqi_scsi_dev * device)6035 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info,
6036 struct pqi_scsi_dev *device)
6037 {
6038 int rc;
6039
6040 pqi_ctrl_block_requests(ctrl_info);
6041 pqi_ctrl_wait_until_quiesced(ctrl_info);
6042 pqi_fail_io_queued_for_device(ctrl_info, device);
6043 rc = pqi_wait_until_inbound_queues_empty(ctrl_info);
6044 if (rc)
6045 rc = FAILED;
6046 else
6047 rc = pqi_lun_reset_with_retries(ctrl_info, device);
6048 pqi_ctrl_unblock_requests(ctrl_info);
6049
6050 return rc;
6051 }
6052
pqi_eh_device_reset_handler(struct scsi_cmnd * scmd)6053 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd)
6054 {
6055 int rc;
6056 struct Scsi_Host *shost;
6057 struct pqi_ctrl_info *ctrl_info;
6058 struct pqi_scsi_dev *device;
6059
6060 shost = scmd->device->host;
6061 ctrl_info = shost_to_hba(shost);
6062 device = scmd->device->hostdata;
6063
6064 mutex_lock(&ctrl_info->lun_reset_mutex);
6065
6066 dev_err(&ctrl_info->pci_dev->dev,
6067 "resetting scsi %d:%d:%d:%d due to cmd 0x%02x\n",
6068 shost->host_no,
6069 device->bus, device->target, device->lun,
6070 scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff);
6071
6072 pqi_check_ctrl_health(ctrl_info);
6073 if (pqi_ctrl_offline(ctrl_info))
6074 rc = FAILED;
6075 else
6076 rc = pqi_device_reset(ctrl_info, device);
6077
6078 dev_err(&ctrl_info->pci_dev->dev,
6079 "reset of scsi %d:%d:%d:%d: %s\n",
6080 shost->host_no, device->bus, device->target, device->lun,
6081 rc == SUCCESS ? "SUCCESS" : "FAILED");
6082
6083 mutex_unlock(&ctrl_info->lun_reset_mutex);
6084
6085 return rc;
6086 }
6087
pqi_slave_alloc(struct scsi_device * sdev)6088 static int pqi_slave_alloc(struct scsi_device *sdev)
6089 {
6090 struct pqi_scsi_dev *device;
6091 unsigned long flags;
6092 struct pqi_ctrl_info *ctrl_info;
6093 struct scsi_target *starget;
6094 struct sas_rphy *rphy;
6095
6096 ctrl_info = shost_to_hba(sdev->host);
6097
6098 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6099
6100 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) {
6101 starget = scsi_target(sdev);
6102 rphy = target_to_rphy(starget);
6103 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy);
6104 if (device) {
6105 device->target = sdev_id(sdev);
6106 device->lun = sdev->lun;
6107 device->target_lun_valid = true;
6108 }
6109 } else {
6110 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev),
6111 sdev_id(sdev), sdev->lun);
6112 }
6113
6114 if (device) {
6115 sdev->hostdata = device;
6116 device->sdev = sdev;
6117 if (device->queue_depth) {
6118 device->advertised_queue_depth = device->queue_depth;
6119 scsi_change_queue_depth(sdev,
6120 device->advertised_queue_depth);
6121 }
6122 if (pqi_is_logical_device(device)) {
6123 pqi_disable_write_same(sdev);
6124 } else {
6125 sdev->allow_restart = 1;
6126 if (device->device_type == SA_DEVICE_TYPE_NVME)
6127 pqi_disable_write_same(sdev);
6128 }
6129 }
6130
6131 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6132
6133 return 0;
6134 }
6135
pqi_map_queues(struct Scsi_Host * shost)6136 static int pqi_map_queues(struct Scsi_Host *shost)
6137 {
6138 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6139
6140 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT],
6141 ctrl_info->pci_dev, 0);
6142 }
6143
pqi_slave_configure(struct scsi_device * sdev)6144 static int pqi_slave_configure(struct scsi_device *sdev)
6145 {
6146 struct pqi_scsi_dev *device;
6147
6148 device = sdev->hostdata;
6149 device->devtype = sdev->type;
6150
6151 return 0;
6152 }
6153
pqi_slave_destroy(struct scsi_device * sdev)6154 static void pqi_slave_destroy(struct scsi_device *sdev)
6155 {
6156 unsigned long flags;
6157 struct pqi_scsi_dev *device;
6158 struct pqi_ctrl_info *ctrl_info;
6159
6160 ctrl_info = shost_to_hba(sdev->host);
6161
6162 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6163
6164 device = sdev->hostdata;
6165 if (device) {
6166 sdev->hostdata = NULL;
6167 if (!list_empty(&device->scsi_device_list_entry))
6168 list_del(&device->scsi_device_list_entry);
6169 }
6170
6171 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6172
6173 if (device) {
6174 pqi_dev_info(ctrl_info, "removed", device);
6175 pqi_free_device(device);
6176 }
6177 }
6178
pqi_getpciinfo_ioctl(struct pqi_ctrl_info * ctrl_info,void __user * arg)6179 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
6180 {
6181 struct pci_dev *pci_dev;
6182 u32 subsystem_vendor;
6183 u32 subsystem_device;
6184 cciss_pci_info_struct pciinfo;
6185
6186 if (!arg)
6187 return -EINVAL;
6188
6189 pci_dev = ctrl_info->pci_dev;
6190
6191 pciinfo.domain = pci_domain_nr(pci_dev->bus);
6192 pciinfo.bus = pci_dev->bus->number;
6193 pciinfo.dev_fn = pci_dev->devfn;
6194 subsystem_vendor = pci_dev->subsystem_vendor;
6195 subsystem_device = pci_dev->subsystem_device;
6196 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor;
6197
6198 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo)))
6199 return -EFAULT;
6200
6201 return 0;
6202 }
6203
pqi_getdrivver_ioctl(void __user * arg)6204 static int pqi_getdrivver_ioctl(void __user *arg)
6205 {
6206 u32 version;
6207
6208 if (!arg)
6209 return -EINVAL;
6210
6211 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) |
6212 (DRIVER_RELEASE << 16) | DRIVER_REVISION;
6213
6214 if (copy_to_user(arg, &version, sizeof(version)))
6215 return -EFAULT;
6216
6217 return 0;
6218 }
6219
6220 struct ciss_error_info {
6221 u8 scsi_status;
6222 int command_status;
6223 size_t sense_data_length;
6224 };
6225
pqi_error_info_to_ciss(struct pqi_raid_error_info * pqi_error_info,struct ciss_error_info * ciss_error_info)6226 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info,
6227 struct ciss_error_info *ciss_error_info)
6228 {
6229 int ciss_cmd_status;
6230 size_t sense_data_length;
6231
6232 switch (pqi_error_info->data_out_result) {
6233 case PQI_DATA_IN_OUT_GOOD:
6234 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS;
6235 break;
6236 case PQI_DATA_IN_OUT_UNDERFLOW:
6237 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN;
6238 break;
6239 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW:
6240 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN;
6241 break;
6242 case PQI_DATA_IN_OUT_PROTOCOL_ERROR:
6243 case PQI_DATA_IN_OUT_BUFFER_ERROR:
6244 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA:
6245 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE:
6246 case PQI_DATA_IN_OUT_ERROR:
6247 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR;
6248 break;
6249 case PQI_DATA_IN_OUT_HARDWARE_ERROR:
6250 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR:
6251 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT:
6252 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED:
6253 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED:
6254 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED:
6255 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST:
6256 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION:
6257 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED:
6258 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ:
6259 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR;
6260 break;
6261 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT:
6262 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT;
6263 break;
6264 case PQI_DATA_IN_OUT_ABORTED:
6265 ciss_cmd_status = CISS_CMD_STATUS_ABORTED;
6266 break;
6267 case PQI_DATA_IN_OUT_TIMEOUT:
6268 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT;
6269 break;
6270 default:
6271 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS;
6272 break;
6273 }
6274
6275 sense_data_length =
6276 get_unaligned_le16(&pqi_error_info->sense_data_length);
6277 if (sense_data_length == 0)
6278 sense_data_length =
6279 get_unaligned_le16(&pqi_error_info->response_data_length);
6280 if (sense_data_length)
6281 if (sense_data_length > sizeof(pqi_error_info->data))
6282 sense_data_length = sizeof(pqi_error_info->data);
6283
6284 ciss_error_info->scsi_status = pqi_error_info->status;
6285 ciss_error_info->command_status = ciss_cmd_status;
6286 ciss_error_info->sense_data_length = sense_data_length;
6287 }
6288
pqi_passthru_ioctl(struct pqi_ctrl_info * ctrl_info,void __user * arg)6289 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg)
6290 {
6291 int rc;
6292 char *kernel_buffer = NULL;
6293 u16 iu_length;
6294 size_t sense_data_length;
6295 IOCTL_Command_struct iocommand;
6296 struct pqi_raid_path_request request;
6297 struct pqi_raid_error_info pqi_error_info;
6298 struct ciss_error_info ciss_error_info;
6299
6300 if (pqi_ctrl_offline(ctrl_info))
6301 return -ENXIO;
6302 if (pqi_ofa_in_progress(ctrl_info) && pqi_ctrl_blocked(ctrl_info))
6303 return -EBUSY;
6304 if (!arg)
6305 return -EINVAL;
6306 if (!capable(CAP_SYS_RAWIO))
6307 return -EPERM;
6308 if (copy_from_user(&iocommand, arg, sizeof(iocommand)))
6309 return -EFAULT;
6310 if (iocommand.buf_size < 1 &&
6311 iocommand.Request.Type.Direction != XFER_NONE)
6312 return -EINVAL;
6313 if (iocommand.Request.CDBLen > sizeof(request.cdb))
6314 return -EINVAL;
6315 if (iocommand.Request.Type.Type != TYPE_CMD)
6316 return -EINVAL;
6317
6318 switch (iocommand.Request.Type.Direction) {
6319 case XFER_NONE:
6320 case XFER_WRITE:
6321 case XFER_READ:
6322 case XFER_READ | XFER_WRITE:
6323 break;
6324 default:
6325 return -EINVAL;
6326 }
6327
6328 if (iocommand.buf_size > 0) {
6329 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL);
6330 if (!kernel_buffer)
6331 return -ENOMEM;
6332 if (iocommand.Request.Type.Direction & XFER_WRITE) {
6333 if (copy_from_user(kernel_buffer, iocommand.buf,
6334 iocommand.buf_size)) {
6335 rc = -EFAULT;
6336 goto out;
6337 }
6338 } else {
6339 memset(kernel_buffer, 0, iocommand.buf_size);
6340 }
6341 }
6342
6343 memset(&request, 0, sizeof(request));
6344
6345 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO;
6346 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) -
6347 PQI_REQUEST_HEADER_LENGTH;
6348 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes,
6349 sizeof(request.lun_number));
6350 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen);
6351 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0;
6352
6353 switch (iocommand.Request.Type.Direction) {
6354 case XFER_NONE:
6355 request.data_direction = SOP_NO_DIRECTION_FLAG;
6356 break;
6357 case XFER_WRITE:
6358 request.data_direction = SOP_WRITE_FLAG;
6359 break;
6360 case XFER_READ:
6361 request.data_direction = SOP_READ_FLAG;
6362 break;
6363 case XFER_READ | XFER_WRITE:
6364 request.data_direction = SOP_BIDIRECTIONAL;
6365 break;
6366 }
6367
6368 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE;
6369
6370 if (iocommand.buf_size > 0) {
6371 put_unaligned_le32(iocommand.buf_size, &request.buffer_length);
6372
6373 rc = pqi_map_single(ctrl_info->pci_dev,
6374 &request.sg_descriptors[0], kernel_buffer,
6375 iocommand.buf_size, DMA_BIDIRECTIONAL);
6376 if (rc)
6377 goto out;
6378
6379 iu_length += sizeof(request.sg_descriptors[0]);
6380 }
6381
6382 put_unaligned_le16(iu_length, &request.header.iu_length);
6383
6384 if (ctrl_info->raid_iu_timeout_supported)
6385 put_unaligned_le32(iocommand.Request.Timeout, &request.timeout);
6386
6387 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header,
6388 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info);
6389
6390 if (iocommand.buf_size > 0)
6391 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1,
6392 DMA_BIDIRECTIONAL);
6393
6394 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info));
6395
6396 if (rc == 0) {
6397 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info);
6398 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status;
6399 iocommand.error_info.CommandStatus =
6400 ciss_error_info.command_status;
6401 sense_data_length = ciss_error_info.sense_data_length;
6402 if (sense_data_length) {
6403 if (sense_data_length >
6404 sizeof(iocommand.error_info.SenseInfo))
6405 sense_data_length =
6406 sizeof(iocommand.error_info.SenseInfo);
6407 memcpy(iocommand.error_info.SenseInfo,
6408 pqi_error_info.data, sense_data_length);
6409 iocommand.error_info.SenseLen = sense_data_length;
6410 }
6411 }
6412
6413 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) {
6414 rc = -EFAULT;
6415 goto out;
6416 }
6417
6418 if (rc == 0 && iocommand.buf_size > 0 &&
6419 (iocommand.Request.Type.Direction & XFER_READ)) {
6420 if (copy_to_user(iocommand.buf, kernel_buffer,
6421 iocommand.buf_size)) {
6422 rc = -EFAULT;
6423 }
6424 }
6425
6426 out:
6427 kfree(kernel_buffer);
6428
6429 return rc;
6430 }
6431
pqi_ioctl(struct scsi_device * sdev,unsigned int cmd,void __user * arg)6432 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd,
6433 void __user *arg)
6434 {
6435 int rc;
6436 struct pqi_ctrl_info *ctrl_info;
6437
6438 ctrl_info = shost_to_hba(sdev->host);
6439
6440 switch (cmd) {
6441 case CCISS_DEREGDISK:
6442 case CCISS_REGNEWDISK:
6443 case CCISS_REGNEWD:
6444 rc = pqi_scan_scsi_devices(ctrl_info);
6445 break;
6446 case CCISS_GETPCIINFO:
6447 rc = pqi_getpciinfo_ioctl(ctrl_info, arg);
6448 break;
6449 case CCISS_GETDRIVVER:
6450 rc = pqi_getdrivver_ioctl(arg);
6451 break;
6452 case CCISS_PASSTHRU:
6453 rc = pqi_passthru_ioctl(ctrl_info, arg);
6454 break;
6455 default:
6456 rc = -EINVAL;
6457 break;
6458 }
6459
6460 return rc;
6461 }
6462
pqi_firmware_version_show(struct device * dev,struct device_attribute * attr,char * buffer)6463 static ssize_t pqi_firmware_version_show(struct device *dev,
6464 struct device_attribute *attr, char *buffer)
6465 {
6466 struct Scsi_Host *shost;
6467 struct pqi_ctrl_info *ctrl_info;
6468
6469 shost = class_to_shost(dev);
6470 ctrl_info = shost_to_hba(shost);
6471
6472 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version);
6473 }
6474
pqi_driver_version_show(struct device * dev,struct device_attribute * attr,char * buffer)6475 static ssize_t pqi_driver_version_show(struct device *dev,
6476 struct device_attribute *attr, char *buffer)
6477 {
6478 return scnprintf(buffer, PAGE_SIZE, "%s\n", DRIVER_VERSION BUILD_TIMESTAMP);
6479 }
6480
pqi_serial_number_show(struct device * dev,struct device_attribute * attr,char * buffer)6481 static ssize_t pqi_serial_number_show(struct device *dev,
6482 struct device_attribute *attr, char *buffer)
6483 {
6484 struct Scsi_Host *shost;
6485 struct pqi_ctrl_info *ctrl_info;
6486
6487 shost = class_to_shost(dev);
6488 ctrl_info = shost_to_hba(shost);
6489
6490 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number);
6491 }
6492
pqi_model_show(struct device * dev,struct device_attribute * attr,char * buffer)6493 static ssize_t pqi_model_show(struct device *dev,
6494 struct device_attribute *attr, char *buffer)
6495 {
6496 struct Scsi_Host *shost;
6497 struct pqi_ctrl_info *ctrl_info;
6498
6499 shost = class_to_shost(dev);
6500 ctrl_info = shost_to_hba(shost);
6501
6502 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model);
6503 }
6504
pqi_vendor_show(struct device * dev,struct device_attribute * attr,char * buffer)6505 static ssize_t pqi_vendor_show(struct device *dev,
6506 struct device_attribute *attr, char *buffer)
6507 {
6508 struct Scsi_Host *shost;
6509 struct pqi_ctrl_info *ctrl_info;
6510
6511 shost = class_to_shost(dev);
6512 ctrl_info = shost_to_hba(shost);
6513
6514 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor);
6515 }
6516
pqi_host_rescan_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6517 static ssize_t pqi_host_rescan_store(struct device *dev,
6518 struct device_attribute *attr, const char *buffer, size_t count)
6519 {
6520 struct Scsi_Host *shost = class_to_shost(dev);
6521
6522 pqi_scan_start(shost);
6523
6524 return count;
6525 }
6526
pqi_lockup_action_show(struct device * dev,struct device_attribute * attr,char * buffer)6527 static ssize_t pqi_lockup_action_show(struct device *dev,
6528 struct device_attribute *attr, char *buffer)
6529 {
6530 int count = 0;
6531 unsigned int i;
6532
6533 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6534 if (pqi_lockup_actions[i].action == pqi_lockup_action)
6535 count += scnprintf(buffer + count, PAGE_SIZE - count,
6536 "[%s] ", pqi_lockup_actions[i].name);
6537 else
6538 count += scnprintf(buffer + count, PAGE_SIZE - count,
6539 "%s ", pqi_lockup_actions[i].name);
6540 }
6541
6542 count += scnprintf(buffer + count, PAGE_SIZE - count, "\n");
6543
6544 return count;
6545 }
6546
pqi_lockup_action_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6547 static ssize_t pqi_lockup_action_store(struct device *dev,
6548 struct device_attribute *attr, const char *buffer, size_t count)
6549 {
6550 unsigned int i;
6551 char *action_name;
6552 char action_name_buffer[32];
6553
6554 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer));
6555 action_name = strstrip(action_name_buffer);
6556
6557 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
6558 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) {
6559 pqi_lockup_action = pqi_lockup_actions[i].action;
6560 return count;
6561 }
6562 }
6563
6564 return -EINVAL;
6565 }
6566
pqi_host_enable_stream_detection_show(struct device * dev,struct device_attribute * attr,char * buffer)6567 static ssize_t pqi_host_enable_stream_detection_show(struct device *dev,
6568 struct device_attribute *attr, char *buffer)
6569 {
6570 struct Scsi_Host *shost = class_to_shost(dev);
6571 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6572
6573 return scnprintf(buffer, 10, "%x\n",
6574 ctrl_info->enable_stream_detection);
6575 }
6576
pqi_host_enable_stream_detection_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6577 static ssize_t pqi_host_enable_stream_detection_store(struct device *dev,
6578 struct device_attribute *attr, const char *buffer, size_t count)
6579 {
6580 struct Scsi_Host *shost = class_to_shost(dev);
6581 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6582 u8 set_stream_detection = 0;
6583
6584 if (kstrtou8(buffer, 0, &set_stream_detection))
6585 return -EINVAL;
6586
6587 if (set_stream_detection > 0)
6588 set_stream_detection = 1;
6589
6590 ctrl_info->enable_stream_detection = set_stream_detection;
6591
6592 return count;
6593 }
6594
pqi_host_enable_r5_writes_show(struct device * dev,struct device_attribute * attr,char * buffer)6595 static ssize_t pqi_host_enable_r5_writes_show(struct device *dev,
6596 struct device_attribute *attr, char *buffer)
6597 {
6598 struct Scsi_Host *shost = class_to_shost(dev);
6599 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6600
6601 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes);
6602 }
6603
pqi_host_enable_r5_writes_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6604 static ssize_t pqi_host_enable_r5_writes_store(struct device *dev,
6605 struct device_attribute *attr, const char *buffer, size_t count)
6606 {
6607 struct Scsi_Host *shost = class_to_shost(dev);
6608 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6609 u8 set_r5_writes = 0;
6610
6611 if (kstrtou8(buffer, 0, &set_r5_writes))
6612 return -EINVAL;
6613
6614 if (set_r5_writes > 0)
6615 set_r5_writes = 1;
6616
6617 ctrl_info->enable_r5_writes = set_r5_writes;
6618
6619 return count;
6620 }
6621
pqi_host_enable_r6_writes_show(struct device * dev,struct device_attribute * attr,char * buffer)6622 static ssize_t pqi_host_enable_r6_writes_show(struct device *dev,
6623 struct device_attribute *attr, char *buffer)
6624 {
6625 struct Scsi_Host *shost = class_to_shost(dev);
6626 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6627
6628 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes);
6629 }
6630
pqi_host_enable_r6_writes_store(struct device * dev,struct device_attribute * attr,const char * buffer,size_t count)6631 static ssize_t pqi_host_enable_r6_writes_store(struct device *dev,
6632 struct device_attribute *attr, const char *buffer, size_t count)
6633 {
6634 struct Scsi_Host *shost = class_to_shost(dev);
6635 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost);
6636 u8 set_r6_writes = 0;
6637
6638 if (kstrtou8(buffer, 0, &set_r6_writes))
6639 return -EINVAL;
6640
6641 if (set_r6_writes > 0)
6642 set_r6_writes = 1;
6643
6644 ctrl_info->enable_r6_writes = set_r6_writes;
6645
6646 return count;
6647 }
6648
6649 static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL);
6650 static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL);
6651 static DEVICE_ATTR(model, 0444, pqi_model_show, NULL);
6652 static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL);
6653 static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL);
6654 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store);
6655 static DEVICE_ATTR(lockup_action, 0644, pqi_lockup_action_show,
6656 pqi_lockup_action_store);
6657 static DEVICE_ATTR(enable_stream_detection, 0644,
6658 pqi_host_enable_stream_detection_show,
6659 pqi_host_enable_stream_detection_store);
6660 static DEVICE_ATTR(enable_r5_writes, 0644,
6661 pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store);
6662 static DEVICE_ATTR(enable_r6_writes, 0644,
6663 pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store);
6664
6665 static struct device_attribute *pqi_shost_attrs[] = {
6666 &dev_attr_driver_version,
6667 &dev_attr_firmware_version,
6668 &dev_attr_model,
6669 &dev_attr_serial_number,
6670 &dev_attr_vendor,
6671 &dev_attr_rescan,
6672 &dev_attr_lockup_action,
6673 &dev_attr_enable_stream_detection,
6674 &dev_attr_enable_r5_writes,
6675 &dev_attr_enable_r6_writes,
6676 NULL
6677 };
6678
pqi_unique_id_show(struct device * dev,struct device_attribute * attr,char * buffer)6679 static ssize_t pqi_unique_id_show(struct device *dev,
6680 struct device_attribute *attr, char *buffer)
6681 {
6682 struct pqi_ctrl_info *ctrl_info;
6683 struct scsi_device *sdev;
6684 struct pqi_scsi_dev *device;
6685 unsigned long flags;
6686 u8 unique_id[16];
6687
6688 sdev = to_scsi_device(dev);
6689 ctrl_info = shost_to_hba(sdev->host);
6690
6691 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6692
6693 device = sdev->hostdata;
6694 if (!device) {
6695 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6696 return -ENODEV;
6697 }
6698
6699 if (device->is_physical_device) {
6700 memset(unique_id, 0, 8);
6701 memcpy(unique_id + 8, &device->wwid, sizeof(device->wwid));
6702 } else {
6703 memcpy(unique_id, device->volume_id, sizeof(device->volume_id));
6704 }
6705
6706 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6707
6708 return scnprintf(buffer, PAGE_SIZE,
6709 "%02X%02X%02X%02X%02X%02X%02X%02X"
6710 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
6711 unique_id[0], unique_id[1], unique_id[2], unique_id[3],
6712 unique_id[4], unique_id[5], unique_id[6], unique_id[7],
6713 unique_id[8], unique_id[9], unique_id[10], unique_id[11],
6714 unique_id[12], unique_id[13], unique_id[14], unique_id[15]);
6715 }
6716
pqi_lunid_show(struct device * dev,struct device_attribute * attr,char * buffer)6717 static ssize_t pqi_lunid_show(struct device *dev,
6718 struct device_attribute *attr, char *buffer)
6719 {
6720 struct pqi_ctrl_info *ctrl_info;
6721 struct scsi_device *sdev;
6722 struct pqi_scsi_dev *device;
6723 unsigned long flags;
6724 u8 lunid[8];
6725
6726 sdev = to_scsi_device(dev);
6727 ctrl_info = shost_to_hba(sdev->host);
6728
6729 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6730
6731 device = sdev->hostdata;
6732 if (!device) {
6733 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6734 return -ENODEV;
6735 }
6736
6737 memcpy(lunid, device->scsi3addr, sizeof(lunid));
6738
6739 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6740
6741 return scnprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid);
6742 }
6743
6744 #define MAX_PATHS 8
6745
pqi_path_info_show(struct device * dev,struct device_attribute * attr,char * buf)6746 static ssize_t pqi_path_info_show(struct device *dev,
6747 struct device_attribute *attr, char *buf)
6748 {
6749 struct pqi_ctrl_info *ctrl_info;
6750 struct scsi_device *sdev;
6751 struct pqi_scsi_dev *device;
6752 unsigned long flags;
6753 int i;
6754 int output_len = 0;
6755 u8 box;
6756 u8 bay;
6757 u8 path_map_index;
6758 char *active;
6759 u8 phys_connector[2];
6760
6761 sdev = to_scsi_device(dev);
6762 ctrl_info = shost_to_hba(sdev->host);
6763
6764 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6765
6766 device = sdev->hostdata;
6767 if (!device) {
6768 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6769 return -ENODEV;
6770 }
6771
6772 bay = device->bay;
6773 for (i = 0; i < MAX_PATHS; i++) {
6774 path_map_index = 1 << i;
6775 if (i == device->active_path_index)
6776 active = "Active";
6777 else if (device->path_map & path_map_index)
6778 active = "Inactive";
6779 else
6780 continue;
6781
6782 output_len += scnprintf(buf + output_len,
6783 PAGE_SIZE - output_len,
6784 "[%d:%d:%d:%d] %20.20s ",
6785 ctrl_info->scsi_host->host_no,
6786 device->bus, device->target,
6787 device->lun,
6788 scsi_device_type(device->devtype));
6789
6790 if (device->devtype == TYPE_RAID ||
6791 pqi_is_logical_device(device))
6792 goto end_buffer;
6793
6794 memcpy(&phys_connector, &device->phys_connector[i],
6795 sizeof(phys_connector));
6796 if (phys_connector[0] < '0')
6797 phys_connector[0] = '0';
6798 if (phys_connector[1] < '0')
6799 phys_connector[1] = '0';
6800
6801 output_len += scnprintf(buf + output_len,
6802 PAGE_SIZE - output_len,
6803 "PORT: %.2s ", phys_connector);
6804
6805 box = device->box[i];
6806 if (box != 0 && box != 0xFF)
6807 output_len += scnprintf(buf + output_len,
6808 PAGE_SIZE - output_len,
6809 "BOX: %hhu ", box);
6810
6811 if ((device->devtype == TYPE_DISK ||
6812 device->devtype == TYPE_ZBC) &&
6813 pqi_expose_device(device))
6814 output_len += scnprintf(buf + output_len,
6815 PAGE_SIZE - output_len,
6816 "BAY: %hhu ", bay);
6817
6818 end_buffer:
6819 output_len += scnprintf(buf + output_len,
6820 PAGE_SIZE - output_len,
6821 "%s\n", active);
6822 }
6823
6824 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6825
6826 return output_len;
6827 }
6828
pqi_sas_address_show(struct device * dev,struct device_attribute * attr,char * buffer)6829 static ssize_t pqi_sas_address_show(struct device *dev,
6830 struct device_attribute *attr, char *buffer)
6831 {
6832 struct pqi_ctrl_info *ctrl_info;
6833 struct scsi_device *sdev;
6834 struct pqi_scsi_dev *device;
6835 unsigned long flags;
6836 u64 sas_address;
6837
6838 sdev = to_scsi_device(dev);
6839 ctrl_info = shost_to_hba(sdev->host);
6840
6841 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6842
6843 device = sdev->hostdata;
6844 if (!device || !pqi_is_device_with_sas_address(device)) {
6845 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6846 return -ENODEV;
6847 }
6848
6849 sas_address = device->sas_address;
6850
6851 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6852
6853 return scnprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address);
6854 }
6855
pqi_ssd_smart_path_enabled_show(struct device * dev,struct device_attribute * attr,char * buffer)6856 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev,
6857 struct device_attribute *attr, char *buffer)
6858 {
6859 struct pqi_ctrl_info *ctrl_info;
6860 struct scsi_device *sdev;
6861 struct pqi_scsi_dev *device;
6862 unsigned long flags;
6863
6864 sdev = to_scsi_device(dev);
6865 ctrl_info = shost_to_hba(sdev->host);
6866
6867 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6868
6869 device = sdev->hostdata;
6870 if (!device) {
6871 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6872 return -ENODEV;
6873 }
6874
6875 buffer[0] = device->raid_bypass_enabled ? '1' : '0';
6876 buffer[1] = '\n';
6877 buffer[2] = '\0';
6878
6879 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6880
6881 return 2;
6882 }
6883
pqi_raid_level_show(struct device * dev,struct device_attribute * attr,char * buffer)6884 static ssize_t pqi_raid_level_show(struct device *dev,
6885 struct device_attribute *attr, char *buffer)
6886 {
6887 struct pqi_ctrl_info *ctrl_info;
6888 struct scsi_device *sdev;
6889 struct pqi_scsi_dev *device;
6890 unsigned long flags;
6891 char *raid_level;
6892
6893 sdev = to_scsi_device(dev);
6894 ctrl_info = shost_to_hba(sdev->host);
6895
6896 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6897
6898 device = sdev->hostdata;
6899 if (!device) {
6900 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6901 return -ENODEV;
6902 }
6903
6904 if (pqi_is_logical_device(device))
6905 raid_level = pqi_raid_level_to_string(device->raid_level);
6906 else
6907 raid_level = "N/A";
6908
6909 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6910
6911 return scnprintf(buffer, PAGE_SIZE, "%s\n", raid_level);
6912 }
6913
pqi_raid_bypass_cnt_show(struct device * dev,struct device_attribute * attr,char * buffer)6914 static ssize_t pqi_raid_bypass_cnt_show(struct device *dev,
6915 struct device_attribute *attr, char *buffer)
6916 {
6917 struct pqi_ctrl_info *ctrl_info;
6918 struct scsi_device *sdev;
6919 struct pqi_scsi_dev *device;
6920 unsigned long flags;
6921 int raid_bypass_cnt;
6922
6923 sdev = to_scsi_device(dev);
6924 ctrl_info = shost_to_hba(sdev->host);
6925
6926 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags);
6927
6928 device = sdev->hostdata;
6929 if (!device) {
6930 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6931 return -ENODEV;
6932 }
6933
6934 raid_bypass_cnt = atomic_read(&device->raid_bypass_cnt);
6935
6936 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags);
6937
6938 return scnprintf(buffer, PAGE_SIZE, "0x%x\n", raid_bypass_cnt);
6939 }
6940
6941 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL);
6942 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL);
6943 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL);
6944 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL);
6945 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL);
6946 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL);
6947 static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL);
6948
6949 static struct device_attribute *pqi_sdev_attrs[] = {
6950 &dev_attr_lunid,
6951 &dev_attr_unique_id,
6952 &dev_attr_path_info,
6953 &dev_attr_sas_address,
6954 &dev_attr_ssd_smart_path_enabled,
6955 &dev_attr_raid_level,
6956 &dev_attr_raid_bypass_cnt,
6957 NULL
6958 };
6959
6960 static struct scsi_host_template pqi_driver_template = {
6961 .module = THIS_MODULE,
6962 .name = DRIVER_NAME_SHORT,
6963 .proc_name = DRIVER_NAME_SHORT,
6964 .queuecommand = pqi_scsi_queue_command,
6965 .scan_start = pqi_scan_start,
6966 .scan_finished = pqi_scan_finished,
6967 .this_id = -1,
6968 .eh_device_reset_handler = pqi_eh_device_reset_handler,
6969 .ioctl = pqi_ioctl,
6970 .slave_alloc = pqi_slave_alloc,
6971 .slave_configure = pqi_slave_configure,
6972 .slave_destroy = pqi_slave_destroy,
6973 .map_queues = pqi_map_queues,
6974 .sdev_attrs = pqi_sdev_attrs,
6975 .shost_attrs = pqi_shost_attrs,
6976 };
6977
pqi_register_scsi(struct pqi_ctrl_info * ctrl_info)6978 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info)
6979 {
6980 int rc;
6981 struct Scsi_Host *shost;
6982
6983 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info));
6984 if (!shost) {
6985 dev_err(&ctrl_info->pci_dev->dev, "scsi_host_alloc failed\n");
6986 return -ENOMEM;
6987 }
6988
6989 shost->io_port = 0;
6990 shost->n_io_port = 0;
6991 shost->this_id = -1;
6992 shost->max_channel = PQI_MAX_BUS;
6993 shost->max_cmd_len = MAX_COMMAND_SIZE;
6994 shost->max_lun = ~0;
6995 shost->max_id = ~0;
6996 shost->max_sectors = ctrl_info->max_sectors;
6997 shost->can_queue = ctrl_info->scsi_ml_can_queue;
6998 shost->cmd_per_lun = shost->can_queue;
6999 shost->sg_tablesize = ctrl_info->sg_tablesize;
7000 shost->transportt = pqi_sas_transport_template;
7001 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0);
7002 shost->unique_id = shost->irq;
7003 shost->nr_hw_queues = ctrl_info->num_queue_groups;
7004 shost->host_tagset = 1;
7005 shost->hostdata[0] = (unsigned long)ctrl_info;
7006
7007 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev);
7008 if (rc) {
7009 dev_err(&ctrl_info->pci_dev->dev, "scsi_add_host failed\n");
7010 goto free_host;
7011 }
7012
7013 rc = pqi_add_sas_host(shost, ctrl_info);
7014 if (rc) {
7015 dev_err(&ctrl_info->pci_dev->dev, "add SAS host failed\n");
7016 goto remove_host;
7017 }
7018
7019 ctrl_info->scsi_host = shost;
7020
7021 return 0;
7022
7023 remove_host:
7024 scsi_remove_host(shost);
7025 free_host:
7026 scsi_host_put(shost);
7027
7028 return rc;
7029 }
7030
pqi_unregister_scsi(struct pqi_ctrl_info * ctrl_info)7031 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info)
7032 {
7033 struct Scsi_Host *shost;
7034
7035 pqi_delete_sas_host(ctrl_info);
7036
7037 shost = ctrl_info->scsi_host;
7038 if (!shost)
7039 return;
7040
7041 scsi_remove_host(shost);
7042 scsi_host_put(shost);
7043 }
7044
pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info * ctrl_info)7045 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info)
7046 {
7047 int rc = 0;
7048 struct pqi_device_registers __iomem *pqi_registers;
7049 unsigned long timeout;
7050 unsigned int timeout_msecs;
7051 union pqi_reset_register reset_reg;
7052
7053 pqi_registers = ctrl_info->pqi_registers;
7054 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100;
7055 timeout = msecs_to_jiffies(timeout_msecs) + jiffies;
7056
7057 while (1) {
7058 msleep(PQI_RESET_POLL_INTERVAL_MSECS);
7059 reset_reg.all_bits = readl(&pqi_registers->device_reset);
7060 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED)
7061 break;
7062 pqi_check_ctrl_health(ctrl_info);
7063 if (pqi_ctrl_offline(ctrl_info)) {
7064 rc = -ENXIO;
7065 break;
7066 }
7067 if (time_after(jiffies, timeout)) {
7068 rc = -ETIMEDOUT;
7069 break;
7070 }
7071 }
7072
7073 return rc;
7074 }
7075
pqi_reset(struct pqi_ctrl_info * ctrl_info)7076 static int pqi_reset(struct pqi_ctrl_info *ctrl_info)
7077 {
7078 int rc;
7079 union pqi_reset_register reset_reg;
7080
7081 if (ctrl_info->pqi_reset_quiesce_supported) {
7082 rc = sis_pqi_reset_quiesce(ctrl_info);
7083 if (rc) {
7084 dev_err(&ctrl_info->pci_dev->dev,
7085 "PQI reset failed during quiesce with error %d\n", rc);
7086 return rc;
7087 }
7088 }
7089
7090 reset_reg.all_bits = 0;
7091 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET;
7092 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET;
7093
7094 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset);
7095
7096 rc = pqi_wait_for_pqi_reset_completion(ctrl_info);
7097 if (rc)
7098 dev_err(&ctrl_info->pci_dev->dev,
7099 "PQI reset failed with error %d\n", rc);
7100
7101 return rc;
7102 }
7103
pqi_get_ctrl_serial_number(struct pqi_ctrl_info * ctrl_info)7104 static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info)
7105 {
7106 int rc;
7107 struct bmic_sense_subsystem_info *sense_info;
7108
7109 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL);
7110 if (!sense_info)
7111 return -ENOMEM;
7112
7113 rc = pqi_sense_subsystem_info(ctrl_info, sense_info);
7114 if (rc)
7115 goto out;
7116
7117 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number,
7118 sizeof(sense_info->ctrl_serial_number));
7119 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0';
7120
7121 out:
7122 kfree(sense_info);
7123
7124 return rc;
7125 }
7126
pqi_get_ctrl_product_details(struct pqi_ctrl_info * ctrl_info)7127 static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info)
7128 {
7129 int rc;
7130 struct bmic_identify_controller *identify;
7131
7132 identify = kmalloc(sizeof(*identify), GFP_KERNEL);
7133 if (!identify)
7134 return -ENOMEM;
7135
7136 rc = pqi_identify_controller(ctrl_info, identify);
7137 if (rc)
7138 goto out;
7139
7140 if (get_unaligned_le32(&identify->extra_controller_flags) &
7141 BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED) {
7142 memcpy(ctrl_info->firmware_version,
7143 identify->firmware_version_long,
7144 sizeof(identify->firmware_version_long));
7145 } else {
7146 memcpy(ctrl_info->firmware_version,
7147 identify->firmware_version_short,
7148 sizeof(identify->firmware_version_short));
7149 ctrl_info->firmware_version
7150 [sizeof(identify->firmware_version_short)] = '\0';
7151 snprintf(ctrl_info->firmware_version +
7152 strlen(ctrl_info->firmware_version),
7153 sizeof(ctrl_info->firmware_version) -
7154 sizeof(identify->firmware_version_short),
7155 "-%u",
7156 get_unaligned_le16(&identify->firmware_build_number));
7157 }
7158
7159 memcpy(ctrl_info->model, identify->product_id,
7160 sizeof(identify->product_id));
7161 ctrl_info->model[sizeof(identify->product_id)] = '\0';
7162
7163 memcpy(ctrl_info->vendor, identify->vendor_id,
7164 sizeof(identify->vendor_id));
7165 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0';
7166
7167 out:
7168 kfree(identify);
7169
7170 return rc;
7171 }
7172
7173 struct pqi_config_table_section_info {
7174 struct pqi_ctrl_info *ctrl_info;
7175 void *section;
7176 u32 section_offset;
7177 void __iomem *section_iomem_addr;
7178 };
7179
pqi_is_firmware_feature_supported(struct pqi_config_table_firmware_features * firmware_features,unsigned int bit_position)7180 static inline bool pqi_is_firmware_feature_supported(
7181 struct pqi_config_table_firmware_features *firmware_features,
7182 unsigned int bit_position)
7183 {
7184 unsigned int byte_index;
7185
7186 byte_index = bit_position / BITS_PER_BYTE;
7187
7188 if (byte_index >= le16_to_cpu(firmware_features->num_elements))
7189 return false;
7190
7191 return firmware_features->features_supported[byte_index] &
7192 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
7193 }
7194
pqi_is_firmware_feature_enabled(struct pqi_config_table_firmware_features * firmware_features,void __iomem * firmware_features_iomem_addr,unsigned int bit_position)7195 static inline bool pqi_is_firmware_feature_enabled(
7196 struct pqi_config_table_firmware_features *firmware_features,
7197 void __iomem *firmware_features_iomem_addr,
7198 unsigned int bit_position)
7199 {
7200 unsigned int byte_index;
7201 u8 __iomem *features_enabled_iomem_addr;
7202
7203 byte_index = (bit_position / BITS_PER_BYTE) +
7204 (le16_to_cpu(firmware_features->num_elements) * 2);
7205
7206 features_enabled_iomem_addr = firmware_features_iomem_addr +
7207 offsetof(struct pqi_config_table_firmware_features,
7208 features_supported) + byte_index;
7209
7210 return *((__force u8 *)features_enabled_iomem_addr) &
7211 (1 << (bit_position % BITS_PER_BYTE)) ? true : false;
7212 }
7213
pqi_request_firmware_feature(struct pqi_config_table_firmware_features * firmware_features,unsigned int bit_position)7214 static inline void pqi_request_firmware_feature(
7215 struct pqi_config_table_firmware_features *firmware_features,
7216 unsigned int bit_position)
7217 {
7218 unsigned int byte_index;
7219
7220 byte_index = (bit_position / BITS_PER_BYTE) +
7221 le16_to_cpu(firmware_features->num_elements);
7222
7223 firmware_features->features_supported[byte_index] |=
7224 (1 << (bit_position % BITS_PER_BYTE));
7225 }
7226
pqi_config_table_update(struct pqi_ctrl_info * ctrl_info,u16 first_section,u16 last_section)7227 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info,
7228 u16 first_section, u16 last_section)
7229 {
7230 struct pqi_vendor_general_request request;
7231
7232 memset(&request, 0, sizeof(request));
7233
7234 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
7235 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
7236 &request.header.iu_length);
7237 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE,
7238 &request.function_code);
7239 put_unaligned_le16(first_section,
7240 &request.data.config_table_update.first_section);
7241 put_unaligned_le16(last_section,
7242 &request.data.config_table_update.last_section);
7243
7244 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
7245 }
7246
pqi_enable_firmware_features(struct pqi_ctrl_info * ctrl_info,struct pqi_config_table_firmware_features * firmware_features,void __iomem * firmware_features_iomem_addr)7247 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info,
7248 struct pqi_config_table_firmware_features *firmware_features,
7249 void __iomem *firmware_features_iomem_addr)
7250 {
7251 void *features_requested;
7252 void __iomem *features_requested_iomem_addr;
7253 void __iomem *host_max_known_feature_iomem_addr;
7254
7255 features_requested = firmware_features->features_supported +
7256 le16_to_cpu(firmware_features->num_elements);
7257
7258 features_requested_iomem_addr = firmware_features_iomem_addr +
7259 (features_requested - (void *)firmware_features);
7260
7261 memcpy_toio(features_requested_iomem_addr, features_requested,
7262 le16_to_cpu(firmware_features->num_elements));
7263
7264 if (pqi_is_firmware_feature_supported(firmware_features,
7265 PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE)) {
7266 host_max_known_feature_iomem_addr =
7267 features_requested_iomem_addr +
7268 (le16_to_cpu(firmware_features->num_elements) * 2) +
7269 sizeof(__le16);
7270 writew(PQI_FIRMWARE_FEATURE_MAXIMUM,
7271 host_max_known_feature_iomem_addr);
7272 }
7273
7274 return pqi_config_table_update(ctrl_info,
7275 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES,
7276 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES);
7277 }
7278
7279 struct pqi_firmware_feature {
7280 char *feature_name;
7281 unsigned int feature_bit;
7282 bool supported;
7283 bool enabled;
7284 void (*feature_status)(struct pqi_ctrl_info *ctrl_info,
7285 struct pqi_firmware_feature *firmware_feature);
7286 };
7287
pqi_firmware_feature_status(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)7288 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info,
7289 struct pqi_firmware_feature *firmware_feature)
7290 {
7291 if (!firmware_feature->supported) {
7292 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n",
7293 firmware_feature->feature_name);
7294 return;
7295 }
7296
7297 if (firmware_feature->enabled) {
7298 dev_info(&ctrl_info->pci_dev->dev,
7299 "%s enabled\n", firmware_feature->feature_name);
7300 return;
7301 }
7302
7303 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n",
7304 firmware_feature->feature_name);
7305 }
7306
pqi_ctrl_update_feature_flags(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)7307 static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info,
7308 struct pqi_firmware_feature *firmware_feature)
7309 {
7310 switch (firmware_feature->feature_bit) {
7311 case PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS:
7312 ctrl_info->enable_r1_writes = firmware_feature->enabled;
7313 break;
7314 case PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS:
7315 ctrl_info->enable_r5_writes = firmware_feature->enabled;
7316 break;
7317 case PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS:
7318 ctrl_info->enable_r6_writes = firmware_feature->enabled;
7319 break;
7320 case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE:
7321 ctrl_info->soft_reset_handshake_supported =
7322 firmware_feature->enabled &&
7323 pqi_read_soft_reset_status(ctrl_info);
7324 break;
7325 case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT:
7326 ctrl_info->raid_iu_timeout_supported = firmware_feature->enabled;
7327 break;
7328 case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT:
7329 ctrl_info->tmf_iu_timeout_supported = firmware_feature->enabled;
7330 break;
7331 case PQI_FIRMWARE_FEATURE_UNIQUE_WWID_IN_REPORT_PHYS_LUN:
7332 ctrl_info->unique_wwid_in_report_phys_lun_supported =
7333 firmware_feature->enabled;
7334 break;
7335 pqi_save_fw_triage_setting(ctrl_info, firmware_feature->enabled);
7336 }
7337
7338 pqi_firmware_feature_status(ctrl_info, firmware_feature);
7339 }
7340
pqi_firmware_feature_update(struct pqi_ctrl_info * ctrl_info,struct pqi_firmware_feature * firmware_feature)7341 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info,
7342 struct pqi_firmware_feature *firmware_feature)
7343 {
7344 if (firmware_feature->feature_status)
7345 firmware_feature->feature_status(ctrl_info, firmware_feature);
7346 }
7347
7348 static DEFINE_MUTEX(pqi_firmware_features_mutex);
7349
7350 static struct pqi_firmware_feature pqi_firmware_features[] = {
7351 {
7352 .feature_name = "Online Firmware Activation",
7353 .feature_bit = PQI_FIRMWARE_FEATURE_OFA,
7354 .feature_status = pqi_firmware_feature_status,
7355 },
7356 {
7357 .feature_name = "Serial Management Protocol",
7358 .feature_bit = PQI_FIRMWARE_FEATURE_SMP,
7359 .feature_status = pqi_firmware_feature_status,
7360 },
7361 {
7362 .feature_name = "Maximum Known Feature",
7363 .feature_bit = PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE,
7364 .feature_status = pqi_firmware_feature_status,
7365 },
7366 {
7367 .feature_name = "RAID 0 Read Bypass",
7368 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS,
7369 .feature_status = pqi_firmware_feature_status,
7370 },
7371 {
7372 .feature_name = "RAID 1 Read Bypass",
7373 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS,
7374 .feature_status = pqi_firmware_feature_status,
7375 },
7376 {
7377 .feature_name = "RAID 5 Read Bypass",
7378 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS,
7379 .feature_status = pqi_firmware_feature_status,
7380 },
7381 {
7382 .feature_name = "RAID 6 Read Bypass",
7383 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS,
7384 .feature_status = pqi_firmware_feature_status,
7385 },
7386 {
7387 .feature_name = "RAID 0 Write Bypass",
7388 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS,
7389 .feature_status = pqi_firmware_feature_status,
7390 },
7391 {
7392 .feature_name = "RAID 1 Write Bypass",
7393 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS,
7394 .feature_status = pqi_ctrl_update_feature_flags,
7395 },
7396 {
7397 .feature_name = "RAID 5 Write Bypass",
7398 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS,
7399 .feature_status = pqi_ctrl_update_feature_flags,
7400 },
7401 {
7402 .feature_name = "RAID 6 Write Bypass",
7403 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS,
7404 .feature_status = pqi_ctrl_update_feature_flags,
7405 },
7406 {
7407 .feature_name = "New Soft Reset Handshake",
7408 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE,
7409 .feature_status = pqi_ctrl_update_feature_flags,
7410 },
7411 {
7412 .feature_name = "RAID IU Timeout",
7413 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT,
7414 .feature_status = pqi_ctrl_update_feature_flags,
7415 },
7416 {
7417 .feature_name = "TMF IU Timeout",
7418 .feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT,
7419 .feature_status = pqi_ctrl_update_feature_flags,
7420 },
7421 {
7422 .feature_name = "RAID Bypass on encrypted logical volumes on NVMe",
7423 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME,
7424 .feature_status = pqi_firmware_feature_status,
7425 },
7426 {
7427 .feature_name = "Unique WWID in Report Physical LUN",
7428 .feature_bit = PQI_FIRMWARE_FEATURE_UNIQUE_WWID_IN_REPORT_PHYS_LUN,
7429 .feature_status = pqi_ctrl_update_feature_flags,
7430 },
7431 };
7432
pqi_process_firmware_features(struct pqi_config_table_section_info * section_info)7433 static void pqi_process_firmware_features(
7434 struct pqi_config_table_section_info *section_info)
7435 {
7436 int rc;
7437 struct pqi_ctrl_info *ctrl_info;
7438 struct pqi_config_table_firmware_features *firmware_features;
7439 void __iomem *firmware_features_iomem_addr;
7440 unsigned int i;
7441 unsigned int num_features_supported;
7442
7443 ctrl_info = section_info->ctrl_info;
7444 firmware_features = section_info->section;
7445 firmware_features_iomem_addr = section_info->section_iomem_addr;
7446
7447 for (i = 0, num_features_supported = 0;
7448 i < ARRAY_SIZE(pqi_firmware_features); i++) {
7449 if (pqi_is_firmware_feature_supported(firmware_features,
7450 pqi_firmware_features[i].feature_bit)) {
7451 pqi_firmware_features[i].supported = true;
7452 num_features_supported++;
7453 } else {
7454 pqi_firmware_feature_update(ctrl_info,
7455 &pqi_firmware_features[i]);
7456 }
7457 }
7458
7459 if (num_features_supported == 0)
7460 return;
7461
7462 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7463 if (!pqi_firmware_features[i].supported)
7464 continue;
7465 pqi_request_firmware_feature(firmware_features,
7466 pqi_firmware_features[i].feature_bit);
7467 }
7468
7469 rc = pqi_enable_firmware_features(ctrl_info, firmware_features,
7470 firmware_features_iomem_addr);
7471 if (rc) {
7472 dev_err(&ctrl_info->pci_dev->dev,
7473 "failed to enable firmware features in PQI configuration table\n");
7474 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7475 if (!pqi_firmware_features[i].supported)
7476 continue;
7477 pqi_firmware_feature_update(ctrl_info,
7478 &pqi_firmware_features[i]);
7479 }
7480 return;
7481 }
7482
7483 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7484 if (!pqi_firmware_features[i].supported)
7485 continue;
7486 if (pqi_is_firmware_feature_enabled(firmware_features,
7487 firmware_features_iomem_addr,
7488 pqi_firmware_features[i].feature_bit)) {
7489 pqi_firmware_features[i].enabled = true;
7490 }
7491 pqi_firmware_feature_update(ctrl_info,
7492 &pqi_firmware_features[i]);
7493 }
7494 }
7495
pqi_init_firmware_features(void)7496 static void pqi_init_firmware_features(void)
7497 {
7498 unsigned int i;
7499
7500 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) {
7501 pqi_firmware_features[i].supported = false;
7502 pqi_firmware_features[i].enabled = false;
7503 }
7504 }
7505
pqi_process_firmware_features_section(struct pqi_config_table_section_info * section_info)7506 static void pqi_process_firmware_features_section(
7507 struct pqi_config_table_section_info *section_info)
7508 {
7509 mutex_lock(&pqi_firmware_features_mutex);
7510 pqi_init_firmware_features();
7511 pqi_process_firmware_features(section_info);
7512 mutex_unlock(&pqi_firmware_features_mutex);
7513 }
7514
7515 /*
7516 * Reset all controller settings that can be initialized during the processing
7517 * of the PQI Configuration Table.
7518 */
7519
pqi_ctrl_reset_config(struct pqi_ctrl_info * ctrl_info)7520 static void pqi_ctrl_reset_config(struct pqi_ctrl_info *ctrl_info)
7521 {
7522 ctrl_info->heartbeat_counter = NULL;
7523 ctrl_info->soft_reset_status = NULL;
7524 ctrl_info->soft_reset_handshake_supported = false;
7525 ctrl_info->enable_r1_writes = false;
7526 ctrl_info->enable_r5_writes = false;
7527 ctrl_info->enable_r6_writes = false;
7528 ctrl_info->raid_iu_timeout_supported = false;
7529 ctrl_info->tmf_iu_timeout_supported = false;
7530 ctrl_info->unique_wwid_in_report_phys_lun_supported = false;
7531 }
7532
pqi_process_config_table(struct pqi_ctrl_info * ctrl_info)7533 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info)
7534 {
7535 u32 table_length;
7536 u32 section_offset;
7537 bool firmware_feature_section_present;
7538 void __iomem *table_iomem_addr;
7539 struct pqi_config_table *config_table;
7540 struct pqi_config_table_section_header *section;
7541 struct pqi_config_table_section_info section_info;
7542 struct pqi_config_table_section_info feature_section_info;
7543
7544 table_length = ctrl_info->config_table_length;
7545 if (table_length == 0)
7546 return 0;
7547
7548 config_table = kmalloc(table_length, GFP_KERNEL);
7549 if (!config_table) {
7550 dev_err(&ctrl_info->pci_dev->dev,
7551 "failed to allocate memory for PQI configuration table\n");
7552 return -ENOMEM;
7553 }
7554
7555 /*
7556 * Copy the config table contents from I/O memory space into the
7557 * temporary buffer.
7558 */
7559 table_iomem_addr = ctrl_info->iomem_base + ctrl_info->config_table_offset;
7560 memcpy_fromio(config_table, table_iomem_addr, table_length);
7561
7562 firmware_feature_section_present = false;
7563 section_info.ctrl_info = ctrl_info;
7564 section_offset = get_unaligned_le32(&config_table->first_section_offset);
7565
7566 while (section_offset) {
7567 section = (void *)config_table + section_offset;
7568
7569 section_info.section = section;
7570 section_info.section_offset = section_offset;
7571 section_info.section_iomem_addr = table_iomem_addr + section_offset;
7572
7573 switch (get_unaligned_le16(§ion->section_id)) {
7574 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES:
7575 firmware_feature_section_present = true;
7576 feature_section_info = section_info;
7577 break;
7578 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT:
7579 if (pqi_disable_heartbeat)
7580 dev_warn(&ctrl_info->pci_dev->dev,
7581 "heartbeat disabled by module parameter\n");
7582 else
7583 ctrl_info->heartbeat_counter =
7584 table_iomem_addr +
7585 section_offset +
7586 offsetof(struct pqi_config_table_heartbeat,
7587 heartbeat_counter);
7588 break;
7589 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET:
7590 ctrl_info->soft_reset_status =
7591 table_iomem_addr +
7592 section_offset +
7593 offsetof(struct pqi_config_table_soft_reset,
7594 soft_reset_status);
7595 break;
7596 }
7597
7598 section_offset = get_unaligned_le16(§ion->next_section_offset);
7599 }
7600
7601 /*
7602 * We process the firmware feature section after all other sections
7603 * have been processed so that the feature bit callbacks can take
7604 * into account the settings configured by other sections.
7605 */
7606 if (firmware_feature_section_present)
7607 pqi_process_firmware_features_section(&feature_section_info);
7608
7609 kfree(config_table);
7610
7611 return 0;
7612 }
7613
7614 /* Switches the controller from PQI mode back into SIS mode. */
7615
pqi_revert_to_sis_mode(struct pqi_ctrl_info * ctrl_info)7616 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info)
7617 {
7618 int rc;
7619
7620 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE);
7621 rc = pqi_reset(ctrl_info);
7622 if (rc)
7623 return rc;
7624 rc = sis_reenable_sis_mode(ctrl_info);
7625 if (rc) {
7626 dev_err(&ctrl_info->pci_dev->dev,
7627 "re-enabling SIS mode failed with error %d\n", rc);
7628 return rc;
7629 }
7630 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7631
7632 return 0;
7633 }
7634
7635 /*
7636 * If the controller isn't already in SIS mode, this function forces it into
7637 * SIS mode.
7638 */
7639
pqi_force_sis_mode(struct pqi_ctrl_info * ctrl_info)7640 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info)
7641 {
7642 if (!sis_is_firmware_running(ctrl_info))
7643 return -ENXIO;
7644
7645 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE)
7646 return 0;
7647
7648 if (sis_is_kernel_up(ctrl_info)) {
7649 pqi_save_ctrl_mode(ctrl_info, SIS_MODE);
7650 return 0;
7651 }
7652
7653 return pqi_revert_to_sis_mode(ctrl_info);
7654 }
7655
pqi_perform_lockup_action(void)7656 static void pqi_perform_lockup_action(void)
7657 {
7658 switch (pqi_lockup_action) {
7659 case PANIC:
7660 panic("FATAL: Smart Family Controller lockup detected");
7661 break;
7662 case REBOOT:
7663 emergency_restart();
7664 break;
7665 case NONE:
7666 default:
7667 break;
7668 }
7669 }
7670
pqi_ctrl_init(struct pqi_ctrl_info * ctrl_info)7671 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info)
7672 {
7673 int rc;
7674 u32 product_id;
7675
7676 if (reset_devices) {
7677 if (pqi_is_fw_triage_supported(ctrl_info)) {
7678 rc = sis_wait_for_fw_triage_completion(ctrl_info);
7679 if (rc)
7680 return rc;
7681 }
7682 sis_soft_reset(ctrl_info);
7683 msleep(PQI_POST_RESET_DELAY_SECS * PQI_HZ);
7684 } else {
7685 rc = pqi_force_sis_mode(ctrl_info);
7686 if (rc)
7687 return rc;
7688 }
7689
7690 /*
7691 * Wait until the controller is ready to start accepting SIS
7692 * commands.
7693 */
7694 rc = sis_wait_for_ctrl_ready(ctrl_info);
7695 if (rc) {
7696 if (reset_devices) {
7697 dev_err(&ctrl_info->pci_dev->dev,
7698 "kdump init failed with error %d\n", rc);
7699 pqi_lockup_action = REBOOT;
7700 pqi_perform_lockup_action();
7701 }
7702 return rc;
7703 }
7704
7705 /*
7706 * Get the controller properties. This allows us to determine
7707 * whether or not it supports PQI mode.
7708 */
7709 rc = sis_get_ctrl_properties(ctrl_info);
7710 if (rc) {
7711 dev_err(&ctrl_info->pci_dev->dev,
7712 "error obtaining controller properties\n");
7713 return rc;
7714 }
7715
7716 rc = sis_get_pqi_capabilities(ctrl_info);
7717 if (rc) {
7718 dev_err(&ctrl_info->pci_dev->dev,
7719 "error obtaining controller capabilities\n");
7720 return rc;
7721 }
7722
7723 product_id = sis_get_product_id(ctrl_info);
7724 ctrl_info->product_id = (u8)product_id;
7725 ctrl_info->product_revision = (u8)(product_id >> 8);
7726
7727 if (reset_devices) {
7728 if (ctrl_info->max_outstanding_requests >
7729 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP)
7730 ctrl_info->max_outstanding_requests =
7731 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP;
7732 } else {
7733 if (ctrl_info->max_outstanding_requests >
7734 PQI_MAX_OUTSTANDING_REQUESTS)
7735 ctrl_info->max_outstanding_requests =
7736 PQI_MAX_OUTSTANDING_REQUESTS;
7737 }
7738
7739 pqi_calculate_io_resources(ctrl_info);
7740
7741 rc = pqi_alloc_error_buffer(ctrl_info);
7742 if (rc) {
7743 dev_err(&ctrl_info->pci_dev->dev,
7744 "failed to allocate PQI error buffer\n");
7745 return rc;
7746 }
7747
7748 /*
7749 * If the function we are about to call succeeds, the
7750 * controller will transition from legacy SIS mode
7751 * into PQI mode.
7752 */
7753 rc = sis_init_base_struct_addr(ctrl_info);
7754 if (rc) {
7755 dev_err(&ctrl_info->pci_dev->dev,
7756 "error initializing PQI mode\n");
7757 return rc;
7758 }
7759
7760 /* Wait for the controller to complete the SIS -> PQI transition. */
7761 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7762 if (rc) {
7763 dev_err(&ctrl_info->pci_dev->dev,
7764 "transition to PQI mode failed\n");
7765 return rc;
7766 }
7767
7768 /* From here on, we are running in PQI mode. */
7769 ctrl_info->pqi_mode_enabled = true;
7770 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7771
7772 rc = pqi_alloc_admin_queues(ctrl_info);
7773 if (rc) {
7774 dev_err(&ctrl_info->pci_dev->dev,
7775 "failed to allocate admin queues\n");
7776 return rc;
7777 }
7778
7779 rc = pqi_create_admin_queues(ctrl_info);
7780 if (rc) {
7781 dev_err(&ctrl_info->pci_dev->dev,
7782 "error creating admin queues\n");
7783 return rc;
7784 }
7785
7786 rc = pqi_report_device_capability(ctrl_info);
7787 if (rc) {
7788 dev_err(&ctrl_info->pci_dev->dev,
7789 "obtaining device capability failed\n");
7790 return rc;
7791 }
7792
7793 rc = pqi_validate_device_capability(ctrl_info);
7794 if (rc)
7795 return rc;
7796
7797 pqi_calculate_queue_resources(ctrl_info);
7798
7799 rc = pqi_enable_msix_interrupts(ctrl_info);
7800 if (rc)
7801 return rc;
7802
7803 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) {
7804 ctrl_info->max_msix_vectors =
7805 ctrl_info->num_msix_vectors_enabled;
7806 pqi_calculate_queue_resources(ctrl_info);
7807 }
7808
7809 rc = pqi_alloc_io_resources(ctrl_info);
7810 if (rc)
7811 return rc;
7812
7813 rc = pqi_alloc_operational_queues(ctrl_info);
7814 if (rc) {
7815 dev_err(&ctrl_info->pci_dev->dev,
7816 "failed to allocate operational queues\n");
7817 return rc;
7818 }
7819
7820 pqi_init_operational_queues(ctrl_info);
7821
7822 rc = pqi_create_queues(ctrl_info);
7823 if (rc)
7824 return rc;
7825
7826 rc = pqi_request_irqs(ctrl_info);
7827 if (rc)
7828 return rc;
7829
7830 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7831
7832 ctrl_info->controller_online = true;
7833
7834 rc = pqi_process_config_table(ctrl_info);
7835 if (rc)
7836 return rc;
7837
7838 pqi_start_heartbeat_timer(ctrl_info);
7839
7840 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) {
7841 rc = pqi_get_advanced_raid_bypass_config(ctrl_info);
7842 if (rc) { /* Supported features not returned correctly. */
7843 dev_err(&ctrl_info->pci_dev->dev,
7844 "error obtaining advanced RAID bypass configuration\n");
7845 return rc;
7846 }
7847 ctrl_info->ciss_report_log_flags |=
7848 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX;
7849 }
7850
7851 rc = pqi_enable_events(ctrl_info);
7852 if (rc) {
7853 dev_err(&ctrl_info->pci_dev->dev,
7854 "error enabling events\n");
7855 return rc;
7856 }
7857
7858 /* Register with the SCSI subsystem. */
7859 rc = pqi_register_scsi(ctrl_info);
7860 if (rc)
7861 return rc;
7862
7863 rc = pqi_get_ctrl_product_details(ctrl_info);
7864 if (rc) {
7865 dev_err(&ctrl_info->pci_dev->dev,
7866 "error obtaining product details\n");
7867 return rc;
7868 }
7869
7870 rc = pqi_get_ctrl_serial_number(ctrl_info);
7871 if (rc) {
7872 dev_err(&ctrl_info->pci_dev->dev,
7873 "error obtaining ctrl serial number\n");
7874 return rc;
7875 }
7876
7877 rc = pqi_set_diag_rescan(ctrl_info);
7878 if (rc) {
7879 dev_err(&ctrl_info->pci_dev->dev,
7880 "error enabling multi-lun rescan\n");
7881 return rc;
7882 }
7883
7884 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
7885 if (rc) {
7886 dev_err(&ctrl_info->pci_dev->dev,
7887 "error updating host wellness\n");
7888 return rc;
7889 }
7890
7891 pqi_schedule_update_time_worker(ctrl_info);
7892
7893 pqi_scan_scsi_devices(ctrl_info);
7894
7895 return 0;
7896 }
7897
pqi_reinit_queues(struct pqi_ctrl_info * ctrl_info)7898 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info)
7899 {
7900 unsigned int i;
7901 struct pqi_admin_queues *admin_queues;
7902 struct pqi_event_queue *event_queue;
7903
7904 admin_queues = &ctrl_info->admin_queues;
7905 admin_queues->iq_pi_copy = 0;
7906 admin_queues->oq_ci_copy = 0;
7907 writel(0, admin_queues->oq_pi);
7908
7909 for (i = 0; i < ctrl_info->num_queue_groups; i++) {
7910 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0;
7911 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0;
7912 ctrl_info->queue_groups[i].oq_ci_copy = 0;
7913
7914 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]);
7915 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]);
7916 writel(0, ctrl_info->queue_groups[i].oq_pi);
7917 }
7918
7919 event_queue = &ctrl_info->event_queue;
7920 writel(0, event_queue->oq_pi);
7921 event_queue->oq_ci_copy = 0;
7922 }
7923
pqi_ctrl_init_resume(struct pqi_ctrl_info * ctrl_info)7924 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info)
7925 {
7926 int rc;
7927
7928 rc = pqi_force_sis_mode(ctrl_info);
7929 if (rc)
7930 return rc;
7931
7932 /*
7933 * Wait until the controller is ready to start accepting SIS
7934 * commands.
7935 */
7936 rc = sis_wait_for_ctrl_ready_resume(ctrl_info);
7937 if (rc)
7938 return rc;
7939
7940 /*
7941 * Get the controller properties. This allows us to determine
7942 * whether or not it supports PQI mode.
7943 */
7944 rc = sis_get_ctrl_properties(ctrl_info);
7945 if (rc) {
7946 dev_err(&ctrl_info->pci_dev->dev,
7947 "error obtaining controller properties\n");
7948 return rc;
7949 }
7950
7951 rc = sis_get_pqi_capabilities(ctrl_info);
7952 if (rc) {
7953 dev_err(&ctrl_info->pci_dev->dev,
7954 "error obtaining controller capabilities\n");
7955 return rc;
7956 }
7957
7958 /*
7959 * If the function we are about to call succeeds, the
7960 * controller will transition from legacy SIS mode
7961 * into PQI mode.
7962 */
7963 rc = sis_init_base_struct_addr(ctrl_info);
7964 if (rc) {
7965 dev_err(&ctrl_info->pci_dev->dev,
7966 "error initializing PQI mode\n");
7967 return rc;
7968 }
7969
7970 /* Wait for the controller to complete the SIS -> PQI transition. */
7971 rc = pqi_wait_for_pqi_mode_ready(ctrl_info);
7972 if (rc) {
7973 dev_err(&ctrl_info->pci_dev->dev,
7974 "transition to PQI mode failed\n");
7975 return rc;
7976 }
7977
7978 /* From here on, we are running in PQI mode. */
7979 ctrl_info->pqi_mode_enabled = true;
7980 pqi_save_ctrl_mode(ctrl_info, PQI_MODE);
7981
7982 pqi_reinit_queues(ctrl_info);
7983
7984 rc = pqi_create_admin_queues(ctrl_info);
7985 if (rc) {
7986 dev_err(&ctrl_info->pci_dev->dev,
7987 "error creating admin queues\n");
7988 return rc;
7989 }
7990
7991 rc = pqi_create_queues(ctrl_info);
7992 if (rc)
7993 return rc;
7994
7995 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX);
7996
7997 ctrl_info->controller_online = true;
7998 pqi_ctrl_unblock_requests(ctrl_info);
7999
8000 pqi_ctrl_reset_config(ctrl_info);
8001
8002 rc = pqi_process_config_table(ctrl_info);
8003 if (rc)
8004 return rc;
8005
8006 pqi_start_heartbeat_timer(ctrl_info);
8007
8008 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) {
8009 rc = pqi_get_advanced_raid_bypass_config(ctrl_info);
8010 if (rc) {
8011 dev_err(&ctrl_info->pci_dev->dev,
8012 "error obtaining advanced RAID bypass configuration\n");
8013 return rc;
8014 }
8015 ctrl_info->ciss_report_log_flags |=
8016 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX;
8017 }
8018
8019 rc = pqi_enable_events(ctrl_info);
8020 if (rc) {
8021 dev_err(&ctrl_info->pci_dev->dev,
8022 "error enabling events\n");
8023 return rc;
8024 }
8025
8026 rc = pqi_get_ctrl_product_details(ctrl_info);
8027 if (rc) {
8028 dev_err(&ctrl_info->pci_dev->dev,
8029 "error obtaining product details\n");
8030 return rc;
8031 }
8032
8033 rc = pqi_set_diag_rescan(ctrl_info);
8034 if (rc) {
8035 dev_err(&ctrl_info->pci_dev->dev,
8036 "error enabling multi-lun rescan\n");
8037 return rc;
8038 }
8039
8040 rc = pqi_write_driver_version_to_host_wellness(ctrl_info);
8041 if (rc) {
8042 dev_err(&ctrl_info->pci_dev->dev,
8043 "error updating host wellness\n");
8044 return rc;
8045 }
8046
8047 if (pqi_ofa_in_progress(ctrl_info))
8048 pqi_ctrl_unblock_scan(ctrl_info);
8049
8050 pqi_scan_scsi_devices(ctrl_info);
8051
8052 return 0;
8053 }
8054
pqi_set_pcie_completion_timeout(struct pci_dev * pci_dev,u16 timeout)8055 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, u16 timeout)
8056 {
8057 int rc;
8058
8059 rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2,
8060 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout);
8061
8062 return pcibios_err_to_errno(rc);
8063 }
8064
pqi_pci_init(struct pqi_ctrl_info * ctrl_info)8065 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info)
8066 {
8067 int rc;
8068 u64 mask;
8069
8070 rc = pci_enable_device(ctrl_info->pci_dev);
8071 if (rc) {
8072 dev_err(&ctrl_info->pci_dev->dev,
8073 "failed to enable PCI device\n");
8074 return rc;
8075 }
8076
8077 if (sizeof(dma_addr_t) > 4)
8078 mask = DMA_BIT_MASK(64);
8079 else
8080 mask = DMA_BIT_MASK(32);
8081
8082 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask);
8083 if (rc) {
8084 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n");
8085 goto disable_device;
8086 }
8087
8088 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT);
8089 if (rc) {
8090 dev_err(&ctrl_info->pci_dev->dev,
8091 "failed to obtain PCI resources\n");
8092 goto disable_device;
8093 }
8094
8095 ctrl_info->iomem_base = ioremap(pci_resource_start(
8096 ctrl_info->pci_dev, 0),
8097 sizeof(struct pqi_ctrl_registers));
8098 if (!ctrl_info->iomem_base) {
8099 dev_err(&ctrl_info->pci_dev->dev,
8100 "failed to map memory for controller registers\n");
8101 rc = -ENOMEM;
8102 goto release_regions;
8103 }
8104
8105 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6
8106
8107 /* Increase the PCIe completion timeout. */
8108 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev,
8109 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS);
8110 if (rc) {
8111 dev_err(&ctrl_info->pci_dev->dev,
8112 "failed to set PCIe completion timeout\n");
8113 goto release_regions;
8114 }
8115
8116 /* Enable bus mastering. */
8117 pci_set_master(ctrl_info->pci_dev);
8118
8119 ctrl_info->registers = ctrl_info->iomem_base;
8120 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers;
8121
8122 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info);
8123
8124 return 0;
8125
8126 release_regions:
8127 pci_release_regions(ctrl_info->pci_dev);
8128 disable_device:
8129 pci_disable_device(ctrl_info->pci_dev);
8130
8131 return rc;
8132 }
8133
pqi_cleanup_pci_init(struct pqi_ctrl_info * ctrl_info)8134 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info)
8135 {
8136 iounmap(ctrl_info->iomem_base);
8137 pci_release_regions(ctrl_info->pci_dev);
8138 if (pci_is_enabled(ctrl_info->pci_dev))
8139 pci_disable_device(ctrl_info->pci_dev);
8140 pci_set_drvdata(ctrl_info->pci_dev, NULL);
8141 }
8142
pqi_alloc_ctrl_info(int numa_node)8143 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node)
8144 {
8145 struct pqi_ctrl_info *ctrl_info;
8146
8147 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info),
8148 GFP_KERNEL, numa_node);
8149 if (!ctrl_info)
8150 return NULL;
8151
8152 mutex_init(&ctrl_info->scan_mutex);
8153 mutex_init(&ctrl_info->lun_reset_mutex);
8154 mutex_init(&ctrl_info->ofa_mutex);
8155
8156 INIT_LIST_HEAD(&ctrl_info->scsi_device_list);
8157 spin_lock_init(&ctrl_info->scsi_device_list_lock);
8158
8159 INIT_WORK(&ctrl_info->event_work, pqi_event_worker);
8160 atomic_set(&ctrl_info->num_interrupts, 0);
8161
8162 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker);
8163 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker);
8164
8165 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0);
8166 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker);
8167
8168 INIT_WORK(&ctrl_info->ofa_memory_alloc_work, pqi_ofa_memory_alloc_worker);
8169 INIT_WORK(&ctrl_info->ofa_quiesce_work, pqi_ofa_quiesce_worker);
8170
8171 sema_init(&ctrl_info->sync_request_sem,
8172 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS);
8173 init_waitqueue_head(&ctrl_info->block_requests_wait);
8174
8175 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1;
8176 ctrl_info->irq_mode = IRQ_MODE_NONE;
8177 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS;
8178
8179 ctrl_info->ciss_report_log_flags = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID;
8180 ctrl_info->max_transfer_encrypted_sas_sata =
8181 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA;
8182 ctrl_info->max_transfer_encrypted_nvme =
8183 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME;
8184 ctrl_info->max_write_raid_5_6 = PQI_DEFAULT_MAX_WRITE_RAID_5_6;
8185 ctrl_info->max_write_raid_1_10_2drive = ~0;
8186 ctrl_info->max_write_raid_1_10_3drive = ~0;
8187
8188 return ctrl_info;
8189 }
8190
pqi_free_ctrl_info(struct pqi_ctrl_info * ctrl_info)8191 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info)
8192 {
8193 kfree(ctrl_info);
8194 }
8195
pqi_free_interrupts(struct pqi_ctrl_info * ctrl_info)8196 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info)
8197 {
8198 pqi_free_irqs(ctrl_info);
8199 pqi_disable_msix_interrupts(ctrl_info);
8200 }
8201
pqi_free_ctrl_resources(struct pqi_ctrl_info * ctrl_info)8202 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info)
8203 {
8204 pqi_stop_heartbeat_timer(ctrl_info);
8205 pqi_free_interrupts(ctrl_info);
8206 if (ctrl_info->queue_memory_base)
8207 dma_free_coherent(&ctrl_info->pci_dev->dev,
8208 ctrl_info->queue_memory_length,
8209 ctrl_info->queue_memory_base,
8210 ctrl_info->queue_memory_base_dma_handle);
8211 if (ctrl_info->admin_queue_memory_base)
8212 dma_free_coherent(&ctrl_info->pci_dev->dev,
8213 ctrl_info->admin_queue_memory_length,
8214 ctrl_info->admin_queue_memory_base,
8215 ctrl_info->admin_queue_memory_base_dma_handle);
8216 pqi_free_all_io_requests(ctrl_info);
8217 if (ctrl_info->error_buffer)
8218 dma_free_coherent(&ctrl_info->pci_dev->dev,
8219 ctrl_info->error_buffer_length,
8220 ctrl_info->error_buffer,
8221 ctrl_info->error_buffer_dma_handle);
8222 if (ctrl_info->iomem_base)
8223 pqi_cleanup_pci_init(ctrl_info);
8224 pqi_free_ctrl_info(ctrl_info);
8225 }
8226
pqi_remove_ctrl(struct pqi_ctrl_info * ctrl_info)8227 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info)
8228 {
8229 pqi_cancel_rescan_worker(ctrl_info);
8230 pqi_cancel_update_time_worker(ctrl_info);
8231 pqi_unregister_scsi(ctrl_info);
8232 if (ctrl_info->pqi_mode_enabled)
8233 pqi_revert_to_sis_mode(ctrl_info);
8234 pqi_free_ctrl_resources(ctrl_info);
8235 }
8236
pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info * ctrl_info)8237 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info)
8238 {
8239 pqi_ctrl_block_scan(ctrl_info);
8240 pqi_scsi_block_requests(ctrl_info);
8241 pqi_ctrl_block_device_reset(ctrl_info);
8242 pqi_ctrl_block_requests(ctrl_info);
8243 pqi_ctrl_wait_until_quiesced(ctrl_info);
8244 pqi_stop_heartbeat_timer(ctrl_info);
8245 }
8246
pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info * ctrl_info)8247 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info)
8248 {
8249 pqi_start_heartbeat_timer(ctrl_info);
8250 pqi_ctrl_unblock_requests(ctrl_info);
8251 pqi_ctrl_unblock_device_reset(ctrl_info);
8252 pqi_scsi_unblock_requests(ctrl_info);
8253 pqi_ctrl_unblock_scan(ctrl_info);
8254 }
8255
pqi_ofa_alloc_mem(struct pqi_ctrl_info * ctrl_info,u32 total_size,u32 chunk_size)8256 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info, u32 total_size, u32 chunk_size)
8257 {
8258 int i;
8259 u32 sg_count;
8260 struct device *dev;
8261 struct pqi_ofa_memory *ofap;
8262 struct pqi_sg_descriptor *mem_descriptor;
8263 dma_addr_t dma_handle;
8264
8265 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
8266
8267 sg_count = DIV_ROUND_UP(total_size, chunk_size);
8268 if (sg_count == 0 || sg_count > PQI_OFA_MAX_SG_DESCRIPTORS)
8269 goto out;
8270
8271 ctrl_info->pqi_ofa_chunk_virt_addr = kmalloc_array(sg_count, sizeof(void *), GFP_KERNEL);
8272 if (!ctrl_info->pqi_ofa_chunk_virt_addr)
8273 goto out;
8274
8275 dev = &ctrl_info->pci_dev->dev;
8276
8277 for (i = 0; i < sg_count; i++) {
8278 ctrl_info->pqi_ofa_chunk_virt_addr[i] =
8279 dma_alloc_coherent(dev, chunk_size, &dma_handle, GFP_KERNEL);
8280 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i])
8281 goto out_free_chunks;
8282 mem_descriptor = &ofap->sg_descriptor[i];
8283 put_unaligned_le64((u64)dma_handle, &mem_descriptor->address);
8284 put_unaligned_le32(chunk_size, &mem_descriptor->length);
8285 }
8286
8287 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags);
8288 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors);
8289 put_unaligned_le32(sg_count * chunk_size, &ofap->bytes_allocated);
8290
8291 return 0;
8292
8293 out_free_chunks:
8294 while (--i >= 0) {
8295 mem_descriptor = &ofap->sg_descriptor[i];
8296 dma_free_coherent(dev, chunk_size,
8297 ctrl_info->pqi_ofa_chunk_virt_addr[i],
8298 get_unaligned_le64(&mem_descriptor->address));
8299 }
8300 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
8301
8302 out:
8303 return -ENOMEM;
8304 }
8305
pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info * ctrl_info)8306 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info)
8307 {
8308 u32 total_size;
8309 u32 chunk_size;
8310 u32 min_chunk_size;
8311
8312 if (ctrl_info->ofa_bytes_requested == 0)
8313 return 0;
8314
8315 total_size = PAGE_ALIGN(ctrl_info->ofa_bytes_requested);
8316 min_chunk_size = DIV_ROUND_UP(total_size, PQI_OFA_MAX_SG_DESCRIPTORS);
8317 min_chunk_size = PAGE_ALIGN(min_chunk_size);
8318
8319 for (chunk_size = total_size; chunk_size >= min_chunk_size;) {
8320 if (pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_size) == 0)
8321 return 0;
8322 chunk_size /= 2;
8323 chunk_size = PAGE_ALIGN(chunk_size);
8324 }
8325
8326 return -ENOMEM;
8327 }
8328
pqi_ofa_setup_host_buffer(struct pqi_ctrl_info * ctrl_info)8329 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info)
8330 {
8331 struct device *dev;
8332 struct pqi_ofa_memory *ofap;
8333
8334 dev = &ctrl_info->pci_dev->dev;
8335
8336 ofap = dma_alloc_coherent(dev, sizeof(*ofap),
8337 &ctrl_info->pqi_ofa_mem_dma_handle, GFP_KERNEL);
8338 if (!ofap)
8339 return;
8340
8341 ctrl_info->pqi_ofa_mem_virt_addr = ofap;
8342
8343 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) {
8344 dev_err(dev,
8345 "failed to allocate host buffer for Online Firmware Activation\n");
8346 dma_free_coherent(dev, sizeof(*ofap), ofap, ctrl_info->pqi_ofa_mem_dma_handle);
8347 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
8348 return;
8349 }
8350
8351 put_unaligned_le16(PQI_OFA_VERSION, &ofap->version);
8352 memcpy(&ofap->signature, PQI_OFA_SIGNATURE, sizeof(ofap->signature));
8353 }
8354
pqi_ofa_free_host_buffer(struct pqi_ctrl_info * ctrl_info)8355 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info)
8356 {
8357 unsigned int i;
8358 struct device *dev;
8359 struct pqi_ofa_memory *ofap;
8360 struct pqi_sg_descriptor *mem_descriptor;
8361 unsigned int num_memory_descriptors;
8362
8363 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
8364 if (!ofap)
8365 return;
8366
8367 dev = &ctrl_info->pci_dev->dev;
8368
8369 if (get_unaligned_le32(&ofap->bytes_allocated) == 0)
8370 goto out;
8371
8372 mem_descriptor = ofap->sg_descriptor;
8373 num_memory_descriptors =
8374 get_unaligned_le16(&ofap->num_memory_descriptors);
8375
8376 for (i = 0; i < num_memory_descriptors; i++) {
8377 dma_free_coherent(dev,
8378 get_unaligned_le32(&mem_descriptor[i].length),
8379 ctrl_info->pqi_ofa_chunk_virt_addr[i],
8380 get_unaligned_le64(&mem_descriptor[i].address));
8381 }
8382 kfree(ctrl_info->pqi_ofa_chunk_virt_addr);
8383
8384 out:
8385 dma_free_coherent(dev, sizeof(*ofap), ofap,
8386 ctrl_info->pqi_ofa_mem_dma_handle);
8387 ctrl_info->pqi_ofa_mem_virt_addr = NULL;
8388 }
8389
pqi_ofa_host_memory_update(struct pqi_ctrl_info * ctrl_info)8390 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info)
8391 {
8392 u32 buffer_length;
8393 struct pqi_vendor_general_request request;
8394 struct pqi_ofa_memory *ofap;
8395
8396 memset(&request, 0, sizeof(request));
8397
8398 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL;
8399 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH,
8400 &request.header.iu_length);
8401 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE,
8402 &request.function_code);
8403
8404 ofap = ctrl_info->pqi_ofa_mem_virt_addr;
8405
8406 if (ofap) {
8407 buffer_length = offsetof(struct pqi_ofa_memory, sg_descriptor) +
8408 get_unaligned_le16(&ofap->num_memory_descriptors) *
8409 sizeof(struct pqi_sg_descriptor);
8410
8411 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle,
8412 &request.data.ofa_memory_allocation.buffer_address);
8413 put_unaligned_le32(buffer_length,
8414 &request.data.ofa_memory_allocation.buffer_length);
8415 }
8416
8417 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL);
8418 }
8419
pqi_ofa_ctrl_restart(struct pqi_ctrl_info * ctrl_info,unsigned int delay_secs)8420 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs)
8421 {
8422 ssleep(delay_secs);
8423
8424 return pqi_ctrl_init_resume(ctrl_info);
8425 }
8426
8427 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = {
8428 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR,
8429 .status = SAM_STAT_CHECK_CONDITION,
8430 };
8431
pqi_fail_all_outstanding_requests(struct pqi_ctrl_info * ctrl_info)8432 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info)
8433 {
8434 unsigned int i;
8435 struct pqi_io_request *io_request;
8436 struct scsi_cmnd *scmd;
8437
8438 for (i = 0; i < ctrl_info->max_io_slots; i++) {
8439 io_request = &ctrl_info->io_request_pool[i];
8440 if (atomic_read(&io_request->refcount) == 0)
8441 continue;
8442
8443 scmd = io_request->scmd;
8444 if (scmd) {
8445 set_host_byte(scmd, DID_NO_CONNECT);
8446 } else {
8447 io_request->status = -ENXIO;
8448 io_request->error_info =
8449 &pqi_ctrl_offline_raid_error_info;
8450 }
8451
8452 io_request->io_complete_callback(io_request,
8453 io_request->context);
8454 }
8455 }
8456
pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info * ctrl_info)8457 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info)
8458 {
8459 pqi_perform_lockup_action();
8460 pqi_stop_heartbeat_timer(ctrl_info);
8461 pqi_free_interrupts(ctrl_info);
8462 pqi_cancel_rescan_worker(ctrl_info);
8463 pqi_cancel_update_time_worker(ctrl_info);
8464 pqi_ctrl_wait_until_quiesced(ctrl_info);
8465 pqi_fail_all_outstanding_requests(ctrl_info);
8466 pqi_ctrl_unblock_requests(ctrl_info);
8467 }
8468
pqi_ctrl_offline_worker(struct work_struct * work)8469 static void pqi_ctrl_offline_worker(struct work_struct *work)
8470 {
8471 struct pqi_ctrl_info *ctrl_info;
8472
8473 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work);
8474 pqi_take_ctrl_offline_deferred(ctrl_info);
8475 }
8476
pqi_take_ctrl_offline(struct pqi_ctrl_info * ctrl_info)8477 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info)
8478 {
8479 if (!ctrl_info->controller_online)
8480 return;
8481
8482 ctrl_info->controller_online = false;
8483 ctrl_info->pqi_mode_enabled = false;
8484 pqi_ctrl_block_requests(ctrl_info);
8485 if (!pqi_disable_ctrl_shutdown)
8486 sis_shutdown_ctrl(ctrl_info);
8487 pci_disable_device(ctrl_info->pci_dev);
8488 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n");
8489 schedule_work(&ctrl_info->ctrl_offline_work);
8490 }
8491
pqi_print_ctrl_info(struct pci_dev * pci_dev,const struct pci_device_id * id)8492 static void pqi_print_ctrl_info(struct pci_dev *pci_dev,
8493 const struct pci_device_id *id)
8494 {
8495 char *ctrl_description;
8496
8497 if (id->driver_data)
8498 ctrl_description = (char *)id->driver_data;
8499 else
8500 ctrl_description = "Microchip Smart Family Controller";
8501
8502 dev_info(&pci_dev->dev, "%s found\n", ctrl_description);
8503 }
8504
pqi_pci_probe(struct pci_dev * pci_dev,const struct pci_device_id * id)8505 static int pqi_pci_probe(struct pci_dev *pci_dev,
8506 const struct pci_device_id *id)
8507 {
8508 int rc;
8509 int node, cp_node;
8510 struct pqi_ctrl_info *ctrl_info;
8511
8512 pqi_print_ctrl_info(pci_dev, id);
8513
8514 if (pqi_disable_device_id_wildcards &&
8515 id->subvendor == PCI_ANY_ID &&
8516 id->subdevice == PCI_ANY_ID) {
8517 dev_warn(&pci_dev->dev,
8518 "controller not probed because device ID wildcards are disabled\n");
8519 return -ENODEV;
8520 }
8521
8522 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID)
8523 dev_warn(&pci_dev->dev,
8524 "controller device ID matched using wildcards\n");
8525
8526 node = dev_to_node(&pci_dev->dev);
8527 if (node == NUMA_NO_NODE) {
8528 cp_node = cpu_to_node(0);
8529 if (cp_node == NUMA_NO_NODE)
8530 cp_node = 0;
8531 set_dev_node(&pci_dev->dev, cp_node);
8532 }
8533
8534 ctrl_info = pqi_alloc_ctrl_info(node);
8535 if (!ctrl_info) {
8536 dev_err(&pci_dev->dev,
8537 "failed to allocate controller info block\n");
8538 return -ENOMEM;
8539 }
8540
8541 ctrl_info->pci_dev = pci_dev;
8542
8543 rc = pqi_pci_init(ctrl_info);
8544 if (rc)
8545 goto error;
8546
8547 rc = pqi_ctrl_init(ctrl_info);
8548 if (rc)
8549 goto error;
8550
8551 return 0;
8552
8553 error:
8554 pqi_remove_ctrl(ctrl_info);
8555
8556 return rc;
8557 }
8558
pqi_pci_remove(struct pci_dev * pci_dev)8559 static void pqi_pci_remove(struct pci_dev *pci_dev)
8560 {
8561 struct pqi_ctrl_info *ctrl_info;
8562
8563 ctrl_info = pci_get_drvdata(pci_dev);
8564 if (!ctrl_info)
8565 return;
8566
8567 pqi_remove_ctrl(ctrl_info);
8568 }
8569
pqi_crash_if_pending_command(struct pqi_ctrl_info * ctrl_info)8570 static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info)
8571 {
8572 unsigned int i;
8573 struct pqi_io_request *io_request;
8574 struct scsi_cmnd *scmd;
8575
8576 for (i = 0; i < ctrl_info->max_io_slots; i++) {
8577 io_request = &ctrl_info->io_request_pool[i];
8578 if (atomic_read(&io_request->refcount) == 0)
8579 continue;
8580 scmd = io_request->scmd;
8581 WARN_ON(scmd != NULL); /* IO command from SML */
8582 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/
8583 }
8584 }
8585
pqi_shutdown(struct pci_dev * pci_dev)8586 static void pqi_shutdown(struct pci_dev *pci_dev)
8587 {
8588 int rc;
8589 struct pqi_ctrl_info *ctrl_info;
8590
8591 ctrl_info = pci_get_drvdata(pci_dev);
8592 if (!ctrl_info) {
8593 dev_err(&pci_dev->dev,
8594 "cache could not be flushed\n");
8595 return;
8596 }
8597
8598 pqi_wait_until_ofa_finished(ctrl_info);
8599
8600 pqi_scsi_block_requests(ctrl_info);
8601 pqi_ctrl_block_device_reset(ctrl_info);
8602 pqi_ctrl_block_requests(ctrl_info);
8603 pqi_ctrl_wait_until_quiesced(ctrl_info);
8604
8605 /*
8606 * Write all data in the controller's battery-backed cache to
8607 * storage.
8608 */
8609 rc = pqi_flush_cache(ctrl_info, SHUTDOWN);
8610 if (rc)
8611 dev_err(&pci_dev->dev,
8612 "unable to flush controller cache\n");
8613
8614 pqi_crash_if_pending_command(ctrl_info);
8615 pqi_reset(ctrl_info);
8616 }
8617
pqi_process_lockup_action_param(void)8618 static void pqi_process_lockup_action_param(void)
8619 {
8620 unsigned int i;
8621
8622 if (!pqi_lockup_action_param)
8623 return;
8624
8625 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) {
8626 if (strcmp(pqi_lockup_action_param,
8627 pqi_lockup_actions[i].name) == 0) {
8628 pqi_lockup_action = pqi_lockup_actions[i].action;
8629 return;
8630 }
8631 }
8632
8633 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n",
8634 DRIVER_NAME_SHORT, pqi_lockup_action_param);
8635 }
8636
pqi_process_module_params(void)8637 static void pqi_process_module_params(void)
8638 {
8639 pqi_process_lockup_action_param();
8640 }
8641
pqi_suspend(struct pci_dev * pci_dev,pm_message_t state)8642 static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state)
8643 {
8644 struct pqi_ctrl_info *ctrl_info;
8645
8646 ctrl_info = pci_get_drvdata(pci_dev);
8647
8648 pqi_wait_until_ofa_finished(ctrl_info);
8649
8650 pqi_ctrl_block_scan(ctrl_info);
8651 pqi_scsi_block_requests(ctrl_info);
8652 pqi_ctrl_block_device_reset(ctrl_info);
8653 pqi_ctrl_block_requests(ctrl_info);
8654 pqi_ctrl_wait_until_quiesced(ctrl_info);
8655 pqi_flush_cache(ctrl_info, SUSPEND);
8656 pqi_stop_heartbeat_timer(ctrl_info);
8657
8658 pqi_crash_if_pending_command(ctrl_info);
8659
8660 if (state.event == PM_EVENT_FREEZE)
8661 return 0;
8662
8663 pci_save_state(pci_dev);
8664 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state));
8665
8666 ctrl_info->controller_online = false;
8667 ctrl_info->pqi_mode_enabled = false;
8668
8669 return 0;
8670 }
8671
pqi_resume(struct pci_dev * pci_dev)8672 static __maybe_unused int pqi_resume(struct pci_dev *pci_dev)
8673 {
8674 int rc;
8675 struct pqi_ctrl_info *ctrl_info;
8676
8677 ctrl_info = pci_get_drvdata(pci_dev);
8678
8679 if (pci_dev->current_state != PCI_D0) {
8680 ctrl_info->max_hw_queue_index = 0;
8681 pqi_free_interrupts(ctrl_info);
8682 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX);
8683 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler,
8684 IRQF_SHARED, DRIVER_NAME_SHORT,
8685 &ctrl_info->queue_groups[0]);
8686 if (rc) {
8687 dev_err(&ctrl_info->pci_dev->dev,
8688 "irq %u init failed with error %d\n",
8689 pci_dev->irq, rc);
8690 return rc;
8691 }
8692 pqi_ctrl_unblock_device_reset(ctrl_info);
8693 pqi_ctrl_unblock_requests(ctrl_info);
8694 pqi_scsi_unblock_requests(ctrl_info);
8695 pqi_ctrl_unblock_scan(ctrl_info);
8696 return 0;
8697 }
8698
8699 pci_set_power_state(pci_dev, PCI_D0);
8700 pci_restore_state(pci_dev);
8701
8702 pqi_ctrl_unblock_device_reset(ctrl_info);
8703 pqi_ctrl_unblock_requests(ctrl_info);
8704 pqi_scsi_unblock_requests(ctrl_info);
8705 pqi_ctrl_unblock_scan(ctrl_info);
8706
8707 return pqi_ctrl_init_resume(ctrl_info);
8708 }
8709
8710 /* Define the PCI IDs for the controllers that we support. */
8711 static const struct pci_device_id pqi_pci_id_table[] = {
8712 {
8713 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8714 0x105b, 0x1211)
8715 },
8716 {
8717 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8718 0x105b, 0x1321)
8719 },
8720 {
8721 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8722 0x152d, 0x8a22)
8723 },
8724 {
8725 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8726 0x152d, 0x8a23)
8727 },
8728 {
8729 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8730 0x152d, 0x8a24)
8731 },
8732 {
8733 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8734 0x152d, 0x8a36)
8735 },
8736 {
8737 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8738 0x152d, 0x8a37)
8739 },
8740 {
8741 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8742 0x193d, 0x8460)
8743 },
8744 {
8745 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8746 0x193d, 0x1104)
8747 },
8748 {
8749 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8750 0x193d, 0x1105)
8751 },
8752 {
8753 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8754 0x193d, 0x1106)
8755 },
8756 {
8757 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8758 0x193d, 0x1107)
8759 },
8760 {
8761 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8762 0x193d, 0x1108)
8763 },
8764 {
8765 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8766 0x193d, 0x1109)
8767 },
8768 {
8769 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8770 0x193d, 0x8460)
8771 },
8772 {
8773 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8774 0x193d, 0x8461)
8775 },
8776 {
8777 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8778 0x193d, 0xc460)
8779 },
8780 {
8781 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8782 0x193d, 0xc461)
8783 },
8784 {
8785 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8786 0x193d, 0xf460)
8787 },
8788 {
8789 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8790 0x193d, 0xf461)
8791 },
8792 {
8793 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8794 0x1bd4, 0x0045)
8795 },
8796 {
8797 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8798 0x1bd4, 0x0046)
8799 },
8800 {
8801 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8802 0x1bd4, 0x0047)
8803 },
8804 {
8805 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8806 0x1bd4, 0x0048)
8807 },
8808 {
8809 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8810 0x1bd4, 0x004a)
8811 },
8812 {
8813 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8814 0x1bd4, 0x004b)
8815 },
8816 {
8817 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8818 0x1bd4, 0x004c)
8819 },
8820 {
8821 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8822 0x1bd4, 0x004f)
8823 },
8824 {
8825 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8826 0x1bd4, 0x0051)
8827 },
8828 {
8829 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8830 0x1bd4, 0x0052)
8831 },
8832 {
8833 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8834 0x1bd4, 0x0053)
8835 },
8836 {
8837 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8838 0x1bd4, 0x0054)
8839 },
8840 {
8841 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8842 0x19e5, 0xd227)
8843 },
8844 {
8845 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8846 0x19e5, 0xd228)
8847 },
8848 {
8849 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8850 0x19e5, 0xd229)
8851 },
8852 {
8853 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8854 0x19e5, 0xd22a)
8855 },
8856 {
8857 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8858 0x19e5, 0xd22b)
8859 },
8860 {
8861 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8862 0x19e5, 0xd22c)
8863 },
8864 {
8865 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8866 PCI_VENDOR_ID_ADAPTEC2, 0x0110)
8867 },
8868 {
8869 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8870 PCI_VENDOR_ID_ADAPTEC2, 0x0608)
8871 },
8872 {
8873 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8874 PCI_VENDOR_ID_ADAPTEC2, 0x0800)
8875 },
8876 {
8877 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8878 PCI_VENDOR_ID_ADAPTEC2, 0x0801)
8879 },
8880 {
8881 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8882 PCI_VENDOR_ID_ADAPTEC2, 0x0802)
8883 },
8884 {
8885 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8886 PCI_VENDOR_ID_ADAPTEC2, 0x0803)
8887 },
8888 {
8889 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8890 PCI_VENDOR_ID_ADAPTEC2, 0x0804)
8891 },
8892 {
8893 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8894 PCI_VENDOR_ID_ADAPTEC2, 0x0805)
8895 },
8896 {
8897 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8898 PCI_VENDOR_ID_ADAPTEC2, 0x0806)
8899 },
8900 {
8901 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8902 PCI_VENDOR_ID_ADAPTEC2, 0x0807)
8903 },
8904 {
8905 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8906 PCI_VENDOR_ID_ADAPTEC2, 0x0808)
8907 },
8908 {
8909 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8910 PCI_VENDOR_ID_ADAPTEC2, 0x0809)
8911 },
8912 {
8913 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8914 PCI_VENDOR_ID_ADAPTEC2, 0x080a)
8915 },
8916 {
8917 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8918 PCI_VENDOR_ID_ADAPTEC2, 0x0900)
8919 },
8920 {
8921 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8922 PCI_VENDOR_ID_ADAPTEC2, 0x0901)
8923 },
8924 {
8925 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8926 PCI_VENDOR_ID_ADAPTEC2, 0x0902)
8927 },
8928 {
8929 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8930 PCI_VENDOR_ID_ADAPTEC2, 0x0903)
8931 },
8932 {
8933 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8934 PCI_VENDOR_ID_ADAPTEC2, 0x0904)
8935 },
8936 {
8937 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8938 PCI_VENDOR_ID_ADAPTEC2, 0x0905)
8939 },
8940 {
8941 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8942 PCI_VENDOR_ID_ADAPTEC2, 0x0906)
8943 },
8944 {
8945 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8946 PCI_VENDOR_ID_ADAPTEC2, 0x0907)
8947 },
8948 {
8949 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8950 PCI_VENDOR_ID_ADAPTEC2, 0x0908)
8951 },
8952 {
8953 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8954 PCI_VENDOR_ID_ADAPTEC2, 0x090a)
8955 },
8956 {
8957 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8958 PCI_VENDOR_ID_ADAPTEC2, 0x1200)
8959 },
8960 {
8961 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8962 PCI_VENDOR_ID_ADAPTEC2, 0x1201)
8963 },
8964 {
8965 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8966 PCI_VENDOR_ID_ADAPTEC2, 0x1202)
8967 },
8968 {
8969 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8970 PCI_VENDOR_ID_ADAPTEC2, 0x1280)
8971 },
8972 {
8973 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8974 PCI_VENDOR_ID_ADAPTEC2, 0x1281)
8975 },
8976 {
8977 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8978 PCI_VENDOR_ID_ADAPTEC2, 0x1282)
8979 },
8980 {
8981 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8982 PCI_VENDOR_ID_ADAPTEC2, 0x1300)
8983 },
8984 {
8985 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8986 PCI_VENDOR_ID_ADAPTEC2, 0x1301)
8987 },
8988 {
8989 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8990 PCI_VENDOR_ID_ADAPTEC2, 0x1302)
8991 },
8992 {
8993 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8994 PCI_VENDOR_ID_ADAPTEC2, 0x1303)
8995 },
8996 {
8997 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
8998 PCI_VENDOR_ID_ADAPTEC2, 0x1380)
8999 },
9000 {
9001 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9002 PCI_VENDOR_ID_ADAPTEC2, 0x1400)
9003 },
9004 {
9005 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9006 PCI_VENDOR_ID_ADAPTEC2, 0x1402)
9007 },
9008 {
9009 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9010 PCI_VENDOR_ID_ADAPTEC2, 0x1410)
9011 },
9012 {
9013 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9014 PCI_VENDOR_ID_ADAPTEC2, 0x1411)
9015 },
9016 {
9017 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9018 PCI_VENDOR_ID_ADAPTEC2, 0x1412)
9019 },
9020 {
9021 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9022 PCI_VENDOR_ID_ADAPTEC2, 0x1420)
9023 },
9024 {
9025 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9026 PCI_VENDOR_ID_ADAPTEC2, 0x1430)
9027 },
9028 {
9029 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9030 PCI_VENDOR_ID_ADAPTEC2, 0x1440)
9031 },
9032 {
9033 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9034 PCI_VENDOR_ID_ADAPTEC2, 0x1441)
9035 },
9036 {
9037 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9038 PCI_VENDOR_ID_ADAPTEC2, 0x1450)
9039 },
9040 {
9041 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9042 PCI_VENDOR_ID_ADAPTEC2, 0x1452)
9043 },
9044 {
9045 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9046 PCI_VENDOR_ID_ADAPTEC2, 0x1460)
9047 },
9048 {
9049 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9050 PCI_VENDOR_ID_ADAPTEC2, 0x1461)
9051 },
9052 {
9053 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9054 PCI_VENDOR_ID_ADAPTEC2, 0x1462)
9055 },
9056 {
9057 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9058 PCI_VENDOR_ID_ADAPTEC2, 0x1470)
9059 },
9060 {
9061 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9062 PCI_VENDOR_ID_ADAPTEC2, 0x1471)
9063 },
9064 {
9065 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9066 PCI_VENDOR_ID_ADAPTEC2, 0x1472)
9067 },
9068 {
9069 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9070 PCI_VENDOR_ID_ADAPTEC2, 0x1480)
9071 },
9072 {
9073 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9074 PCI_VENDOR_ID_ADAPTEC2, 0x1490)
9075 },
9076 {
9077 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9078 PCI_VENDOR_ID_ADAPTEC2, 0x1491)
9079 },
9080 {
9081 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9082 PCI_VENDOR_ID_ADAPTEC2, 0x14a0)
9083 },
9084 {
9085 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9086 PCI_VENDOR_ID_ADAPTEC2, 0x14a1)
9087 },
9088 {
9089 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9090 PCI_VENDOR_ID_ADAPTEC2, 0x14b0)
9091 },
9092 {
9093 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9094 PCI_VENDOR_ID_ADAPTEC2, 0x14b1)
9095 },
9096 {
9097 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9098 PCI_VENDOR_ID_ADAPTEC2, 0x14c0)
9099 },
9100 {
9101 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9102 PCI_VENDOR_ID_ADAPTEC2, 0x14c1)
9103 },
9104 {
9105 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9106 PCI_VENDOR_ID_ADAPTEC2, 0x14d0)
9107 },
9108 {
9109 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9110 PCI_VENDOR_ID_ADAPTEC2, 0x14e0)
9111 },
9112 {
9113 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9114 PCI_VENDOR_ID_ADAPTEC2, 0x14f0)
9115 },
9116 {
9117 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9118 PCI_VENDOR_ID_ADVANTECH, 0x8312)
9119 },
9120 {
9121 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9122 PCI_VENDOR_ID_DELL, 0x1fe0)
9123 },
9124 {
9125 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9126 PCI_VENDOR_ID_HP, 0x0600)
9127 },
9128 {
9129 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9130 PCI_VENDOR_ID_HP, 0x0601)
9131 },
9132 {
9133 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9134 PCI_VENDOR_ID_HP, 0x0602)
9135 },
9136 {
9137 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9138 PCI_VENDOR_ID_HP, 0x0603)
9139 },
9140 {
9141 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9142 PCI_VENDOR_ID_HP, 0x0609)
9143 },
9144 {
9145 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9146 PCI_VENDOR_ID_HP, 0x0650)
9147 },
9148 {
9149 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9150 PCI_VENDOR_ID_HP, 0x0651)
9151 },
9152 {
9153 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9154 PCI_VENDOR_ID_HP, 0x0652)
9155 },
9156 {
9157 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9158 PCI_VENDOR_ID_HP, 0x0653)
9159 },
9160 {
9161 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9162 PCI_VENDOR_ID_HP, 0x0654)
9163 },
9164 {
9165 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9166 PCI_VENDOR_ID_HP, 0x0655)
9167 },
9168 {
9169 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9170 PCI_VENDOR_ID_HP, 0x0700)
9171 },
9172 {
9173 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9174 PCI_VENDOR_ID_HP, 0x0701)
9175 },
9176 {
9177 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9178 PCI_VENDOR_ID_HP, 0x1001)
9179 },
9180 {
9181 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9182 PCI_VENDOR_ID_HP, 0x1002)
9183 },
9184 {
9185 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9186 PCI_VENDOR_ID_HP, 0x1100)
9187 },
9188 {
9189 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9190 PCI_VENDOR_ID_HP, 0x1101)
9191 },
9192 {
9193 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9194 0x1590, 0x0294)
9195 },
9196 {
9197 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9198 0x1590, 0x02db)
9199 },
9200 {
9201 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9202 0x1590, 0x02dc)
9203 },
9204 {
9205 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9206 0x1590, 0x032e)
9207 },
9208 {
9209 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9210 0x1d8d, 0x0800)
9211 },
9212 {
9213 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9214 0x1d8d, 0x0908)
9215 },
9216 {
9217 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9218 0x1d8d, 0x0806)
9219 },
9220 {
9221 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9222 0x1d8d, 0x0916)
9223 },
9224 {
9225 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9226 PCI_VENDOR_ID_GIGABYTE, 0x1000)
9227 },
9228 {
9229 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9230 0x1dfc, 0x3161)
9231 },
9232 {
9233 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9234 0x1cf2, 0x5445)
9235 },
9236 {
9237 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9238 0x1cf2, 0x5446)
9239 },
9240 {
9241 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9242 0x1cf2, 0x5447)
9243 },
9244 {
9245 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9246 0x1cf2, 0x0b27)
9247 },
9248 {
9249 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9250 0x1cf2, 0x0b29)
9251 },
9252 {
9253 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9254 0x1cf2, 0x0b45)
9255 },
9256 {
9257 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
9258 PCI_ANY_ID, PCI_ANY_ID)
9259 },
9260 { 0 }
9261 };
9262
9263 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table);
9264
9265 static struct pci_driver pqi_pci_driver = {
9266 .name = DRIVER_NAME_SHORT,
9267 .id_table = pqi_pci_id_table,
9268 .probe = pqi_pci_probe,
9269 .remove = pqi_pci_remove,
9270 .shutdown = pqi_shutdown,
9271 #if defined(CONFIG_PM)
9272 .suspend = pqi_suspend,
9273 .resume = pqi_resume,
9274 #endif
9275 };
9276
pqi_init(void)9277 static int __init pqi_init(void)
9278 {
9279 int rc;
9280
9281 pr_info(DRIVER_NAME "\n");
9282
9283 pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions);
9284 if (!pqi_sas_transport_template)
9285 return -ENODEV;
9286
9287 pqi_process_module_params();
9288
9289 rc = pci_register_driver(&pqi_pci_driver);
9290 if (rc)
9291 sas_release_transport(pqi_sas_transport_template);
9292
9293 return rc;
9294 }
9295
pqi_cleanup(void)9296 static void __exit pqi_cleanup(void)
9297 {
9298 pci_unregister_driver(&pqi_pci_driver);
9299 sas_release_transport(pqi_sas_transport_template);
9300 }
9301
9302 module_init(pqi_init);
9303 module_exit(pqi_cleanup);
9304
verify_structures(void)9305 static void __attribute__((unused)) verify_structures(void)
9306 {
9307 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9308 sis_host_to_ctrl_doorbell) != 0x20);
9309 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9310 sis_interrupt_mask) != 0x34);
9311 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9312 sis_ctrl_to_host_doorbell) != 0x9c);
9313 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9314 sis_ctrl_to_host_doorbell_clear) != 0xa0);
9315 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9316 sis_driver_scratch) != 0xb0);
9317 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9318 sis_product_identifier) != 0xb4);
9319 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9320 sis_firmware_status) != 0xbc);
9321 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9322 sis_mailbox) != 0x1000);
9323 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers,
9324 pqi_registers) != 0x4000);
9325
9326 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
9327 iu_type) != 0x0);
9328 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
9329 iu_length) != 0x2);
9330 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
9331 response_queue_id) != 0x4);
9332 BUILD_BUG_ON(offsetof(struct pqi_iu_header,
9333 driver_flags) != 0x6);
9334 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8);
9335
9336 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9337 status) != 0x0);
9338 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9339 service_response) != 0x1);
9340 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9341 data_present) != 0x2);
9342 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9343 reserved) != 0x3);
9344 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9345 residual_count) != 0x4);
9346 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9347 data_length) != 0x8);
9348 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9349 reserved1) != 0xa);
9350 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info,
9351 data) != 0xc);
9352 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c);
9353
9354 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9355 data_in_result) != 0x0);
9356 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9357 data_out_result) != 0x1);
9358 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9359 reserved) != 0x2);
9360 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9361 status) != 0x5);
9362 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9363 status_qualifier) != 0x6);
9364 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9365 sense_data_length) != 0x8);
9366 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9367 response_data_length) != 0xa);
9368 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9369 data_in_transferred) != 0xc);
9370 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9371 data_out_transferred) != 0x10);
9372 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info,
9373 data) != 0x14);
9374 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114);
9375
9376 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9377 signature) != 0x0);
9378 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9379 function_and_status_code) != 0x8);
9380 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9381 max_admin_iq_elements) != 0x10);
9382 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9383 max_admin_oq_elements) != 0x11);
9384 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9385 admin_iq_element_length) != 0x12);
9386 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9387 admin_oq_element_length) != 0x13);
9388 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9389 max_reset_timeout) != 0x14);
9390 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9391 legacy_intx_status) != 0x18);
9392 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9393 legacy_intx_mask_set) != 0x1c);
9394 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9395 legacy_intx_mask_clear) != 0x20);
9396 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9397 device_status) != 0x40);
9398 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9399 admin_iq_pi_offset) != 0x48);
9400 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9401 admin_oq_ci_offset) != 0x50);
9402 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9403 admin_iq_element_array_addr) != 0x58);
9404 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9405 admin_oq_element_array_addr) != 0x60);
9406 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9407 admin_iq_ci_addr) != 0x68);
9408 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9409 admin_oq_pi_addr) != 0x70);
9410 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9411 admin_iq_num_elements) != 0x78);
9412 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9413 admin_oq_num_elements) != 0x79);
9414 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9415 admin_queue_int_msg_num) != 0x7a);
9416 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9417 device_error) != 0x80);
9418 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9419 error_details) != 0x88);
9420 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9421 device_reset) != 0x90);
9422 BUILD_BUG_ON(offsetof(struct pqi_device_registers,
9423 power_action) != 0x94);
9424 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100);
9425
9426 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9427 header.iu_type) != 0);
9428 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9429 header.iu_length) != 2);
9430 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9431 header.driver_flags) != 6);
9432 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9433 request_id) != 8);
9434 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9435 function_code) != 10);
9436 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9437 data.report_device_capability.buffer_length) != 44);
9438 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9439 data.report_device_capability.sg_descriptor) != 48);
9440 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9441 data.create_operational_iq.queue_id) != 12);
9442 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9443 data.create_operational_iq.element_array_addr) != 16);
9444 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9445 data.create_operational_iq.ci_addr) != 24);
9446 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9447 data.create_operational_iq.num_elements) != 32);
9448 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9449 data.create_operational_iq.element_length) != 34);
9450 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9451 data.create_operational_iq.queue_protocol) != 36);
9452 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9453 data.create_operational_oq.queue_id) != 12);
9454 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9455 data.create_operational_oq.element_array_addr) != 16);
9456 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9457 data.create_operational_oq.pi_addr) != 24);
9458 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9459 data.create_operational_oq.num_elements) != 32);
9460 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9461 data.create_operational_oq.element_length) != 34);
9462 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9463 data.create_operational_oq.queue_protocol) != 36);
9464 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9465 data.create_operational_oq.int_msg_num) != 40);
9466 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9467 data.create_operational_oq.coalescing_count) != 42);
9468 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9469 data.create_operational_oq.min_coalescing_time) != 44);
9470 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9471 data.create_operational_oq.max_coalescing_time) != 48);
9472 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request,
9473 data.delete_operational_queue.queue_id) != 12);
9474 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64);
9475 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
9476 data.create_operational_iq) != 64 - 11);
9477 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
9478 data.create_operational_oq) != 64 - 11);
9479 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request,
9480 data.delete_operational_queue) != 64 - 11);
9481
9482 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9483 header.iu_type) != 0);
9484 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9485 header.iu_length) != 2);
9486 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9487 header.driver_flags) != 6);
9488 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9489 request_id) != 8);
9490 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9491 function_code) != 10);
9492 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9493 status) != 11);
9494 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9495 data.create_operational_iq.status_descriptor) != 12);
9496 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9497 data.create_operational_iq.iq_pi_offset) != 16);
9498 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9499 data.create_operational_oq.status_descriptor) != 12);
9500 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response,
9501 data.create_operational_oq.oq_ci_offset) != 16);
9502 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64);
9503
9504 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9505 header.iu_type) != 0);
9506 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9507 header.iu_length) != 2);
9508 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9509 header.response_queue_id) != 4);
9510 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9511 header.driver_flags) != 6);
9512 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9513 request_id) != 8);
9514 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9515 nexus_id) != 10);
9516 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9517 buffer_length) != 12);
9518 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9519 lun_number) != 16);
9520 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9521 protocol_specific) != 24);
9522 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9523 error_index) != 27);
9524 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9525 cdb) != 32);
9526 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9527 timeout) != 60);
9528 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request,
9529 sg_descriptors) != 64);
9530 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) !=
9531 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
9532
9533 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9534 header.iu_type) != 0);
9535 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9536 header.iu_length) != 2);
9537 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9538 header.response_queue_id) != 4);
9539 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9540 header.driver_flags) != 6);
9541 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9542 request_id) != 8);
9543 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9544 nexus_id) != 12);
9545 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9546 buffer_length) != 16);
9547 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9548 data_encryption_key_index) != 22);
9549 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9550 encrypt_tweak_lower) != 24);
9551 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9552 encrypt_tweak_upper) != 28);
9553 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9554 cdb) != 32);
9555 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9556 error_index) != 48);
9557 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9558 num_sg_descriptors) != 50);
9559 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9560 cdb_length) != 51);
9561 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9562 lun_number) != 52);
9563 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request,
9564 sg_descriptors) != 64);
9565 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) !=
9566 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH);
9567
9568 BUILD_BUG_ON(offsetof(struct pqi_io_response,
9569 header.iu_type) != 0);
9570 BUILD_BUG_ON(offsetof(struct pqi_io_response,
9571 header.iu_length) != 2);
9572 BUILD_BUG_ON(offsetof(struct pqi_io_response,
9573 request_id) != 8);
9574 BUILD_BUG_ON(offsetof(struct pqi_io_response,
9575 error_index) != 10);
9576
9577 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9578 header.iu_type) != 0);
9579 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9580 header.iu_length) != 2);
9581 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9582 header.response_queue_id) != 4);
9583 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9584 request_id) != 8);
9585 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9586 data.report_event_configuration.buffer_length) != 12);
9587 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9588 data.report_event_configuration.sg_descriptors) != 16);
9589 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9590 data.set_event_configuration.global_event_oq_id) != 10);
9591 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9592 data.set_event_configuration.buffer_length) != 12);
9593 BUILD_BUG_ON(offsetof(struct pqi_general_management_request,
9594 data.set_event_configuration.sg_descriptors) != 16);
9595
9596 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
9597 max_inbound_iu_length) != 6);
9598 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor,
9599 max_outbound_iu_length) != 14);
9600 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16);
9601
9602 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9603 data_length) != 0);
9604 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9605 iq_arbitration_priority_support_bitmask) != 8);
9606 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9607 maximum_aw_a) != 9);
9608 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9609 maximum_aw_b) != 10);
9610 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9611 maximum_aw_c) != 11);
9612 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9613 max_inbound_queues) != 16);
9614 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9615 max_elements_per_iq) != 18);
9616 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9617 max_iq_element_length) != 24);
9618 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9619 min_iq_element_length) != 26);
9620 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9621 max_outbound_queues) != 30);
9622 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9623 max_elements_per_oq) != 32);
9624 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9625 intr_coalescing_time_granularity) != 34);
9626 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9627 max_oq_element_length) != 36);
9628 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9629 min_oq_element_length) != 38);
9630 BUILD_BUG_ON(offsetof(struct pqi_device_capability,
9631 iu_layer_descriptors) != 64);
9632 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576);
9633
9634 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
9635 event_type) != 0);
9636 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor,
9637 oq_id) != 2);
9638 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4);
9639
9640 BUILD_BUG_ON(offsetof(struct pqi_event_config,
9641 num_event_descriptors) != 2);
9642 BUILD_BUG_ON(offsetof(struct pqi_event_config,
9643 descriptors) != 4);
9644
9645 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS !=
9646 ARRAY_SIZE(pqi_supported_event_types));
9647
9648 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9649 header.iu_type) != 0);
9650 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9651 header.iu_length) != 2);
9652 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9653 event_type) != 8);
9654 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9655 event_id) != 10);
9656 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9657 additional_event_id) != 12);
9658 BUILD_BUG_ON(offsetof(struct pqi_event_response,
9659 data) != 16);
9660 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32);
9661
9662 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9663 header.iu_type) != 0);
9664 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9665 header.iu_length) != 2);
9666 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9667 event_type) != 8);
9668 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9669 event_id) != 10);
9670 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request,
9671 additional_event_id) != 12);
9672 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16);
9673
9674 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9675 header.iu_type) != 0);
9676 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9677 header.iu_length) != 2);
9678 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9679 request_id) != 8);
9680 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9681 nexus_id) != 10);
9682 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9683 timeout) != 14);
9684 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9685 lun_number) != 16);
9686 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9687 protocol_specific) != 24);
9688 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9689 outbound_queue_id_to_manage) != 26);
9690 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9691 request_id_to_manage) != 28);
9692 BUILD_BUG_ON(offsetof(struct pqi_task_management_request,
9693 task_management_function) != 30);
9694 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32);
9695
9696 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9697 header.iu_type) != 0);
9698 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9699 header.iu_length) != 2);
9700 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9701 request_id) != 8);
9702 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9703 nexus_id) != 10);
9704 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9705 additional_response_info) != 12);
9706 BUILD_BUG_ON(offsetof(struct pqi_task_management_response,
9707 response_code) != 15);
9708 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16);
9709
9710 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9711 configured_logical_drive_count) != 0);
9712 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9713 configuration_signature) != 1);
9714 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9715 firmware_version_short) != 5);
9716 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9717 extended_logical_unit_count) != 154);
9718 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9719 firmware_build_number) != 190);
9720 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9721 vendor_id) != 200);
9722 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9723 product_id) != 208);
9724 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9725 extra_controller_flags) != 286);
9726 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9727 controller_mode) != 292);
9728 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9729 spare_part_number) != 293);
9730 BUILD_BUG_ON(offsetof(struct bmic_identify_controller,
9731 firmware_version_long) != 325);
9732
9733 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9734 phys_bay_in_box) != 115);
9735 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9736 device_type) != 120);
9737 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9738 redundant_path_present_map) != 1736);
9739 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9740 active_path_number) != 1738);
9741 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9742 alternate_paths_phys_connector) != 1739);
9743 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9744 alternate_paths_phys_box_on_port) != 1755);
9745 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device,
9746 current_queue_depth_limit) != 1796);
9747 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560);
9748
9749 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_buffer_header) != 4);
9750 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header,
9751 page_code) != 0);
9752 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header,
9753 subpage_code) != 1);
9754 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header,
9755 buffer_length) != 2);
9756
9757 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_page_header) != 4);
9758 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header,
9759 page_code) != 0);
9760 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header,
9761 subpage_code) != 1);
9762 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header,
9763 page_length) != 2);
9764
9765 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_io_page_aio_subpage)
9766 != 18);
9767 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9768 header) != 0);
9769 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9770 firmware_read_support) != 4);
9771 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9772 driver_read_support) != 5);
9773 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9774 firmware_write_support) != 6);
9775 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9776 driver_write_support) != 7);
9777 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9778 max_transfer_encrypted_sas_sata) != 8);
9779 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9780 max_transfer_encrypted_nvme) != 10);
9781 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9782 max_write_raid_5_6) != 12);
9783 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9784 max_write_raid_1_10_2drive) != 14);
9785 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage,
9786 max_write_raid_1_10_3drive) != 16);
9787
9788 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255);
9789 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255);
9790 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH %
9791 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9792 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH %
9793 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9794 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560);
9795 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH %
9796 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9797 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560);
9798 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH %
9799 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0);
9800
9801 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS);
9802 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >=
9803 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP);
9804 }
9805