1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2007 - 2012 Realtek Corporation. */
3
4 #ifndef __RTW_PWRCTRL_H_
5 #define __RTW_PWRCTRL_H_
6
7 #include "osdep_service.h"
8 #include "drv_types.h"
9
10 #define FW_PWR0 0
11 #define FW_PWR1 1
12 #define FW_PWR2 2
13 #define FW_PWR3 3
14 #define HW_PWR0 7
15 #define HW_PWR1 6
16 #define HW_PWR2 2
17 #define HW_PWR3 0
18 #define HW_PWR4 8
19
20 #define FW_PWRMSK 0x7
21
22 #define XMIT_ALIVE BIT(0)
23 #define RECV_ALIVE BIT(1)
24 #define CMD_ALIVE BIT(2)
25 #define EVT_ALIVE BIT(3)
26
27 enum power_mgnt {
28 PS_MODE_ACTIVE = 0,
29 PS_MODE_MIN,
30 PS_MODE_MAX,
31 PS_MODE_DTIM,
32 PS_MODE_VOIP,
33 PS_MODE_UAPSD_WMM,
34 PS_MODE_UAPSD,
35 PS_MODE_IBSS,
36 PS_MODE_WWLAN,
37 PM_Radio_Off,
38 PM_Card_Disable,
39 PS_MODE_NUM
40 };
41
42 /*
43 BIT[2:0] = HW state
44 BIT[3] = Protocol PS state, 0: register active state,
45 1: register sleep state
46 BIT[4] = sub-state
47 */
48
49 #define PS_DPS BIT(0)
50 #define PS_LCLK (PS_DPS)
51 #define PS_RF_OFF BIT(1)
52 #define PS_ALL_ON BIT(2)
53 #define PS_ST_ACTIVE BIT(3)
54
55 #define PS_ISR_ENABLE BIT(4)
56 #define PS_IMR_ENABLE BIT(5)
57 #define PS_ACK BIT(6)
58 #define PS_TOGGLE BIT(7)
59
60 #define PS_STATE_MASK (0x0F)
61 #define PS_STATE_HW_MASK (0x07)
62 #define PS_SEQ_MASK (0xc0)
63
64 #define PS_STATE(x) (PS_STATE_MASK & (x))
65 #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
66 #define PS_SEQ(x) (PS_SEQ_MASK & (x))
67
68 #define PS_STATE_S0 (PS_DPS)
69 #define PS_STATE_S1 (PS_LCLK)
70 #define PS_STATE_S2 (PS_RF_OFF)
71 #define PS_STATE_S3 (PS_ALL_ON)
72 #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
73
74 #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
75 #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
76 #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
77
78 struct reportpwrstate_parm {
79 unsigned char mode;
80 unsigned char state; /* the CPWM value */
81 unsigned short rsvd;
82 };
83
_init_pwrlock(struct semaphore * plock)84 static inline void _init_pwrlock(struct semaphore *plock)
85 {
86 sema_init(plock, 1);
87 }
88
_free_pwrlock(struct semaphore * plock)89 static inline void _free_pwrlock(struct semaphore *plock)
90 {
91 }
92
_enter_pwrlock(struct semaphore * plock)93 static inline void _enter_pwrlock(struct semaphore *plock)
94 {
95 _rtw_down_sema(plock);
96 }
97
_exit_pwrlock(struct semaphore * plock)98 static inline void _exit_pwrlock(struct semaphore *plock)
99 {
100 up(plock);
101 }
102
103 #define LPS_DELAY_TIME 1*HZ /* 1 sec */
104
105 #define EXE_PWR_NONE 0x01
106 #define EXE_PWR_IPS 0x02
107 #define EXE_PWR_LPS 0x04
108
109 /* RF state. */
110 enum rt_rf_power_state {
111 rf_on, /* RF is on after RFSleep or RFOff */
112 rf_sleep, /* 802.11 Power Save mode */
113 rf_off, /* HW/SW Radio OFF or Inactive Power Save */
114 /* Add the new RF state above this line===== */
115 rf_max
116 };
117
118 /* RF Off Level for IPS or HW/SW radio off */
119 #define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
120 #define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
121 #define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
122 #define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-init hw param*/
123 #define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW*/
124 #define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
125 #define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock
126 * Req in initialization. */
127 #define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R
128 * if no packet is RX or TX. */
129 #define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
130
131 #define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) \
132 ((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
133 #define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) \
134 (ppsc->cur_ps_level &= (~(_PS_FLAG)))
135 #define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) \
136 (ppsc->cur_ps_level |= _PS_FLAG)
137
138 enum _PS_BBRegBackup_ {
139 PSBBREG_RF0 = 0,
140 PSBBREG_RF1,
141 PSBBREG_RF2,
142 PSBBREG_AFE0,
143 PSBBREG_TOTALCNT
144 };
145
146 enum { /* for ips_mode */
147 IPS_NONE = 0,
148 IPS_NORMAL,
149 IPS_LEVEL_2,
150 };
151
152 struct pwrctrl_priv {
153 struct semaphore lock;
154 volatile u8 rpwm; /* requested power state for fw */
155 volatile u8 cpwm; /* fw current power state. updated when
156 * 1. read from HCPWM 2. driver lowers power level */
157 volatile u8 tog; /* toggling */
158 volatile u8 cpwm_tog; /* toggling */
159
160 u8 pwr_mode;
161 u8 smart_ps;
162 u8 bcn_ant_mode;
163
164 u32 alives;
165 struct work_struct cpwm_event;
166 u8 bpower_saving;
167
168 u8 b_hw_radio_off;
169 u8 reg_rfoff;
170 u8 reg_pdnmode; /* powerdown mode */
171 u32 rfoff_reason;
172
173 /* RF OFF Level */
174 u32 cur_ps_level;
175 u32 reg_rfps_level;
176 uint ips_enter_cnts;
177 uint ips_leave_cnts;
178
179 u8 ips_mode;
180 u8 ips_mode_req; /* used to accept the mode setting request,
181 * will update to ipsmode later */
182 uint bips_processing;
183 u32 ips_deny_time; /* will deny IPS when system time less than this */
184 u8 ps_processing; /* temp used to mark whether in rtw_ps_processor */
185
186 u8 bLeisurePs;
187 u8 LpsIdleCount;
188 u8 power_mgnt;
189 u8 bFwCurrentInPSMode;
190 u32 DelayLPSLastTimeStamp;
191 u8 btcoex_rfon;
192 s32 pnp_current_pwr_state;
193 u8 pnp_bstop_trx;
194
195 u8 bInternalAutoSuspend;
196 u8 bInSuspend;
197 #ifdef CONFIG_BT_COEXIST
198 u8 bAutoResume;
199 u8 autopm_cnt;
200 #endif
201 u8 bSupportRemoteWakeup;
202 struct timer_list pwr_state_check_timer;
203 int pwr_state_check_interval;
204 u8 pwr_state_check_cnts;
205
206 int ps_flag;
207
208 enum rt_rf_power_state rf_pwrstate;/* cur power state */
209 enum rt_rf_power_state change_rfpwrstate;
210
211 u8 wepkeymask;
212 u8 bHWPowerdown;/* if support hw power down */
213 u8 bHWPwrPindetect;
214 u8 bkeepfwalive;
215 u8 brfoffbyhw;
216 unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
217 };
218
219 #define rtw_get_ips_mode_req(pwrctrlpriv) \
220 (pwrctrlpriv)->ips_mode_req
221
222 #define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \
223 ((pwrctrlpriv)->ips_mode_req = (ips_mode))
224
225 #define RTW_PWR_STATE_CHK_INTERVAL 2000
226
227 #define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
228 do { \
229 _set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
230 } while (0)
231
232 #define rtw_set_pwr_state_check_timer(pwrctrl) \
233 _rtw_set_pwr_state_check_timer((pwrctrl), \
234 (pwrctrl)->pwr_state_check_interval)
235
236 void rtw_init_pwrctrl_priv(struct adapter *adapter);
237 void rtw_free_pwrctrl_priv(struct adapter *adapter);
238
239 void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps,
240 u8 bcn_ant_mode);
241 void rtw_set_rpwm(struct adapter *adapter, u8 val8);
242 void LeaveAllPowerSaveMode(struct adapter *adapter);
243 void ips_enter(struct adapter *padapter);
244 int ips_leave(struct adapter *padapter);
245
246 void rtw_ps_processor(struct adapter *padapter);
247
248 enum rt_rf_power_state RfOnOffDetect(struct adapter *iadapter);
249
250 s32 LPS_RF_ON_check(struct adapter *adapter, u32 delay_ms);
251 void LPS_Enter(struct adapter *adapter);
252 void LPS_Leave(struct adapter *adapter);
253
254 u8 rtw_interface_ps_func(struct adapter *adapter,
255 enum hal_intf_ps_func efunc_id, u8 *val);
256 void rtw_set_ips_deny(struct adapter *adapter, u32 ms);
257 int _rtw_pwr_wakeup(struct adapter *adapter, u32 ips_defer_ms,
258 const char *caller);
259 #define rtw_pwr_wakeup(adapter) \
260 _rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__)
261 #define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) \
262 _rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__)
263 int rtw_pm_set_ips(struct adapter *adapter, u8 mode);
264 int rtw_pm_set_lps(struct adapter *adapter, u8 mode);
265
266 #endif /* __RTL871X_PWRCTRL_H_ */
267