1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Driver for 8250/16550-type serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2001 Russell King.
8 */
9
10 #include <linux/bits.h>
11 #include <linux/serial_8250.h>
12 #include <linux/serial_reg.h>
13 #include <linux/dmaengine.h>
14
15 #include "../serial_mctrl_gpio.h"
16
17 struct uart_8250_dma {
18 int (*tx_dma)(struct uart_8250_port *p);
19 int (*rx_dma)(struct uart_8250_port *p);
20
21 /* Filter function */
22 dma_filter_fn fn;
23 /* Parameter to the filter function */
24 void *rx_param;
25 void *tx_param;
26
27 struct dma_slave_config rxconf;
28 struct dma_slave_config txconf;
29
30 struct dma_chan *rxchan;
31 struct dma_chan *txchan;
32
33 /* Device address base for DMA operations */
34 phys_addr_t rx_dma_addr;
35 phys_addr_t tx_dma_addr;
36
37 /* DMA address of the buffer in memory */
38 dma_addr_t rx_addr;
39 dma_addr_t tx_addr;
40
41 dma_cookie_t rx_cookie;
42 dma_cookie_t tx_cookie;
43
44 void *rx_buf;
45
46 size_t rx_size;
47 size_t tx_size;
48
49 unsigned char tx_running;
50 unsigned char tx_err;
51 unsigned char rx_running;
52 };
53
54 struct old_serial_port {
55 unsigned int uart;
56 unsigned int baud_base;
57 unsigned int port;
58 unsigned int irq;
59 upf_t flags;
60 unsigned char io_type;
61 unsigned char __iomem *iomem_base;
62 unsigned short iomem_reg_shift;
63 };
64
65 struct serial8250_config {
66 const char *name;
67 unsigned short fifo_size;
68 unsigned short tx_loadsz;
69 unsigned char fcr;
70 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
71 unsigned int flags;
72 };
73
74 #define UART_CAP_FIFO BIT(8) /* UART has FIFO */
75 #define UART_CAP_EFR BIT(9) /* UART has EFR */
76 #define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
77 #define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
78 #define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
79 #define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
80 #define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
81 #define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
82 #define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
83 #define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
84 * STOP PARITY EPAR SPAR WLEN5 WLEN6
85 */
86
87 #define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
88 #define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
89 #define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
90 #define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
91 #define UART_BUG_PARITY BIT(4) /* UART mishandles parity if FIFO enabled */
92 #define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
93
94
95 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
96 #define SERIAL8250_SHARE_IRQS 1
97 #else
98 #define SERIAL8250_SHARE_IRQS 0
99 #endif
100
101 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
102 { \
103 .iobase = _base, \
104 .irq = _irq, \
105 .uartclk = 1843200, \
106 .iotype = UPIO_PORT, \
107 .flags = UPF_BOOT_AUTOCONF | (_flags), \
108 }
109
110 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
111
112
serial_in(struct uart_8250_port * up,int offset)113 static inline int serial_in(struct uart_8250_port *up, int offset)
114 {
115 return up->port.serial_in(&up->port, offset);
116 }
117
serial_out(struct uart_8250_port * up,int offset,int value)118 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
119 {
120 up->port.serial_out(&up->port, offset, value);
121 }
122
123 /*
124 * For the 16C950
125 */
serial_icr_write(struct uart_8250_port * up,int offset,int value)126 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
127 {
128 serial_out(up, UART_SCR, offset);
129 serial_out(up, UART_ICR, value);
130 }
131
serial_icr_read(struct uart_8250_port * up,int offset)132 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
133 int offset)
134 {
135 unsigned int value;
136
137 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
138 serial_out(up, UART_SCR, offset);
139 value = serial_in(up, UART_ICR);
140 serial_icr_write(up, UART_ACR, up->acr);
141
142 return value;
143 }
144
145 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
146
serial_dl_read(struct uart_8250_port * up)147 static inline int serial_dl_read(struct uart_8250_port *up)
148 {
149 return up->dl_read(up);
150 }
151
serial_dl_write(struct uart_8250_port * up,int value)152 static inline void serial_dl_write(struct uart_8250_port *up, int value)
153 {
154 up->dl_write(up, value);
155 }
156
serial8250_set_THRI(struct uart_8250_port * up)157 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
158 {
159 if (up->ier & UART_IER_THRI)
160 return false;
161 up->ier |= UART_IER_THRI;
162 serial_out(up, UART_IER, up->ier);
163 return true;
164 }
165
serial8250_clear_THRI(struct uart_8250_port * up)166 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
167 {
168 if (!(up->ier & UART_IER_THRI))
169 return false;
170 up->ier &= ~UART_IER_THRI;
171 serial_out(up, UART_IER, up->ier);
172 return true;
173 }
174
175 struct uart_8250_port *serial8250_get_port(int line);
176
177 void serial8250_rpm_get(struct uart_8250_port *p);
178 void serial8250_rpm_put(struct uart_8250_port *p);
179
180 void serial8250_rpm_get_tx(struct uart_8250_port *p);
181 void serial8250_rpm_put_tx(struct uart_8250_port *p);
182
183 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
184 void serial8250_em485_start_tx(struct uart_8250_port *p);
185 void serial8250_em485_stop_tx(struct uart_8250_port *p);
186 void serial8250_em485_destroy(struct uart_8250_port *p);
187
188 /* MCR <-> TIOCM conversion */
serial8250_TIOCM_to_MCR(int tiocm)189 static inline int serial8250_TIOCM_to_MCR(int tiocm)
190 {
191 int mcr = 0;
192
193 if (tiocm & TIOCM_RTS)
194 mcr |= UART_MCR_RTS;
195 if (tiocm & TIOCM_DTR)
196 mcr |= UART_MCR_DTR;
197 if (tiocm & TIOCM_OUT1)
198 mcr |= UART_MCR_OUT1;
199 if (tiocm & TIOCM_OUT2)
200 mcr |= UART_MCR_OUT2;
201 if (tiocm & TIOCM_LOOP)
202 mcr |= UART_MCR_LOOP;
203
204 return mcr;
205 }
206
serial8250_MCR_to_TIOCM(int mcr)207 static inline int serial8250_MCR_to_TIOCM(int mcr)
208 {
209 int tiocm = 0;
210
211 if (mcr & UART_MCR_RTS)
212 tiocm |= TIOCM_RTS;
213 if (mcr & UART_MCR_DTR)
214 tiocm |= TIOCM_DTR;
215 if (mcr & UART_MCR_OUT1)
216 tiocm |= TIOCM_OUT1;
217 if (mcr & UART_MCR_OUT2)
218 tiocm |= TIOCM_OUT2;
219 if (mcr & UART_MCR_LOOP)
220 tiocm |= TIOCM_LOOP;
221
222 return tiocm;
223 }
224
225 /* MSR <-> TIOCM conversion */
serial8250_MSR_to_TIOCM(int msr)226 static inline int serial8250_MSR_to_TIOCM(int msr)
227 {
228 int tiocm = 0;
229
230 if (msr & UART_MSR_DCD)
231 tiocm |= TIOCM_CAR;
232 if (msr & UART_MSR_RI)
233 tiocm |= TIOCM_RNG;
234 if (msr & UART_MSR_DSR)
235 tiocm |= TIOCM_DSR;
236 if (msr & UART_MSR_CTS)
237 tiocm |= TIOCM_CTS;
238
239 return tiocm;
240 }
241
serial8250_out_MCR(struct uart_8250_port * up,int value)242 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
243 {
244 serial_out(up, UART_MCR, value);
245
246 if (up->gpios)
247 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
248 }
249
serial8250_in_MCR(struct uart_8250_port * up)250 static inline int serial8250_in_MCR(struct uart_8250_port *up)
251 {
252 int mctrl;
253
254 mctrl = serial_in(up, UART_MCR);
255
256 if (up->gpios) {
257 unsigned int mctrl_gpio = 0;
258
259 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
260 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
261 }
262
263 return mctrl;
264 }
265
266 #if defined(__alpha__) && !defined(CONFIG_PCI)
267 /*
268 * Digital did something really horribly wrong with the OUT1 and OUT2
269 * lines on at least some ALPHA's. The failure mode is that if either
270 * is cleared, the machine locks up with endless interrupts.
271 */
272 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
273 #else
274 #define ALPHA_KLUDGE_MCR 0
275 #endif
276
277 #ifdef CONFIG_SERIAL_8250_PNP
278 int serial8250_pnp_init(void);
279 void serial8250_pnp_exit(void);
280 #else
serial8250_pnp_init(void)281 static inline int serial8250_pnp_init(void) { return 0; }
serial8250_pnp_exit(void)282 static inline void serial8250_pnp_exit(void) { }
283 #endif
284
285 #ifdef CONFIG_SERIAL_8250_FINTEK
286 int fintek_8250_probe(struct uart_8250_port *uart);
287 #else
fintek_8250_probe(struct uart_8250_port * uart)288 static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
289 #endif
290
291 #ifdef CONFIG_ARCH_OMAP1
is_omap1_8250(struct uart_8250_port * pt)292 static inline int is_omap1_8250(struct uart_8250_port *pt)
293 {
294 int res;
295
296 switch (pt->port.mapbase) {
297 case OMAP1_UART1_BASE:
298 case OMAP1_UART2_BASE:
299 case OMAP1_UART3_BASE:
300 res = 1;
301 break;
302 default:
303 res = 0;
304 break;
305 }
306
307 return res;
308 }
309
is_omap1510_8250(struct uart_8250_port * pt)310 static inline int is_omap1510_8250(struct uart_8250_port *pt)
311 {
312 if (!cpu_is_omap1510())
313 return 0;
314
315 return is_omap1_8250(pt);
316 }
317 #else
is_omap1_8250(struct uart_8250_port * pt)318 static inline int is_omap1_8250(struct uart_8250_port *pt)
319 {
320 return 0;
321 }
is_omap1510_8250(struct uart_8250_port * pt)322 static inline int is_omap1510_8250(struct uart_8250_port *pt)
323 {
324 return 0;
325 }
326 #endif
327
328 #ifdef CONFIG_SERIAL_8250_DMA
329 extern int serial8250_tx_dma(struct uart_8250_port *);
330 extern int serial8250_rx_dma(struct uart_8250_port *);
331 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
332 extern int serial8250_request_dma(struct uart_8250_port *);
333 extern void serial8250_release_dma(struct uart_8250_port *);
334
serial8250_tx_dma_running(struct uart_8250_port * p)335 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
336 {
337 struct uart_8250_dma *dma = p->dma;
338
339 return dma && dma->tx_running;
340 }
341 #else
serial8250_tx_dma(struct uart_8250_port * p)342 static inline int serial8250_tx_dma(struct uart_8250_port *p)
343 {
344 return -1;
345 }
serial8250_rx_dma(struct uart_8250_port * p)346 static inline int serial8250_rx_dma(struct uart_8250_port *p)
347 {
348 return -1;
349 }
serial8250_rx_dma_flush(struct uart_8250_port * p)350 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
serial8250_request_dma(struct uart_8250_port * p)351 static inline int serial8250_request_dma(struct uart_8250_port *p)
352 {
353 return -1;
354 }
serial8250_release_dma(struct uart_8250_port * p)355 static inline void serial8250_release_dma(struct uart_8250_port *p) { }
356
serial8250_tx_dma_running(struct uart_8250_port * p)357 static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
358 {
359 return false;
360 }
361 #endif
362
ns16550a_goto_highspeed(struct uart_8250_port * up)363 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
364 {
365 unsigned char status;
366
367 status = serial_in(up, 0x04); /* EXCR2 */
368 #define PRESL(x) ((x) & 0x30)
369 if (PRESL(status) == 0x10) {
370 /* already in high speed mode */
371 return 0;
372 } else {
373 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
374 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
375 serial_out(up, 0x04, status);
376 }
377 return 1;
378 }
379
serial_index(struct uart_port * port)380 static inline int serial_index(struct uart_port *port)
381 {
382 return port->minor - 64;
383 }
384