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Searched defs:mask1 (Results 1 – 25 of 29) sorted by relevance

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/drivers/gpu/drm/amd/display/dc/
Ddc_helper.c128 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in set_reg_field_values()
245 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_update_ex()
273 uint8_t shift1, uint32_t mask1, uint32_t field_value1, in generic_reg_set_ex()
309 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get2()
319 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get3()
331 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get4()
345 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get5()
361 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get6()
379 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get7()
399 uint8_t shift1, uint32_t mask1, uint32_t *field_value1, in generic_reg_get8()
[all …]
/drivers/gpu/drm/amd/display/dmub/src/
Ddmub_reg.c45 uint32_t mask1, uint32_t field_value1, in set_reg_field_values()
73 uint32_t mask1, uint32_t field_value1, ...) in dmub_reg_update()
90 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...) in dmub_reg_set()
/drivers/gpu/drm/amd/display/dc/irq/dcn21/
Dirq_service_dcn21.c216 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
230 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/drivers/gpu/drm/amd/display/dc/irq/dcn30/
Dirq_service_dcn30.c222 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
236 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/drivers/gpu/drm/amd/display/dc/irq/dcn302/
Dirq_service_dcn302.c195 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
213 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/drivers/gpu/drm/amd/display/dc/irq/dcn31/
Dirq_service_dcn31.c209 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
223 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/drivers/net/hamradio/
Dhdlcdrv.c158 unsigned int mask1, mask2, mask3, mask4, mask5, mask6, word; in hdlcdrv_receiver() local
254 unsigned int mask1, mask2, mask3; in hdlcdrv_transmitter() local
/drivers/gpu/drm/amd/display/dc/irq/dce120/
Dirq_service_dce120.c105 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
/drivers/gpu/drm/amd/display/dc/irq/dcn303/
Dirq_service_dcn303.c110 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
/drivers/gpu/drm/amd/display/dc/irq/dcn10/
Dirq_service_dcn10.c203 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
/drivers/gpu/drm/amd/display/dc/irq/dcn20/
Dirq_service_dcn20.c205 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
/drivers/media/test-drivers/vidtv/
Dvidtv_pes.c88 u64 mask1; in vidtv_pes_write_pts_dts() local
/drivers/soc/fsl/qe/
Dgpio.c248 u32 mask1 = 1 << (QE_PIO_PINS - (pin + 1)); in qe_pin_set_dedicated() local
/drivers/acpi/
Dacpi_lpss.c938 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP; in lpss_iosf_enter_d3_state() local
987 u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP; in lpss_iosf_exit_d3_state() local
/drivers/power/supply/
Drt9455_charger.c854 unsigned int irq1, mask1, mask2; in rt9455_irq_handler_check_irq1_register() local
1500 unsigned int irq1, mask1; in rt9455_batt_presence_work_callback() local
/drivers/pcmcia/
Dtcic.c241 u_int mask1; in irq_scan() local
Di82365.c519 u_int mask1 = 0; in isa_scan() local
/drivers/iio/adc/
Dtwl6030-gpadc.c694 unsigned int reg1, unsigned int mask0, unsigned int mask1, in twl6032_get_trim_value()
/drivers/gpu/drm/msm/edp/
Dedp_ctrl.c1064 u32 isr1, isr2, mask1, mask2; in msm_edp_ctrl_irq() local
/drivers/staging/most/dim2/
Dhal.c561 u32 const mask1 = bit_mask(MLBC1_CLKMERR_BIT) | in dim2_is_mlb_locked() local
/drivers/mfd/
Dmenelaus.c163 u8 mask1, mask2; member
/drivers/net/can/
Dpch_can.c125 u32 mask1; member
/drivers/edac/
Di5100_edac.c875 u16 mask1; in i5100_do_inject() local
/drivers/usb/host/
Dr8a66597-hcd.c1605 u16 mask0, mask1, mask2; in r8a66597_irq() local
/drivers/net/ethernet/freescale/fman/
Dfman_memac.c494 u64 mask1, mask2; in get_mac_addr_hash_code() local

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