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Searched refs:MSR_CORE_PERF_GLOBAL_CTRL (Results 1 – 9 of 9) sorted by relevance

/arch/x86/xen/
Dpmu.c154 case MSR_CORE_PERF_GLOBAL_CTRL: in is_intel_pmu_msr()
212 case MSR_CORE_PERF_GLOBAL_CTRL: in xen_intel_pmu_emulate()
/arch/x86/kvm/vmx/
Dpmu_intel.c223 case MSR_CORE_PERF_GLOBAL_CTRL: in intel_is_valid_msr()
368 case MSR_CORE_PERF_GLOBAL_CTRL: in intel_pmu_get_msr()
419 case MSR_CORE_PERF_GLOBAL_CTRL: in intel_pmu_set_msr()
Dnested.c2620 WARN_ON_ONCE(kvm_set_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL, in prepare_vmcs02()
4347 WARN_ON_ONCE(kvm_set_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL, in load_vmcs12_host_state()
4868 if (kvm_x86_ops.pmu_ops->is_valid_msr(vcpu, MSR_CORE_PERF_GLOBAL_CTRL)) { in nested_vmx_pmu_entry_exit_ctls_update()
Dvmx.c887 case MSR_CORE_PERF_GLOBAL_CTRL: in clear_atomic_switch_msr()
943 case MSR_CORE_PERF_GLOBAL_CTRL: in add_atomic_switch_msr()
/arch/x86/events/zhaoxin/
Dcore.c257 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); in zhaoxin_pmu_disable_all()
262 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, x86_pmu.intel_ctrl); in zhaoxin_pmu_enable_all()
/arch/x86/include/asm/
Dmsr-index.h954 #define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f macro
/arch/x86/events/intel/
Dcore.c2152 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); in __intel_pmu_disable_all()
2171 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, in __intel_pmu_enable_all()
2250 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0xf); in intel_pmu_nhm_workaround()
2251 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0x0); in intel_pmu_nhm_workaround()
2775 wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, 0); in intel_pmu_reset()
3871 arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL; in intel_guest_get_msrs()
/arch/x86/events/
Dcore.c1542 rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl); in perf_event_print_debug()
/arch/x86/kvm/
Dx86.c1364 MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,