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Searched refs:MSR_IR (Results 1 – 25 of 36) sorted by relevance

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/arch/powerpc/kvm/
Dbook3s_32_mmu.c356 if (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_32_esid_to_vsid()
365 switch (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_32_esid_to_vsid()
369 case MSR_IR: in kvmppc_mmu_book3s_32_esid_to_vsid()
375 case MSR_DR|MSR_IR: in kvmppc_mmu_book3s_32_esid_to_vsid()
Dbook3s_64_mmu.c483 if (kvmppc_get_msr(vcpu) & MSR_IR) { in kvmppc_mmu_book3s_64_slbia()
582 if (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_64_esid_to_vsid()
595 switch (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_64_esid_to_vsid()
599 case MSR_IR: in kvmppc_mmu_book3s_64_esid_to_vsid()
605 case MSR_DR|MSR_IR: in kvmppc_mmu_book3s_64_esid_to_vsid()
Dbook3s_rmhandlers.S151 li r6, MSR_IR | MSR_DR
Dbook3s_hv_builtin.c626 (msr & (MSR_IR|MSR_DR)) == (MSR_IR|MSR_DR) ) { in inject_interrupt()
627 new_msr |= MSR_IR | MSR_DR; in inject_interrupt()
Dbook3s_pr.c70 return (msr & (MSR_IR|MSR_DR)) == MSR_DR; in kvmppc_is_split_real()
79 if ((msr & (MSR_IR|MSR_DR)) != MSR_DR) in kvmppc_fixup_split_real()
238 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; in kvmppc_recalc_shadow_msr()
510 if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) != in kvmppc_set_msr_pr()
511 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { in kvmppc_set_msr_pr()
692 bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false; in kvmppc_handle_pagefault()
713 switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) { in kvmppc_handle_pagefault()
723 case MSR_IR: in kvmppc_handle_pagefault()
726 if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR) in kvmppc_handle_pagefault()
/arch/powerpc/platforms/powernv/
Dopal-wrappers.S27 li r0,MSR_IR|MSR_DR|MSR_LE
Dsubcore-asm.S31 li r5, MSR_IR|MSR_DR
Didle.c390 WARN_ON_ONCE(mfmsr() & (MSR_IR|MSR_DR)); in power7_idle_insn()
702 WARN_ON_ONCE(mfmsr() & (MSR_IR|MSR_DR)); in power9_idle_stop()
938 WARN_ON_ONCE(mfmsr() & (MSR_IR|MSR_DR)); in power10_idle_stop()
Dopal-call.c101 bool mmu = (msr & (MSR_IR|MSR_DR)); in opal_call()
/arch/powerpc/platforms/pasemi/
Dpowersave.S62 LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
/arch/powerpc/platforms/82xx/
Dpq2.c29 mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR)); in pq2_restart()
/arch/powerpc/xmon/
Dxmon.c557 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) in xmon_core()
716 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { in xmon_core()
769 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) in xmon_bpt()
802 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) in xmon_break_match()
817 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) in xmon_iabr_match()
842 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { in xmon_fault_handler()
1213 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { in do_step()
/arch/powerpc/kernel/
Dhead_40x.S473 andi. r10,r9,MSR_IR|MSR_PR /* check supervisor + MMU off */
620 lis r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@h
621 ori r3,r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@l
Dhead_book3s_32.S204 ori r0,r0,MSR_DR|MSR_IR|MSR_RI
1001 li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
1091 li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR)
1114 li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI)
1131 andi. r0,r3,MSR_DR|MSR_IR /* MMU enabled? */
Dpaca.c199 new_paca->kernel_msr = MSR_KERNEL & ~(MSR_IR | MSR_DR); in initialise_paca()
Dkvm_emul.S300 andi. r31, r31, MSR_DR | MSR_IR
Dhead_8xx.S97 ori r0,r0,MSR_DR|MSR_IR
572 li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR)
695 li r12, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI)
Dentry_32.S447 li r10,MSR_IR; \
587 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
Dmisc_64.S362 li r10,MSR_DR|MSR_IR
Dkprobes.c302 (!(regs->msr & MSR_IR) || !(regs->msr & MSR_DR))) in kprobe_handler()
/arch/powerpc/platforms/pseries/
Dras.c488 (MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR| in pSeries_system_reset_exception()
745 mtmsr(msr | MSR_IR | MSR_DR); in mce_handle_error()
/arch/powerpc/include/asm/
Dreg.h105 #define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ macro
134 #define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_HV)
147 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
Dreg_booke.h46 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
/arch/powerpc/mm/book3s64/
Dhash_pgtable.c467 [p] "b" (p), [MSR_IR_DR] "i" (MSR_IR | MSR_DR) in chmem_secondary_loop()
/arch/powerpc/platforms/52xx/
Dlite5200_sleep.S207 ori r10, r10, MSR_DR | MSR_IR

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