Searched refs:MSR_IR (Results 1 – 25 of 36) sorted by relevance
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/arch/powerpc/kvm/ |
D | book3s_32_mmu.c | 356 if (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_32_esid_to_vsid() 365 switch (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_32_esid_to_vsid() 369 case MSR_IR: in kvmppc_mmu_book3s_32_esid_to_vsid() 375 case MSR_DR|MSR_IR: in kvmppc_mmu_book3s_32_esid_to_vsid()
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D | book3s_64_mmu.c | 483 if (kvmppc_get_msr(vcpu) & MSR_IR) { in kvmppc_mmu_book3s_64_slbia() 582 if (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_64_esid_to_vsid() 595 switch (msr & (MSR_DR|MSR_IR)) { in kvmppc_mmu_book3s_64_esid_to_vsid() 599 case MSR_IR: in kvmppc_mmu_book3s_64_esid_to_vsid() 605 case MSR_DR|MSR_IR: in kvmppc_mmu_book3s_64_esid_to_vsid()
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D | book3s_rmhandlers.S | 151 li r6, MSR_IR | MSR_DR
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D | book3s_hv_builtin.c | 626 (msr & (MSR_IR|MSR_DR)) == (MSR_IR|MSR_DR) ) { in inject_interrupt() 627 new_msr |= MSR_IR | MSR_DR; in inject_interrupt()
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D | book3s_pr.c | 70 return (msr & (MSR_IR|MSR_DR)) == MSR_DR; in kvmppc_is_split_real() 79 if ((msr & (MSR_IR|MSR_DR)) != MSR_DR) in kvmppc_fixup_split_real() 238 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; in kvmppc_recalc_shadow_msr() 510 if ((kvmppc_get_msr(vcpu) & (MSR_PR|MSR_IR|MSR_DR)) != in kvmppc_set_msr_pr() 511 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { in kvmppc_set_msr_pr() 692 bool ir = (kvmppc_get_msr(vcpu) & MSR_IR) ? true : false; in kvmppc_handle_pagefault() 713 switch (kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) { in kvmppc_handle_pagefault() 723 case MSR_IR: in kvmppc_handle_pagefault() 726 if ((kvmppc_get_msr(vcpu) & (MSR_DR|MSR_IR)) == MSR_DR) in kvmppc_handle_pagefault()
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/arch/powerpc/platforms/powernv/ |
D | opal-wrappers.S | 27 li r0,MSR_IR|MSR_DR|MSR_LE
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D | subcore-asm.S | 31 li r5, MSR_IR|MSR_DR
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D | idle.c | 390 WARN_ON_ONCE(mfmsr() & (MSR_IR|MSR_DR)); in power7_idle_insn() 702 WARN_ON_ONCE(mfmsr() & (MSR_IR|MSR_DR)); in power9_idle_stop() 938 WARN_ON_ONCE(mfmsr() & (MSR_IR|MSR_DR)); in power10_idle_stop()
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D | opal-call.c | 101 bool mmu = (msr & (MSR_IR|MSR_DR)); in opal_call()
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/arch/powerpc/platforms/pasemi/ |
D | powersave.S | 62 LOAD_REG_IMMEDIATE(r6,MSR_DR|MSR_IR|MSR_ME|MSR_EE)
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/arch/powerpc/platforms/82xx/ |
D | pq2.c | 29 mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR)); in pq2_restart()
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/arch/powerpc/xmon/ |
D | xmon.c | 557 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) in xmon_core() 716 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { in xmon_core() 769 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) in xmon_bpt() 802 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) in xmon_break_match() 817 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT)) in xmon_iabr_match() 842 if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) { in xmon_fault_handler() 1213 if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) { in do_step()
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/arch/powerpc/kernel/ |
D | head_40x.S | 473 andi. r10,r9,MSR_IR|MSR_PR /* check supervisor + MMU off */ 620 lis r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@h 621 ori r3,r3,(MSR_KERNEL & ~(MSR_IR|MSR_DR))@l
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D | head_book3s_32.S | 204 ori r0,r0,MSR_DR|MSR_IR|MSR_RI 1001 li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR) 1091 li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR) 1114 li r3, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI) 1131 andi. r0,r3,MSR_DR|MSR_IR /* MMU enabled? */
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D | paca.c | 199 new_paca->kernel_msr = MSR_KERNEL & ~(MSR_IR | MSR_DR); in initialise_paca()
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D | kvm_emul.S | 300 andi. r31, r31, MSR_DR | MSR_IR
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D | head_8xx.S | 97 ori r0,r0,MSR_DR|MSR_IR 572 li r3,MSR_KERNEL & ~(MSR_IR|MSR_DR) 695 li r12, MSR_KERNEL & ~(MSR_IR | MSR_DR | MSR_RI)
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D | entry_32.S | 447 li r10,MSR_IR; \ 587 li r9,MSR_KERNEL & ~(MSR_IR|MSR_DR)
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D | misc_64.S | 362 li r10,MSR_DR|MSR_IR
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D | kprobes.c | 302 (!(regs->msr & MSR_IR) || !(regs->msr & MSR_DR))) in kprobe_handler()
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/arch/powerpc/platforms/pseries/ |
D | ras.c | 488 (MSR_LE|MSR_RI|MSR_DR|MSR_IR|MSR_ME|MSR_PR| in pSeries_system_reset_exception() 745 mtmsr(msr | MSR_IR | MSR_DR); in mce_handle_error()
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/arch/powerpc/include/asm/ |
D | reg.h | 105 #define MSR_IR __MASK(MSR_IR_LG) /* Instruction Relocate */ macro 134 #define __MSR (MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_HV) 147 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
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D | reg_booke.h | 46 #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
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/arch/powerpc/mm/book3s64/ |
D | hash_pgtable.c | 467 [p] "b" (p), [MSR_IR_DR] "i" (MSR_IR | MSR_DR) in chmem_secondary_loop()
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/arch/powerpc/platforms/52xx/ |
D | lite5200_sleep.S | 207 ori r10, r10, MSR_DR | MSR_IR
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