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Searched refs:patch (Results 1 – 25 of 28) sorted by relevance

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/arch/xtensa/kernel/
Djump_label.c26 struct patch { struct
41 struct patch *patch = data; in patch_text_stop_machine() argument
43 if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) { in patch_text_stop_machine()
44 local_patch_text(patch->addr, patch->data, patch->sz); in patch_text_stop_machine()
45 atomic_inc(&patch->cpu_count); in patch_text_stop_machine()
47 while (atomic_read(&patch->cpu_count) <= num_online_cpus()) in patch_text_stop_machine()
49 __invalidate_icache_range(patch->addr, patch->sz); in patch_text_stop_machine()
57 struct patch patch = { in patch_text() local
64 &patch, cpu_online_mask); in patch_text()
/arch/parisc/kernel/
Dpatch.c18 struct patch { struct
103 struct patch *patch = data; in patch_text_stop_machine() local
105 __patch_text_multiple(patch->addr, patch->insn, patch->len); in patch_text_stop_machine()
111 struct patch patch = { in patch_text() local
117 stop_machine_cpuslocked(patch_text_stop_machine, &patch, NULL); in patch_text()
123 struct patch patch = { in patch_text_multiple() local
129 stop_machine_cpuslocked(patch_text_stop_machine, &patch, NULL); in patch_text_multiple()
DMakefile13 patch.o
/arch/ia64/kernel/
Dvmlinux.lds.S85 .data..patch.phys_stack_reg : AT(ADDR(.data..patch.phys_stack_reg) - LOAD_OFFSET) {
87 *(.data..patch.phys_stack_reg)
126 .data..patch.vtop : AT(ADDR(.data..patch.vtop) - LOAD_OFFSET) {
128 *(.data..patch.vtop)
132 .data..patch.rse : AT(ADDR(.data..patch.rse) - LOAD_OFFSET) {
134 *(.data..patch.rse)
138 .data..patch.mckinley_e9 : AT(ADDR(.data..patch.mckinley_e9) - LOAD_OFFSET) {
140 *(.data..patch.mckinley_e9)
Dgate.lds.S35 .data..patch : {
37 *(.data..patch.mckinley_e9) argument
41 *(.data..patch.vtop) argument
45 *(.data..patch.fsyscall_table) argument
49 *(.data..patch.brl_fsys_bubble_down) argument
DMakefile13 irq_lsapic.o ivt.o pal.o patch.o process.o ptrace.o sal.o \
/arch/riscv/kernel/
Dpatch.c123 struct patch_insn *patch = data; in patch_text_cb() local
126 if (atomic_inc_return(&patch->cpu_count) == num_online_cpus()) { in patch_text_cb()
128 patch_text_nosync(patch->addr, &patch->insn, in patch_text_cb()
129 GET_INSN_LENGTH(patch->insn)); in patch_text_cb()
130 atomic_inc(&patch->cpu_count); in patch_text_cb()
132 while (atomic_read(&patch->cpu_count) <= num_online_cpus()) in patch_text_cb()
144 struct patch_insn patch = { in patch_text() local
160 ret = stop_machine_cpuslocked(patch_text_cb, &patch, cpu_online_mask); in patch_text()
DMakefile37 obj-y += patch.o
/arch/arm/kernel/
Dpatch.c14 struct patch { struct
113 struct patch *patch = data; in patch_text_stop_machine() local
115 __patch_text(patch->addr, patch->insn); in patch_text_stop_machine()
122 struct patch patch = { in patch_text() local
127 stop_machine_cpuslocked(patch_text_stop_machine, &patch, NULL); in patch_text()
DMakefile59 obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o insn.o patch.o
60 obj-$(CONFIG_FUNCTION_GRAPH_TRACER) += ftrace.o insn.o patch.o
61 obj-$(CONFIG_JUMP_LABEL) += jump_label.o insn.o patch.o
64 obj-$(CONFIG_KPROBES) += patch.o insn.o
67 obj-$(CONFIG_KGDB) += kgdb.o patch.o
Dphys2virt.S78 @ instructions, where we need to patch in the offset into the
87 @ In the LPAE case, we also need to patch in the high word of the
88 @ offset into the immediate field of the MOV instruction, or patch it
125 orreq ip, r0 @ Z flag set -> MOV/MVN -> patch in high bits
126 orrne ip, r6 @ Z flag clear -> MOVW -> patch in low bits
156 @ instructions, where we need to patch in the offset into the
170 @ word, and patch in the high word of the offset into the immediate
171 @ field of the subsequent MOV instruction, or patch it to a MVN
/arch/x86/kernel/cpu/microcode/
Damd.c423 u8 (*patch)[PATCH_MAX_SIZE]; in apply_microcode_early_amd() local
430 patch = (u8 (*)[PATCH_MAX_SIZE])__pa_nodebug(&amd_ucode_patch); in apply_microcode_early_amd()
433 patch = &amd_ucode_patch[0]; in apply_microcode_early_amd()
459 memcpy(patch, mc, min_t(u32, desc.psize, PATCH_MAX_SIZE)); in apply_microcode_early_amd()
776 struct ucode_patch *patch; in verify_and_add_patch() local
784 patch = kzalloc(sizeof(*patch), GFP_KERNEL); in verify_and_add_patch()
785 if (!patch) { in verify_and_add_patch()
790 patch->data = kmemdup(fw + SECTION_HDR_SIZE, *patch_size, GFP_KERNEL); in verify_and_add_patch()
791 if (!patch->data) { in verify_and_add_patch()
793 kfree(patch); in verify_and_add_patch()
[all …]
Dintel.c286 struct microcode_intel *patch = NULL; in scan_microcode() local
315 if (!patch) { in scan_microcode()
323 struct microcode_header_intel *phdr = &patch->hdr; in scan_microcode()
333 patch = data; in scan_microcode()
342 return patch; in scan_microcode()
640 struct microcode_intel *patch; in load_ucode_intel_bsp() local
643 patch = __load_ucode_intel(&uci); in load_ucode_intel_bsp()
644 if (!patch) in load_ucode_intel_bsp()
647 uci.mc = patch; in load_ucode_intel_bsp()
654 struct microcode_intel *patch, **iup; in load_ucode_intel_ap() local
[all …]
/arch/powerpc/platforms/8xx/
DKconfig128 prompt "Microcode patch selection"
137 bool "USB SOF patch"
142 bool "I2C/SPI relocation patch"
147 bool "I2C/SPI/SMC1 relocation patch"
152 bool "SMC relocation patch"
Dmicropatch.c324 static void __init cpm_write_patch(cpm8xx_t *cp, int offset, uint *patch, int len) in cpm_write_patch() argument
328 memcpy_toio(cp->cp_dpmem + offset, patch, len); in cpm_write_patch()
/arch/arm64/kernel/
Dpatching.c145 struct aarch64_insn_patch patch = { in aarch64_insn_patch_text() local
155 return stop_machine_cpuslocked(aarch64_insn_patch_text_cb, &patch, in aarch64_insn_patch_text()
DMakefile82 obj-$(CONFIG_UNWIND_PATCH_PAC_INTO_SCS) += patch-scs.o
/arch/arm/probes/kprobes/
Dcore.c156 struct patch { struct
163 struct patch *p = data; in __kprobes_remove_breakpoint() argument
170 struct patch p = { in kprobes_remove_breakpoint()
/arch/arm/boot/dts/
Dintel-ixp42x-linksys-wrv54g.dts63 /* This set-up comes from an OpenWrt patch */
138 * all four switch ports, also using an out of tree multiphy patch.
Dimx51-zii-rdu1.dts104 /* no compatible here, bootloader will patch in correct one */
/arch/mips/include/asm/
Dcpu.h275 #define PRID_REV_ENCODE_332(ver, rev, patch) \ argument
276 ((ver) << 5 | (rev) << 2 | (patch))
/arch/riscv/
DKconfig.erratas8 This Kconfig allows the kernel to automatically patch the
/arch/powerpc/boot/dts/
Dwii.dts16 * Until a later patch is merged, the kernel can use only the first
/arch/arm/nwfpe/
DChangeLog29 * The changes are designed to break any patch that goes on top
/arch/arm64/
DKconfig393 as it depends on the alternative framework, which will only patch
415 as it depends on the alternative framework, which will only patch
439 only patch the kernel if an affected CPU is detected.
460 as it depends on the alternative framework, which will only patch
478 as it depends on the alternative framework, which will only patch
499 as it depends on the alternative framework, which will only patch
536 as it depends on the alternative framework, which will only patch

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