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Searched refs:vcpu_cpsr (Results 1 – 10 of 10) sorted by relevance

/arch/arm64/kvm/hyp/
Daarch32.c62 cpsr = *vcpu_cpsr(vcpu); in kvm_condition_valid32()
99 unsigned long cpsr = *vcpu_cpsr(vcpu); in kvm_adjust_itstate()
119 *vcpu_cpsr(vcpu) = cpsr; in kvm_adjust_itstate()
131 is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT); in kvm_skip_instr32()
Dexception.c152 u64 offset = get_except64_offset(*vcpu_cpsr(vcpu), target_mode, type); in enter_exception64()
168 old = *vcpu_cpsr(vcpu); in enter_exception64()
171 *vcpu_cpsr(vcpu) = new; in enter_exception64()
198 old = *vcpu_cpsr(vcpu); in get_except32_cpsr()
289 unsigned long spsr = *vcpu_cpsr(vcpu); in enter_exception32()
294 *vcpu_cpsr(vcpu) = get_except32_cpsr(vcpu, mode); in enter_exception32()
/arch/arm64/kvm/
Ddebug.c48 (*vcpu_cpsr(vcpu) & DBG_SPSR_SS); in save_guest_debug_regs()
59 *vcpu_cpsr(vcpu) |= DBG_SPSR_SS; in restore_guest_debug_regs()
61 *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; in restore_guest_debug_regs()
207 *vcpu_cpsr(vcpu) |= DBG_SPSR_SS; in kvm_arm_setup_debug()
209 *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; in kvm_arm_setup_debug()
220 trace_kvm_arm_set_dreg32("SPSR_EL2", *vcpu_cpsr(vcpu)); in kvm_arm_setup_debug()
285 if (!(*vcpu_cpsr(vcpu) & DBG_SPSR_SS)) in kvm_arm_clear_debug()
Dinject_fault.c19 unsigned long cpsr = *vcpu_cpsr(vcpu); in inject_abt64()
Dguest.c272 if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) { in set_core_reg()
275 switch (*vcpu_cpsr(vcpu)) { in set_core_reg()
Dsys_regs.c2191 cp, *vcpu_pc(vcpu), *vcpu_cpsr(vcpu)); in unhandled_cp_access()
2453 *vcpu_pc(vcpu), *vcpu_cpsr(vcpu)); in emulate_sys_reg()
/arch/arm64/kvm/hyp/include/hyp/
Dadjust_pc.h22 *vcpu_cpsr(vcpu) &= ~PSR_BTYPE_MASK; in kvm_skip_instr()
26 *vcpu_cpsr(vcpu) &= ~DBG_SPSR_SS; in kvm_skip_instr()
/arch/arm64/include/asm/
Dkvm_emulate.h150 static __always_inline unsigned long *vcpu_cpsr(const struct kvm_vcpu *vcpu) in vcpu_cpsr() function
157 return !!(*vcpu_cpsr(vcpu) & PSR_MODE32_BIT); in vcpu_mode_is_32bit()
170 *vcpu_cpsr(vcpu) |= PSR_AA32_T_BIT; in vcpu_set_thumb()
228 mode = *vcpu_cpsr(vcpu) & PSR_AA32_MODE_MASK; in vcpu_mode_priv()
232 mode = *vcpu_cpsr(vcpu) & PSR_MODE_MASK; in vcpu_mode_priv()
416 *vcpu_cpsr(vcpu) |= PSR_AA32_E_BIT; in kvm_vcpu_set_be()
427 return !!(*vcpu_cpsr(vcpu) & PSR_AA32_E_BIT); in kvm_vcpu_is_be()
/arch/arm64/kvm/hyp/nvhe/
Dsys_regs.c39 *vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR); in inject_undef64()
48 write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR); in inject_undef64()
Dhyp-main.c163 unsigned long cpsr = *vcpu_cpsr(&hyp_vcpu->vcpu); in handle_pvm_entry_iabt()
195 unsigned long cpsr = *vcpu_cpsr(&hyp_vcpu->vcpu); in handle_pvm_entry_dabt()
558 *vcpu_cpsr(vcpu) = *vcpu_cpsr(host_vcpu); in flush_debug_state()