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Searched refs:wrmsr (Results 1 – 25 of 41) sorted by relevance

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/arch/x86/include/asm/
Dextable.h45 extern void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr);
47 static inline void ex_handler_msr_mce(struct pt_regs *regs, bool wrmsr) { } in ex_handler_msr_mce() argument
Dresctrl.h80 wrmsr(IA32_PQR_ASSOC, rmid, closid); in __resctrl_sched_in()
Dswitch_to.h60 wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0); in refresh_sysenter_cs()
/arch/x86/kernel/cpu/
Dcentaur.c34 wrmsr(MSR_VIA_FCR, lo, hi); in init_c3()
42 wrmsr(MSR_VIA_RNG, lo, hi); in init_c3()
56 wrmsr(MSR_VIA_FCR, lo, hi); in init_c3()
190 wrmsr(MSR_IDT_FCR1, newlo, hi); in init_centaur()
Dtransmeta.c87 wrmsr(0x80860004, ~0, uk); in init_transmeta()
89 wrmsr(0x80860004, cap_mask, uk); in init_transmeta()
Dzhaoxin.c33 wrmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
42 wrmsr(MSR_ZHAOXIN_FCR57, lo, hi); in init_zhaoxin_cap()
Dumwait.c36 wrmsr(MSR_IA32_UMWAIT_CONTROL, READ_ONCE(umwait_control_cached), 0); in umwait_update_control_msr()
74 wrmsr(MSR_IA32_UMWAIT_CONTROL, orig_umwait_control_cached, 0); in umwait_cpu_offline()
Damd.c249 wrmsr(MSR_K6_WHCR, l, h); in init_amd_k6()
270 wrmsr(MSR_K6_WHCR, l, h); in init_amd_k6()
315 wrmsr(MSR_K7_CLK_CTL, (l & 0x000fffff)|0x20000000, h); in init_amd_k7()
1263 wrmsr(MSR_F16H_DR0_ADDR_MASK, mask, 0); in set_dr_addr_mask()
1268 wrmsr(MSR_F16H_DR1_ADDR_MASK - 1 + dr, mask, 0); in set_dr_addr_mask()
/arch/x86/mm/
Dextable.c87 struct pt_regs *regs, bool wrmsr, bool safe, int reg) in ex_handler_msr() argument
89 if (__ONCE_LITE_IF(!safe && wrmsr)) { in ex_handler_msr()
96 if (__ONCE_LITE_IF(!safe && !wrmsr)) { in ex_handler_msr()
102 if (!wrmsr) { in ex_handler_msr()
Dmem_encrypt_boot.S121 wrmsr
152 wrmsr
/arch/x86/entry/
Dentry.S16 wrmsr
Dcalling.h318 wrmsr
341 wrmsr
/arch/x86/hyperv/
Dhv_apic.c79 wrmsr(HV_X64_MSR_EOI, val, 0); in hv_apic_write()
82 wrmsr(HV_X64_MSR_TPR, val, 0); in hv_apic_write()
96 wrmsr(HV_X64_MSR_EOI, val, 0); in hv_apic_eoi_write()
/arch/x86/kernel/cpu/mce/
Dwinchip.c40 wrmsr(MSR_IDT_FCR1, lo, hi); in winchip_mcheck_init()
/arch/x86/platform/pvh/
Dhead.S82 wrmsr
100 wrmsr
/arch/x86/realmode/rm/
Dwakeup_asm.S104 wrmsr
124 wrmsr
Dtrampoline_64.S135 wrmsr
149 wrmsr
Dreboot.S40 wrmsr
/arch/x86/boot/compressed/
Defi_thunk_64.S126 wrmsr
154 wrmsr
Dmem_encrypt.S78 wrmsr
179 wrmsr
/arch/x86/kernel/
Dverify_cpu.S97 wrmsr
128 wrmsr
/arch/x86/kernel/cpu/mtrr/
Damd.c92 wrmsr(MSR_K6_UWCCR, regs[0], regs[1]); in amd_set_mtrr()
Dcentaur.c96 wrmsr(MSR_IDT_MCR0 + reg, low, high); in centaur_set_mcr()
/arch/x86/lib/
Dmsr-reg.S92 op_safe_regs wrmsr
/arch/x86/xen/
Dxen-head.S50 wrmsr

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