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Searched refs:QM_ARUSER_M_CFG_1 (Results 1 – 4 of 4) sorted by relevance

/drivers/crypto/hisilicon/
Dqm.h17 #define QM_ARUSER_M_CFG_1 0x100088 macro
/drivers/crypto/hisilicon/sec2/
Dsec_main.c468 writel(AXUSER_BASE, qm->io_base + QM_ARUSER_M_CFG_1); in sec_set_user_domain_and_cache()
/drivers/crypto/hisilicon/zip/
Dzip_main.c345 writel(AXUSER_BASE, base + QM_ARUSER_M_CFG_1); in hisi_zip_set_user_domain_and_cache()
/drivers/crypto/hisilicon/hpre/
Dhpre_main.c207 {"QM_ARUSR_MCFG1 ", QM_ARUSER_M_CFG_1},