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Searched refs:SCALER_DISPCTRL (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/vc4/
Dvc4_hvs.c34 VC4_REG32(SCALER_DISPCTRL),
248 reg = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_get_fifo_from_output()
542 u32 dispctrl = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_mask_underrun()
546 HVS_WRITE(SCALER_DISPCTRL, dispctrl); in vc4_hvs_mask_underrun()
552 u32 dispctrl = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_unmask_underrun()
558 HVS_WRITE(SCALER_DISPCTRL, dispctrl); in vc4_hvs_unmask_underrun()
579 control = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_irq_handler()
685 reg = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_bind()
687 HVS_WRITE(SCALER_DISPCTRL, in vc4_hvs_bind()
700 dispctrl = HVS_READ(SCALER_DISPCTRL); in vc4_hvs_bind()
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Dvc4_kms.c262 dispctrl = HVS_READ(SCALER_DISPCTRL) & in vc4_hvs_pv_muxing_commit()
264 HVS_WRITE(SCALER_DISPCTRL, dispctrl | dsp3_mux); in vc4_hvs_pv_muxing_commit()
299 reg = HVS_READ(SCALER_DISPCTRL); in vc5_hvs_pv_muxing_commit()
300 HVS_WRITE(SCALER_DISPCTRL, in vc5_hvs_pv_muxing_commit()
Dvc4_regs.h220 #define SCALER_DISPCTRL 0x00000000 macro
Dvc4_crtc.c432 WARN_ON_ONCE((HVS_READ(SCALER_DISPCTRL) & SCALER_DISPCTRL_ENABLE) != in require_hvs_enabled()