Searched refs:VC5_PHY_REG (Results 1 – 1 of 1) sorted by relevance
| /drivers/gpu/drm/vc4/ |
| D | vc4_hdmi_regs.h | 147 #define VC5_PHY_REG(reg, offset) _VC4_REG(VC5_PHY, reg, offset) macro
249 VC5_PHY_REG(HDMI_TX_PHY_RESET_CTL, 0x000),
250 VC5_PHY_REG(HDMI_TX_PHY_POWERDOWN_CTL, 0x004),
251 VC5_PHY_REG(HDMI_TX_PHY_CTL_0, 0x008),
252 VC5_PHY_REG(HDMI_TX_PHY_CTL_1, 0x00c),
253 VC5_PHY_REG(HDMI_TX_PHY_CTL_2, 0x010),
254 VC5_PHY_REG(HDMI_TX_PHY_CTL_3, 0x014),
255 VC5_PHY_REG(HDMI_TX_PHY_PLL_CTL_0, 0x01c),
256 VC5_PHY_REG(HDMI_TX_PHY_PLL_CTL_1, 0x020),
257 VC5_PHY_REG(HDMI_TX_PHY_CLK_DIV, 0x028),
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