/drivers/gpu/drm/amd/amdgpu/ |
D | vcn_v1_0.c | 308 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 310 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 312 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v1_0_mc_resume_spg_mode() 315 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 317 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 320 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v1_0_mc_resume_spg_mode() 324 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v1_0_mc_resume_spg_mode() 327 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode() 329 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode() 331 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v1_0_mc_resume_spg_mode() [all …]
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D | mmhub_v2_3.c | 138 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_3_init_gart_aperture_regs() 140 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_3_init_gart_aperture_regs() 143 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_3_init_gart_aperture_regs() 145 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_3_init_gart_aperture_regs() 155 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0); in mmhub_v2_3_init_system_aperture_regs() 156 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_3_init_system_aperture_regs() 157 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_3_init_system_aperture_regs() 160 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v2_3_init_system_aperture_regs() 162 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v2_3_init_system_aperture_regs() 167 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v2_3_init_system_aperture_regs() [all …]
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D | psp_v3_1.c | 109 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sysdrv() 112 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sysdrv() 148 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sos() 151 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sos() 198 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v3_1_reroute_ih() 199 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih() 200 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih() 210 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v3_1_reroute_ih() 211 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih() 212 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih() [all …]
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D | gfxhub_v2_0.c | 140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs() 142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs() 145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs() 147 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs() 157 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_0_init_system_aperture_regs() 158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_0_init_system_aperture_regs() 159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_0_init_system_aperture_regs() 162 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_0_init_system_aperture_regs() 164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_0_init_system_aperture_regs() 169 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v2_0_init_system_aperture_regs() [all …]
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D | gfxhub_v2_1.c | 143 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs() 145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs() 148 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs() 150 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs() 159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_1_init_system_aperture_regs() 160 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_1_init_system_aperture_regs() 161 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_1_init_system_aperture_regs() 164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_1_init_system_aperture_regs() 166 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_1_init_system_aperture_regs() 171 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v2_1_init_system_aperture_regs() [all …]
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D | vcn_v2_0.c | 338 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 340 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 342 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v2_0_mc_resume() 345 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 347 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 350 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v2_0_mc_resume() 354 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v2_0_mc_resume() 357 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v2_0_mc_resume() 359 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume() 361 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v2_0_mc_resume() [all …]
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D | gfxhub_v1_0.c | 69 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 71 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 74 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 76 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 79 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 81 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 84 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs() 86 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs() 124 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v1_0_init_system_aperture_regs() 126 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v1_0_init_system_aperture_regs() [all …]
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D | psp_v12_0.c | 144 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sysdrv() 147 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sysdrv() 183 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sos() 186 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sos() 208 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v12_0_reroute_ih() 209 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih() 210 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih() 220 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v12_0_reroute_ih() 221 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih() 222 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih() [all …]
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D | mmhub_v1_0.c | 74 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_0_init_gart_aperture_regs() 76 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_0_init_gart_aperture_regs() 79 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_0_init_gart_aperture_regs() 81 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_0_init_gart_aperture_regs() 91 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0); in mmhub_v1_0_init_system_aperture_regs() 92 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v1_0_init_system_aperture_regs() 93 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v1_0_init_system_aperture_regs() 96 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v1_0_init_system_aperture_regs() 106 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v1_0_init_system_aperture_regs() 110 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v1_0_init_system_aperture_regs() [all …]
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D | psp_v13_0.c | 145 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36, in psp_v13_0_bootloader_load_component() 148 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, in psp_v13_0_bootloader_load_component() 203 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36, in psp_v13_0_bootloader_load_sos() 206 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, in psp_v13_0_bootloader_load_sos() 252 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101, in psp_v13_0_ring_stop() 261 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_64, in psp_v13_0_ring_stop() 290 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v13_0_ring_create() 293 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_103, psp_ring_reg); in psp_v13_0_ring_create() 296 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101, in psp_v13_0_ring_create() 317 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_69, psp_ring_reg); in psp_v13_0_ring_create() [all …]
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D | mmhub_v2_0.c | 234 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v2_0_init_system_aperture_regs() 236 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v2_0_init_system_aperture_regs() 242 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v2_0_init_system_aperture_regs() 244 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in mmhub_v2_0_init_system_aperture_regs() 248 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, in mmhub_v2_0_init_system_aperture_regs() 250 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, in mmhub_v2_0_init_system_aperture_regs() 256 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL2, tmp); in mmhub_v2_0_init_system_aperture_regs() 275 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v2_0_init_tlb_regs() 300 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp); in mmhub_v2_0_init_cache_regs() 305 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL2, tmp); in mmhub_v2_0_init_cache_regs() [all …]
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D | vcn_v3_0.c | 469 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v3_0_mc_resume() 471 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume() 473 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v3_0_mc_resume() 476 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v3_0_mc_resume() 478 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume() 481 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v3_0_mc_resume() 484 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v3_0_mc_resume() 487 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v3_0_mc_resume() 489 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume() 491 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v3_0_mc_resume() [all …]
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D | psp_v11_0_8.c | 65 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_8_ring_stop() 74 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_8_ring_stop() 103 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_8_ring_create() 106 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); in psp_v11_0_8_ring_create() 109 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_8_ring_create() 130 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); in psp_v11_0_8_ring_create() 133 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); in psp_v11_0_8_ring_create() 136 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); in psp_v11_0_8_ring_create() 140 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v11_0_8_ring_create() 189 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v11_0_8_ring_set_wptr() [all …]
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D | vcn_v2_5.c | 404 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_5_mc_resume() 406 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume() 408 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v2_5_mc_resume() 411 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_5_mc_resume() 413 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume() 416 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v2_5_mc_resume() 419 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v2_5_mc_resume() 422 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v2_5_mc_resume() 424 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume() 426 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v2_5_mc_resume() [all …]
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D | uvd_v7_0.c | 139 WREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); in uvd_v7_0_ring_set_wptr() 161 WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR, in uvd_v7_0_enc_ring_set_wptr() 164 WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2, in uvd_v7_0_enc_ring_set_wptr() 686 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in uvd_v7_0_mc_resume() 690 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume() 694 WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0); in uvd_v7_0_mc_resume() 697 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in uvd_v7_0_mc_resume() 699 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume() 702 WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, in uvd_v7_0_mc_resume() 706 WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size); in uvd_v7_0_mc_resume() [all …]
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D | gfx_v9_4.c | 695 WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_INDEX, 255); in gfx_v9_4_query_utc_edc_status() 696 WREG32_SOC15(GC, 0, mmVML2_MEM_ECC_CNTL, 0); in gfx_v9_4_query_utc_edc_status() 697 WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_INDEX, 255); in gfx_v9_4_query_utc_edc_status() 698 WREG32_SOC15(GC, 0, mmVML2_WALKER_MEM_ECC_CNTL, 0); in gfx_v9_4_query_utc_edc_status() 699 WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_INDEX, 255); in gfx_v9_4_query_utc_edc_status() 700 WREG32_SOC15(GC, 0, mmUTCL2_MEM_ECC_CNTL, 0); in gfx_v9_4_query_utc_edc_status() 702 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_INDEX, 255); in gfx_v9_4_query_utc_edc_status() 703 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0); in gfx_v9_4_query_utc_edc_status() 704 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_DSM_INDEX, 255); in gfx_v9_4_query_utc_edc_status() 705 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_2M_DSM_CNTL, 0); in gfx_v9_4_query_utc_edc_status() [all …]
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D | psp_v11_0.c | 293 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v11_0_bootloader_load_kdb() 296 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v11_0_bootloader_load_kdb() 324 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v11_0_bootloader_load_spl() 327 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v11_0_bootloader_load_spl() 355 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v11_0_bootloader_load_sysdrv() 358 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v11_0_bootloader_load_sysdrv() 389 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v11_0_bootloader_load_sos() 392 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v11_0_bootloader_load_sos() 438 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_ring_stop() 441 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_ring_stop() [all …]
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D | mmhub_v1_7.c | 81 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_7_init_gart_aperture_regs() 83 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_7_init_gart_aperture_regs() 86 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_7_init_gart_aperture_regs() 88 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_7_init_gart_aperture_regs() 92 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_7_init_gart_aperture_regs() 94 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_7_init_gart_aperture_regs() 97 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_7_init_gart_aperture_regs() 99 WREG32_SOC15(MMHUB, 0, regVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_7_init_gart_aperture_regs() 110 WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BASE, 0); in mmhub_v1_7_init_system_aperture_regs() 111 WREG32_SOC15(MMHUB, 0, regMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v1_7_init_system_aperture_regs() [all …]
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D | mes_v10_1.c | 422 WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); in mes_v10_1_enable() 425 WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START, in mes_v10_1_enable() 432 WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data); in mes_v10_1_enable() 436 WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); in mes_v10_1_enable() 444 WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); in mes_v10_1_enable() 469 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_CNTL, 0); in mes_v10_1_load_microcode() 476 WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START, in mes_v10_1_load_microcode() 480 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_LO, in mes_v10_1_load_microcode() 482 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_HI, in mes_v10_1_load_microcode() 486 WREG32_SOC15(GC, 0, mmCP_MES_MIBOUND_LO, 0x1FFFFF); in mes_v10_1_load_microcode() [all …]
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D | jpeg_v3_0.c | 229 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data); in jpeg_v3_0_disable_clock_gating() 237 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data); in jpeg_v3_0_disable_clock_gating() 244 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_CTRL, data); in jpeg_v3_0_disable_clock_gating() 257 WREG32_SOC15(JPEG, 0, mmJPEG_CGC_GATE, data); in jpeg_v3_0_enable_clock_gating() 341 WREG32_SOC15(JPEG, 0, mmJPEG_DEC_GFX10_ADDR_CONFIG, in jpeg_v3_0_start() 343 WREG32_SOC15(JPEG, 0, mmJPEG_ENC_GFX10_ADDR_CONFIG, in jpeg_v3_0_start() 355 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_VMID, 0); in jpeg_v3_0_start() 356 WREG32_SOC15(JPEG, 0, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L)); in jpeg_v3_0_start() 357 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_LOW, in jpeg_v3_0_start() 359 WREG32_SOC15(JPEG, 0, mmUVD_LMI_JRBC_RB_64BIT_BAR_HIGH, in jpeg_v3_0_start() [all …]
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D | nbio_v2_3.c | 58 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL, in nbio_v2_3_remap_hdp_registers() 60 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL, in nbio_v2_3_remap_hdp_registers() 86 WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, in nbio_v2_3_mc_access_enable() 90 WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); in nbio_v2_3_mc_access_enable() 165 WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_LOW, in nbio_v2_3_enable_doorbell_selfring_aperture() 167 WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_BASE_HIGH, in nbio_v2_3_enable_doorbell_selfring_aperture() 171 WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL, in nbio_v2_3_enable_doorbell_selfring_aperture() 193 WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); in nbio_v2_3_ih_doorbell_range() 201 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v2_3_ih_control() 215 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v2_3_ih_control() [all …]
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D | nbio_v7_2.c | 52 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL, in nbio_v7_2_remap_hdp_registers() 54 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL, in nbio_v7_2_remap_hdp_registers() 77 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN_YC, in nbio_v7_2_mc_access_enable() 81 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, in nbio_v7_2_mc_access_enable() 86 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN_YC, 0); in nbio_v7_2_mc_access_enable() 88 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0); in nbio_v7_2_mc_access_enable() 148 WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF0_0_RCC_DOORBELL_APER_EN, reg); in nbio_v7_2_enable_doorbell_aperture() 164 WREG32_SOC15(NBIO, 0, in nbio_v7_2_enable_doorbell_selfring_aperture() 167 WREG32_SOC15(NBIO, 0, in nbio_v7_2_enable_doorbell_selfring_aperture() 172 WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, in nbio_v7_2_enable_doorbell_selfring_aperture() [all …]
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D | nbio_v7_0.c | 38 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL, in nbio_v7_0_remap_hdp_registers() 40 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL, in nbio_v7_0_remap_hdp_registers() 57 WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, in nbio_v7_0_mc_access_enable() 60 WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); in nbio_v7_0_mc_access_enable() 128 WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); in nbio_v7_0_ih_doorbell_range() 135 WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset); in nbio_7_0_read_syshub_ind_mmr() 144 WREG32_SOC15(NBIO, 0, mmSYSHUB_INDEX, offset); in nbio_7_0_write_syshub_ind_mmr() 145 WREG32_SOC15(NBIO, 0, mmSYSHUB_DATA, data); in nbio_7_0_write_syshub_ind_mmr() 228 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v7_0_ih_control() 236 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v7_0_ih_control()
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D | nbio_v7_4.c | 101 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_MEM_FLUSH_CNTL, in nbio_v7_4_remap_hdp_registers() 103 WREG32_SOC15(NBIO, 0, mmREMAP_HDP_REG_FLUSH_CNTL, in nbio_v7_4_remap_hdp_registers() 125 WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, in nbio_v7_4_mc_access_enable() 128 WREG32_SOC15(NBIO, 0, mmBIF_FB_EN, 0); in nbio_v7_4_mc_access_enable() 222 WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_LOW, in nbio_v7_4_enable_doorbell_selfring_aperture() 224 WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_BASE_HIGH, in nbio_v7_4_enable_doorbell_selfring_aperture() 228 WREG32_SOC15(NBIO, 0, mmDOORBELL_SELFRING_GPA_APER_CNTL, tmp); in nbio_v7_4_enable_doorbell_selfring_aperture() 242 WREG32_SOC15(NBIO, 0, mmBIF_IH_DOORBELL_RANGE, ih_doorbell_range); in nbio_v7_4_ih_doorbell_range() 293 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL2, adev->dummy_page_addr >> 8); in nbio_v7_4_ih_control() 301 WREG32_SOC15(NBIO, 0, mmINTERRUPT_CNTL, interrupt_cntl); in nbio_v7_4_ih_control() [all …]
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/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
D | smu9_smumgr.c | 99 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_101, msg); in smu9_send_msg_to_smc_without_waiting() 101 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66, msg); in smu9_send_msg_to_smc_without_waiting() 121 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103, 0); in smu9_send_msg_to_smc() 123 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu9_send_msg_to_smc() 150 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_103, 0); in smu9_send_msg_to_smc_with_parameter() 151 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_102, parameter); in smu9_send_msg_to_smc_with_parameter() 153 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu9_send_msg_to_smc_with_parameter() 154 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82, parameter); in smu9_send_msg_to_smc_with_parameter()
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