| /drivers/misc/sgi-gru/ |
| D | grumain.c | 93 static int gru_reset_asid_limit(struct gru_state *gru, int asid) in gru_reset_asid_limit() argument
97 gru_dbg(grudev, "gid %d, asid 0x%x\n", gru->gs_gid, asid); in gru_reset_asid_limit()
100 if (asid >= limit) in gru_reset_asid_limit()
101 asid = gru_wrap_asid(gru); in gru_reset_asid_limit()
112 if (inuse_asid == asid) { in gru_reset_asid_limit()
113 asid += ASID_INC; in gru_reset_asid_limit()
114 if (asid >= limit) { in gru_reset_asid_limit()
120 if (asid >= MAX_ASID) in gru_reset_asid_limit()
121 asid = gru_wrap_asid(gru); in gru_reset_asid_limit()
126 if ((inuse_asid > asid) && (inuse_asid < limit)) in gru_reset_asid_limit()
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| D | grutlbpurge.c | 152 int grupagesize, pagesize, pageshift, gid, asid; in gru_flush_tlb_range() local
169 asid = asids->mt_asid; in gru_flush_tlb_range()
170 if (asids->mt_ctxbitmap && asid) { in gru_flush_tlb_range()
172 asid = GRUASID(asid, start); in gru_flush_tlb_range()
175 gid, asid, start, grupagesize, num, asids->mt_ctxbitmap); in gru_flush_tlb_range()
177 tgh_invalidate(tgh, start, ~0, asid, grupagesize, 0, in gru_flush_tlb_range()
186 gid, asid, asids->mt_ctxbitmap, in gru_flush_tlb_range()
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| D | gruhandles.c | 141 int asid, int pagesize, int global, int n, in tgh_invalidate() argument
145 tgh->asid = asid; in tgh_invalidate()
158 unsigned long vaddr, int asid, int dirty, in tfh_write_only() argument
161 tfh->fillasid = asid; in tfh_write_only()
174 unsigned long vaddr, int asid, int dirty, in tfh_write_restart() argument
177 tfh->fillasid = asid; in tfh_write_restart()
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| D | gruhandles.h | 201 unsigned int asid:24; /* DW 2 */ member
375 unsigned int asid[8]; /* DW 2 - 5 */ member
508 unsigned long vaddrmask, int asid, int pagesize, int global, int n,
511 int gaa, unsigned long vaddr, int asid, int dirty, int pagesize);
513 int gaa, unsigned long vaddr, int asid, int dirty, int pagesize);
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| D | grufault.c | 311 unsigned long fault_vaddr, int asid, int write, in gru_preload_tlb() argument
333 if (ret || tfh_write_only(tfh, gpa, GAA_RAM, vaddr, asid, write, in gru_preload_tlb()
339 vaddr, asid, write, pageshift, gpa); in gru_preload_tlb()
362 int pageshift = 0, asid, write, ret, atomic = !cbk, indexway; in gru_try_dropin() local
399 asid = tfh->missasid; in gru_try_dropin()
401 if (asid == 0) in gru_try_dropin()
428 gru_preload_tlb(gru, gts, atomic, vaddr, asid, write, tlb_preload_count, tfh, cbe); in gru_try_dropin()
434 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write, in gru_try_dropin()
439 atomic ? "atomic" : "non-atomic", gru->gs_gid, gts, tfh, vaddr, asid, in gru_try_dropin()
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| D | grutables.h | 290 #define GRUASID(asid, addr) ((asid) + GRUREGION(addr)) argument
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| /drivers/iommu/arm/arm-smmu-v3/ |
| D | arm-smmu-v3-sva.c | 45 arm_smmu_share_asid(struct mm_struct *mm, u16 asid) in arm_smmu_share_asid() argument
53 cd = xa_load(&arm_smmu_asid_xa, asid); in arm_smmu_share_asid()
77 cd->asid = new_asid; in arm_smmu_share_asid()
86 arm_smmu_tlb_inv_asid(smmu, asid); in arm_smmu_share_asid()
88 xa_erase(&arm_smmu_asid_xa, asid); in arm_smmu_share_asid()
94 u16 asid; in arm_smmu_alloc_shared_cd() local
103 asid = arm64_mm_context_get(mm); in arm_smmu_alloc_shared_cd()
104 if (!asid) { in arm_smmu_alloc_shared_cd()
118 ret = arm_smmu_share_asid(mm, asid); in arm_smmu_alloc_shared_cd()
124 err = xa_insert(&arm_smmu_asid_xa, asid, cd, GFP_KERNEL); in arm_smmu_alloc_shared_cd()
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| D | arm-smmu-v3.h | 472 u16 asid; member
580 u16 asid; member
751 void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid);
752 void arm_smmu_tlb_inv_range_asid(unsigned long iova, size_t size, int asid,
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| D | arm-smmu-v3.c | 281 cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid); in arm_smmu_cmdq_build_cmd()
297 cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid); in arm_smmu_cmdq_build_cmd()
303 cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid); in arm_smmu_cmdq_build_cmd()
959 void arm_smmu_tlb_inv_asid(struct arm_smmu_device *smmu, u16 asid) in arm_smmu_tlb_inv_asid() argument
964 .tlbi.asid = asid, in arm_smmu_tlb_inv_asid()
1086 val |= FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid); in arm_smmu_write_ctx_desc()
1110 FIELD_PREP(CTXDESC_CD_0_ASID, cd->asid) | in arm_smmu_write_ctx_desc()
1216 if (!cd->asid) in arm_smmu_free_asid()
1221 old_cd = xa_erase(&arm_smmu_asid_xa, cd->asid); in arm_smmu_free_asid()
1858 arm_smmu_tlb_inv_asid(smmu, smmu_domain->s1_cfg.cd.asid); in arm_smmu_tlb_inv_context()
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| /drivers/misc/habanalabs/common/ |
| D | asid.c | 51 void hl_asid_free(struct hl_device *hdev, unsigned long asid) in hl_asid_free() argument
53 if (asid == HL_KERNEL_ASID_ID || asid >= hdev->asic_prop.max_asid) { in hl_asid_free()
54 dev_crit(hdev->dev, "Invalid ASID %lu", asid); in hl_asid_free()
58 clear_bit(asid, hdev->asid_bitmap); in hl_asid_free()
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| D | context.c | 94 if (ctx->asid != HL_KERNEL_ASID_ID) { in hl_ctx_fini()
95 dev_dbg(hdev->dev, "closing user context %d\n", ctx->asid); in hl_ctx_fini()
109 hl_asid_free(hdev, ctx->asid); in hl_ctx_fini()
211 ctx->asid = HL_KERNEL_ASID_ID; /* Kernel driver gets ASID 0 */ in hl_ctx_init()
225 ctx->asid = hl_asid_alloc(hdev); in hl_ctx_init()
226 if (!ctx->asid) { in hl_ctx_init()
254 dev_dbg(hdev->dev, "create user context %d\n", ctx->asid); in hl_ctx_init()
264 if (ctx->asid != HL_KERNEL_ASID_ID) in hl_ctx_init()
265 hl_asid_free(hdev, ctx->asid); in hl_ctx_init()
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| D | memory.c | 93 phys_pg_pack->asid = ctx->asid; in alloc_device_memory()
836 phys_pg_pack->asid = ctx->asid; in init_phys_pg_pack_from_userptr()
1147 phys_pg_pack->asid != ctx->asid) { in map_device_va()
1196 *vm_type, ctx->asid, ret_vaddr, phys_pg_pack->total_size); in map_device_va()
1344 *vm_type, ctx->asid, vaddr, in unmap_device_va()
1965 dev_err(hdev->dev, "failed to init context %d\n", ctx->asid); in vm_ctx_init_with_ranges()
2119 hnode->vaddr, ctx->asid); in hl_vm_ctx_fini()
2134 if (phys_pg_list->asid == ctx->asid) { in hl_vm_ctx_fini()
2137 phys_pg_list, ctx->asid); in hl_vm_ctx_fini()
2158 if (ctx->asid != HL_KERNEL_ASID_ID && in hl_vm_ctx_fini()
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| D | command_submission.c | 227 parser.ctx_id = job->cs->ctx->asid; in cs_parser()
921 cs->ctx->asid, cs->sequence); in hl_cs_rollback_all()
1140 ctx->asid); in hl_cs_sanity_checks()
1157 ctx->asid); in hl_cs_sanity_checks()
1163 ctx->asid); in hl_cs_sanity_checks()
1387 cs->ctx->asid, cs->sequence, job->id, rc); in cs_ioctl_default()
1400 cs->ctx->asid, cs->sequence); in cs_ioctl_default()
1417 cs->ctx->asid, cs->sequence, rc); in cs_ioctl_default()
1457 rc = hdev->asic_funcs->context_switch(hdev, ctx->asid); in hl_cs_ctx_switch()
1461 ctx->asid, rc); in hl_cs_ctx_switch()
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| D | Makefile | 10 common/asid.o common/habanalabs_ioctl.o \
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| D | debugfs.c | 117 cb->id, cb->ctx->asid, cb->size, in command_buffers_show()
148 cs->sequence, cs->ctx->asid, in command_submission_show()
180 job->id, job->cs->sequence, job->cs->ctx->asid, in command_submission_jobs_show()
252 seq_printf(s, "ctx asid: %u\n", ctx->asid); in vm_show()
276 if (ctx->asid != HL_KERNEL_ASID_ID && in vm_show()
298 if (phys_pg_pack->asid != ctx->asid) in vm_show()
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| /drivers/misc/habanalabs/gaudi/ |
| D | gaudi.c | 464 static int gaudi_mmu_update_asid_hop0_addr(struct hl_device *hdev, u32 asid,
477 static void gaudi_mmu_prepare(struct hl_device *hdev, u32 asid);
6129 static int gaudi_context_switch(struct hl_device *hdev, u32 asid) in gaudi_context_switch() argument
6543 void gaudi_mmu_prepare_reg(struct hl_device *hdev, u64 reg, u32 asid) in gaudi_mmu_prepare_reg() argument
6547 WREG32_OR(reg, asid); in gaudi_mmu_prepare_reg()
6550 static void gaudi_mmu_prepare(struct hl_device *hdev, u32 asid) in gaudi_mmu_prepare() argument
6557 if (asid & ~DMA0_QM_GLBL_NON_SECURE_PROPS_0_ASID_MASK) { in gaudi_mmu_prepare()
6558 dev_crit(hdev->dev, "asid %u is too big\n", asid); in gaudi_mmu_prepare()
6566 gaudi_mmu_prepare_reg(hdev, mmDMA0_QM_GLBL_NON_SECURE_PROPS_0, asid); in gaudi_mmu_prepare()
6567 gaudi_mmu_prepare_reg(hdev, mmDMA0_QM_GLBL_NON_SECURE_PROPS_1, asid); in gaudi_mmu_prepare()
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| /drivers/iommu/arm/arm-smmu/ |
| D | qcom_iommu.c | 62 u8 asid; /* asid and ctx bank # are 1:1 */ member
92 static struct qcom_iommu_ctx * to_ctx(struct qcom_iommu_domain *d, unsigned asid) in to_ctx() argument
97 return qcom_iommu->ctxs[asid - 1]; in to_ctx()
151 iommu_writel(ctx, ARM_SMMU_CB_S1_TLBIASID, ctx->asid); in qcom_iommu_tlb_inv_context()
171 iova |= ctx->asid; in qcom_iommu_tlb_inv_range_nosync()
217 fsr, iova, fsynr, ctx->asid); in qcom_iommu_fault()
268 ret = qcom_scm_restore_sec_cfg(qcom_iommu->sec_id, ctx->asid); in qcom_iommu_init_domain()
286 FIELD_PREP(ARM_SMMU_TTBRn_ASID, ctx->asid)); in qcom_iommu_init_domain()
556 unsigned asid = args->args[0]; in qcom_iommu_of_xlate() local
575 if (WARN_ON(asid < 1) || in qcom_iommu_of_xlate()
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| D | arm-smmu-qcom.c | 139 cb->ttbr[0] = FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid); in qcom_adreno_smmu_set_ttbr0_cfg()
152 cb->ttbr[0] |= FIELD_PREP(ARM_SMMU_TTBRn_ASID, cb->cfg->asid); in qcom_adreno_smmu_set_ttbr0_cfg()
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| D | arm-smmu-impl.c | 80 smmu_domain->cfg.asid += cs->id_base; in cavium_init_context()
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| D | arm-smmu.c | 264 ARM_SMMU_CB_S1_TLBIASID, smmu_domain->cfg.asid); in arm_smmu_tlb_inv_context_s1()
292 iova |= cfg->asid; in arm_smmu_tlb_inv_range_s1()
299 iova |= (u64)cfg->asid << 48; in arm_smmu_tlb_inv_range_s1()
504 cfg->asid); in arm_smmu_init_context_bank()
506 cfg->asid); in arm_smmu_init_context_bank()
588 arm_smmu_cb_write(smmu, idx, ARM_SMMU_CB_CONTEXTIDR, cfg->asid); in arm_smmu_write_context_bank()
764 cfg->asid = cfg->cbndx; in arm_smmu_init_domain_context()
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| /drivers/gpu/drm/msm/ |
| D | msm_iommu.c | 25 u32 asid; member
101 phys_addr_t *ttbr, int *asid) in msm_iommu_pagetable_params() argument
113 if (asid) in msm_iommu_pagetable_params()
114 *asid = pagetable->asid; in msm_iommu_pagetable_params()
223 pagetable->asid = 0; in msm_iommu_pagetable_create()
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| D | msm_mmu.h | 60 int *asid);
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| /drivers/iommu/ |
| D | tegra-smmu.c | 208 unsigned long asid) in smmu_flush_tlb_asid() argument
213 value = (asid & 0x3) << 29; in smmu_flush_tlb_asid()
215 value = (asid & 0x7f) << 24; in smmu_flush_tlb_asid()
222 unsigned long asid, in smmu_flush_tlb_section() argument
228 value = (asid & 0x3) << 29; in smmu_flush_tlb_section()
230 value = (asid & 0x7f) << 24; in smmu_flush_tlb_section()
237 unsigned long asid, in smmu_flush_tlb_group() argument
243 value = (asid & 0x3) << 29; in smmu_flush_tlb_group()
245 value = (asid & 0x7f) << 24; in smmu_flush_tlb_group()
353 unsigned int asid) in tegra_smmu_enable() argument
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| /drivers/misc/habanalabs/common/mmu/ |
| D | mmu_v1.c | 88 (ctx->asid * ctx->hdev->asic_prop.mmu_hop_table_size); in get_phys_hop0_addr()
94 (ctx->asid * ctx->hdev->asic_prop.mmu_hop_table_size); in get_hop0_addr()
267 (ctx->asid == HL_KERNEL_ASID_ID)) in dram_default_mapping_init()
367 (ctx->asid == HL_KERNEL_ASID_ID)) in dram_default_mapping_fini()
517 ctx->asid); in hl_mmu_v1_ctx_fini()
522 pgt_info->phys_addr, ctx->asid, pgt_info->num_of_ptes); in hl_mmu_v1_ctx_fini()
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| /drivers/misc/habanalabs/goya/ |
| D | goya.c | 358 static void goya_mmu_prepare(struct hl_device *hdev, u32 asid);
699 static void goya_mmu_prepare_reg(struct hl_device *hdev, u64 reg, u32 asid) in goya_mmu_prepare_reg() argument
703 WREG32_OR(reg, asid); in goya_mmu_prepare_reg()
2548 static int goya_mmu_update_asid_hop0_addr(struct hl_device *hdev, u32 asid, in goya_mmu_update_asid_hop0_addr() argument
2561 WREG32(MMU_ASID_BUSY, 0x80000000 | asid); in goya_mmu_update_asid_hop0_addr()
2573 "Timeout during MMU hop0 config of asid %d\n", asid); in goya_mmu_update_asid_hop0_addr()
4992 int goya_context_switch(struct hl_device *hdev, u32 asid) in goya_context_switch() argument
5177 static void goya_mmu_prepare(struct hl_device *hdev, u32 asid) in goya_mmu_prepare() argument
5185 if (asid & ~MME_QM_GLBL_SECURE_PROPS_ASID_MASK) { in goya_mmu_prepare()
5186 dev_crit(hdev->dev, "asid %u is too big\n", asid); in goya_mmu_prepare()
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