/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
D | dcn31_clk_mgr.c | 522 const DpmClocks_t *clock_table, in find_clk_for_voltage() argument 531 if (clock_table->SocVoltage[i] == voltage) { in find_clk_for_voltage() 533 } else if (clock_table->SocVoltage[i] >= max_voltage && in find_clk_for_voltage() 534 clock_table->SocVoltage[i] < voltage) { in find_clk_for_voltage() 535 max_voltage = clock_table->SocVoltage[i]; in find_clk_for_voltage() 547 const DpmClocks_t *clock_table) in dcn31_clk_mgr_helper_populate_bw_params() argument 560 if (clock_table->DfPstateTable[i].FClk != 0) { in dcn31_clk_mgr_helper_populate_bw_params() 575 if (clock_table->NumDispClkLevelsEnabled <= NUM_DISPCLK_DPM_LEVELS && in dcn31_clk_mgr_helper_populate_bw_params() 576 clock_table->NumDispClkLevelsEnabled <= NUM_DPPCLK_DPM_LEVELS) { in dcn31_clk_mgr_helper_populate_bw_params() 577 max_dispclk = find_max_clk_value(clock_table->DispClocks, clock_table->NumDispClkLevelsEnabled); in dcn31_clk_mgr_helper_populate_bw_params() [all …]
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
D | rn_clk_mgr.c | 840 static unsigned int find_socclk_for_voltage(struct dpm_clocks *clock_table, unsigned int voltage) in find_socclk_for_voltage() argument 845 if (clock_table->SocClocks[i].Vol == voltage) in find_socclk_for_voltage() 846 return clock_table->SocClocks[i].Freq; in find_socclk_for_voltage() 853 static unsigned int find_dcfclk_for_voltage(struct dpm_clocks *clock_table, unsigned int voltage) in find_dcfclk_for_voltage() argument 858 if (clock_table->DcfClocks[i].Vol == voltage) in find_dcfclk_for_voltage() 859 return clock_table->DcfClocks[i].Freq; in find_dcfclk_for_voltage() 866 …populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct integra… in rn_clk_mgr_helper_populate_bw_params() argument 877 if (clock_table->FClocks[i].Freq != 0 && clock_table->FClocks[i].Vol != 0) { in rn_clk_mgr_helper_populate_bw_params() 892 bw_params->clk_table.entries[i].fclk_mhz = clock_table->FClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params() 893 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[j].Freq; in rn_clk_mgr_helper_populate_bw_params() [all …]
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/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | smu8_hwmgr.c | 437 struct SMU8_Fusion_ClkTable *clock_table; in smu8_upload_pptable_to_smu() local 462 clock_table = (struct SMU8_Fusion_ClkTable *)table; in smu8_upload_pptable_to_smu() 479 clock_table->SclkBreakdownTable.ClkLevel[i].GnbVid = in smu8_upload_pptable_to_smu() 481 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu() 485 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu() 488 clock_table->SclkBreakdownTable.ClkLevel[i].DfsDid = in smu8_upload_pptable_to_smu() 492 clock_table->SclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu() 496 clock_table->AclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu() 498 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu() 502 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu() [all …]
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D | smu10_hwmgr.c | 486 DpmClocks_t *table = &(smu10_data->clock_table); in smu10_populate_clock_table() 498 &smu10_data->clock_table.DcefClocks[0]); in smu10_populate_clock_table() 501 &smu10_data->clock_table.SocClocks[0]); in smu10_populate_clock_table() 504 &smu10_data->clock_table.FClocks[0]); in smu10_populate_clock_table() 507 &smu10_data->clock_table.MemClocks[0]); in smu10_populate_clock_table() 633 if (min_mclk < data->clock_table.FClocks[0].Freq) in smu10_dpm_force_dpm_level() 634 min_mclk = data->clock_table.FClocks[0].Freq; in smu10_dpm_force_dpm_level()
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D | processpptables.c | 410 struct phm_clock_array *clock_table; in get_valid_clk() local 412 clock_table = kzalloc(struct_size(clock_table, values, table->count), GFP_KERNEL); in get_valid_clk() 413 if (!clock_table) in get_valid_clk() 416 clock_table->count = (unsigned long)table->count; in get_valid_clk() 418 for (i = 0; i < clock_table->count; i++) in get_valid_clk() 419 clock_table->values[i] = (unsigned long)table->entries[i].clk; in get_valid_clk() 421 *ptable = clock_table; in get_valid_clk()
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D | smu10_hwmgr.h | 297 DpmClocks_t clock_table; member
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/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
D | vg_clk_mgr.c | 617 static unsigned int find_dcfclk_for_voltage(const struct vg_dpm_clocks *clock_table, in find_dcfclk_for_voltage() argument 623 if (clock_table->SocVoltage[i] == voltage) in find_dcfclk_for_voltage() 624 return clock_table->DcfClocks[i]; in find_dcfclk_for_voltage() 634 const struct vg_dpm_clocks *clock_table) in vg_clk_mgr_helper_populate_bw_params() argument 646 if (clock_table->DfPstateTable[i].fclk != 0) { in vg_clk_mgr_helper_populate_bw_params() 661 bw_params->clk_table.entries[i].fclk_mhz = clock_table->DfPstateTable[j].fclk; in vg_clk_mgr_helper_populate_bw_params() 662 bw_params->clk_table.entries[i].memclk_mhz = clock_table->DfPstateTable[j].memclk; in vg_clk_mgr_helper_populate_bw_params() 663 bw_params->clk_table.entries[i].voltage = clock_table->DfPstateTable[j].voltage; in vg_clk_mgr_helper_populate_bw_params() 664 …bw_params->clk_table.entries[i].dcfclk_mhz = find_dcfclk_for_voltage(clock_table, clock_table->DfP… in vg_clk_mgr_helper_populate_bw_params()
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/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
D | renoir_ppt.c | 747 static int renoir_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) in renoir_get_dpm_clock_table() argument 752 if (!clock_table || !table) in renoir_get_dpm_clock_table() 756 clock_table->DcfClocks[i].Freq = table->DcfClocks[i].Freq; in renoir_get_dpm_clock_table() 757 clock_table->DcfClocks[i].Vol = table->DcfClocks[i].Vol; in renoir_get_dpm_clock_table() 761 clock_table->SocClocks[i].Freq = table->SocClocks[i].Freq; in renoir_get_dpm_clock_table() 762 clock_table->SocClocks[i].Vol = table->SocClocks[i].Vol; in renoir_get_dpm_clock_table() 766 clock_table->FClocks[i].Freq = table->FClocks[i].Freq; in renoir_get_dpm_clock_table() 767 clock_table->FClocks[i].Vol = table->FClocks[i].Vol; in renoir_get_dpm_clock_table() 771 clock_table->MemClocks[i].Freq = table->MemClocks[i].Freq; in renoir_get_dpm_clock_table() 772 clock_table->MemClocks[i].Vol = table->MemClocks[i].Vol; in renoir_get_dpm_clock_table() [all …]
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/drivers/gpu/drm/amd/display/dc/ |
D | dm_pp_smu.h | 283 struct dpm_clocks *clock_table); 303 struct dpm_clocks *clock_table);
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/drivers/tty/serial/8250/ |
D | 8250_fintek.c | 302 static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ, in fintek_8250_set_termios() local 343 clock_table[i]); in fintek_8250_set_termios()
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/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | vangogh_ppt.c | 1922 static int vangogh_get_dpm_clock_table(struct smu_context *smu, struct dpm_clocks *clock_table) in vangogh_get_dpm_clock_table() argument 1927 if (!clock_table || !table) in vangogh_get_dpm_clock_table() 1931 clock_table->SocClocks[i].Freq = table->SocClocks[i]; in vangogh_get_dpm_clock_table() 1932 clock_table->SocClocks[i].Vol = table->SocVoltage[i]; in vangogh_get_dpm_clock_table() 1936 clock_table->FClocks[i].Freq = table->DfPstateTable[i].fclk; in vangogh_get_dpm_clock_table() 1937 clock_table->FClocks[i].Vol = table->DfPstateTable[i].voltage; in vangogh_get_dpm_clock_table() 1941 clock_table->MemClocks[i].Freq = table->DfPstateTable[i].memclk; in vangogh_get_dpm_clock_table() 1942 clock_table->MemClocks[i].Vol = table->DfPstateTable[i].voltage; in vangogh_get_dpm_clock_table()
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/drivers/usb/serial/ |
D | f81232.c | 128 static u8 const clock_table[] = { F81232_CLK_1_846_MHZ, F81232_CLK_14_77_MHZ, variable 539 F81232_CLK_MASK, clock_table[idx]); in f81232_set_baudrate()
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D | f81534.c | 190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, variable 586 port_priv->shadow_clk |= clock_table[idx]; in f81534_set_port_config()
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_pp_smu.c | 794 struct pp_smu *pp, struct dpm_clocks *clock_table) in pp_rn_get_dpm_clock_table() argument 804 if (!pp_funcs->get_dpm_clock_table(pp_handle, clock_table)) in pp_rn_get_dpm_clock_table()
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/drivers/gpu/drm/amd/include/ |
D | kgd_pp_interface.h | 398 struct dpm_clocks *clock_table);
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/drivers/gpu/drm/amd/pm/inc/ |
D | amdgpu_smu.h | 838 int (*get_dpm_clock_table)(struct smu_context *smu, struct dpm_clocks *clock_table);
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/drivers/gpu/drm/amd/pm/swsmu/ |
D | amdgpu_smu.c | 2948 struct dpm_clocks *clock_table) in smu_get_dpm_clock_table() argument 2959 ret = smu->ppt_funcs->get_dpm_clock_table(smu, clock_table); in smu_get_dpm_clock_table()
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