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Searched refs:control_status (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/imx/dcss/
Ddcss-dtg.c90 u32 control_status; member
175 dtg->control_status |= OVL_DATA_MODE | BLENDER_VIDEO_ALPHA_SEL | in dcss_dtg_init()
309 dtg->control_status |= in dcss_dtg_css_set()
315 dtg->control_status |= DTG_START; in dcss_dtg_enable()
317 dtg->control_status &= ~(CH1_ALPHA_SEL | DEFAULT_FG_ALPHA_MASK); in dcss_dtg_enable()
318 dtg->control_status |= dtg->alpha_cfg; in dcss_dtg_enable()
320 dcss_dtg_write(dtg, dtg->control_status, DCSS_DTG_TC_CONTROL_STATUS); in dcss_dtg_enable()
327 dtg->control_status &= ~DTG_START; in dcss_dtg_shutoff()
329 dcss_writel(dtg->control_status, in dcss_dtg_shutoff()
343 u32 control_status; in dcss_dtg_ch_enable() local
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/drivers/char/hw_random/
Dcavium-rng.c19 void __iomem *control_status; member
34 rng->control_status = pcim_iomap(pdev, 0, 0); in cavium_rng_probe()
35 if (!rng->control_status) { in cavium_rng_probe()
43 rng->control_status); in cavium_rng_probe()
51 writeq(0, rng->control_status); in cavium_rng_probe()
72 writeq(0, rng->control_status); in cavium_rng_remove()
Docteon-rng.c24 void __iomem *control_status; member
36 cvmx_write_csr((__force u64)p->control_status, ctl.u64); in octeon_rng_init()
47 cvmx_write_csr((__force u64)p->control_status, ctl.u64); in octeon_rng_cleanup()
84 rng->control_status = devm_ioremap(&pdev->dev, in octeon_rng_probe()
87 if (!rng->control_status) in octeon_rng_probe()
/drivers/watchdog/
Dpcwd.c221 int control_status; in send_isa_command() local
228 control_status = (cmd & 0x0F) | WD_WCMD; in send_isa_command()
229 outb_p(control_status, pcwd_private.io_addr + 2); in send_isa_command()
484 int control_status; in pcwd_get_status() local
492 control_status = inb(pcwd_private.io_addr); in pcwd_get_status()
499 control_status = inb(pcwd_private.io_addr + 1); in pcwd_get_status()
504 if (control_status & WD_WDRST) in pcwd_get_status()
507 if (control_status & WD_T110) { in pcwd_get_status()
515 if (control_status & WD_REVC_WTRP) in pcwd_get_status()
518 if (control_status & WD_REVC_TTRP) { in pcwd_get_status()
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Dpcwd_pci.c339 int control_status; in pcipcwd_get_status() local
342 control_status = inb_p(pcipcwd_private.io_addr + 1); in pcipcwd_get_status()
343 if (control_status & WD_PCI_WTRP) in pcipcwd_get_status()
345 if (control_status & WD_PCI_TTRP) { in pcipcwd_get_status()
352 pr_debug("Control Status #1: 0x%02x\n", control_status); in pcipcwd_get_status()
359 int control_status; in pcipcwd_clear_status() local
366 control_status = inb_p(pcipcwd_private.io_addr + 1); in pcipcwd_clear_status()
369 pr_debug("status was: 0x%02x\n", control_status); in pcipcwd_clear_status()
371 (control_status & WD_PCI_R2DS) | WD_PCI_WTRP); in pcipcwd_clear_status()
375 outb_p((control_status & WD_PCI_R2DS) | WD_PCI_WTRP, in pcipcwd_clear_status()
/drivers/scsi/isci/
Dregisters.h1009 u32 control_status; member
Dhost.c2173 status = readl(&ihost->smu_registers->control_status); in sci_controller_initialize()