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Searched refs:cur_state (Results 1 – 25 of 70) sorted by relevance

123

/drivers/thermal/
Dgov_step_wise.c41 unsigned long cur_state; in get_target_state() local
49 cdev->ops->get_cur_state(cdev, &cur_state); in get_target_state()
51 dev_dbg(&cdev->device, "cur_state=%ld\n", cur_state); in get_target_state()
55 next_target = (cur_state + 1) >= instance->upper ? in get_target_state()
57 ((cur_state + 1) < instance->lower ? in get_target_state()
58 instance->lower : (cur_state + 1)); in get_target_state()
69 next_target = cur_state < instance->upper ? in get_target_state()
70 (cur_state + 1) : instance->upper; in get_target_state()
80 if (cur_state <= instance->lower) { in get_target_state()
85 next_target = cur_state - 1; in get_target_state()
[all …]
/drivers/bus/mhi/host/
Dpm.c114 unsigned long cur_state = mhi_cntrl->pm_state; in mhi_tryset_pm_state() local
115 int index = find_last_bit(&cur_state, 32); in mhi_tryset_pm_state()
118 return cur_state; in mhi_tryset_pm_state()
120 if (unlikely(dev_state_transitions[index].from_state != cur_state)) in mhi_tryset_pm_state()
121 return cur_state; in mhi_tryset_pm_state()
124 return cur_state; in mhi_tryset_pm_state()
157 enum mhi_pm_state cur_state; in mhi_ready_state_transition() local
187 cur_state = mhi_tryset_pm_state(mhi_cntrl, MHI_PM_POR); in mhi_ready_state_transition()
191 if (cur_state != MHI_PM_POR) { in mhi_ready_state_transition()
194 to_mhi_pm_state_str(cur_state)); in mhi_ready_state_transition()
[all …]
/drivers/gpu/drm/
Ddrm_bridge.c766 struct drm_bridge_state *cur_state; in select_bus_fmt_recursive() local
772 cur_state = drm_atomic_get_new_bridge_state(crtc_state->state, in select_bus_fmt_recursive()
795 if (cur_state) { in select_bus_fmt_recursive()
796 cur_state->input_bus_cfg.format = MEDIA_BUS_FMT_FIXED; in select_bus_fmt_recursive()
797 cur_state->output_bus_cfg.format = out_bus_fmt; in select_bus_fmt_recursive()
807 if (WARN_ON(!cur_state)) in select_bus_fmt_recursive()
811 cur_state, in select_bus_fmt_recursive()
822 cur_state->input_bus_cfg.format = in_bus_fmts[0]; in select_bus_fmt_recursive()
823 cur_state->output_bus_cfg.format = out_bus_fmt; in select_bus_fmt_recursive()
837 cur_state->input_bus_cfg.format = in_bus_fmts[i]; in select_bus_fmt_recursive()
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/drivers/net/ethernet/qlogic/qed/
Dqed_roce.c836 out_params->state = qp->cur_state; in qed_roce_query_qp()
889 qp->cur_state = QED_ROCE_QP_STATE_ERR; in qed_roce_query_qp()
891 out_params->state = qp->cur_state; in qed_roce_query_qp()
935 qp->cur_state = QED_ROCE_QP_STATE_ERR; in qed_roce_query_qp()
938 out_params->state = qp->cur_state; in qed_roce_query_qp()
958 if ((qp->cur_state != QED_ROCE_QP_STATE_RESET) && in qed_roce_destroy_qp()
959 (qp->cur_state != QED_ROCE_QP_STATE_ERR) && in qed_roce_destroy_qp()
960 (qp->cur_state != QED_ROCE_QP_STATE_INIT)) { in qed_roce_destroy_qp()
966 if (qp->cur_state != QED_ROCE_QP_STATE_RESET) { in qed_roce_destroy_qp()
993 (qp->cur_state == QED_ROCE_QP_STATE_RTR)) { in qed_roce_modify_qp()
[all …]
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega20_baco.c78 enum BACO_STATE cur_state; in vega20_baco_set_state() local
81 vega20_baco_get_state(hwmgr, &cur_state); in vega20_baco_set_state()
83 if (cur_state == state) in vega20_baco_set_state()
Dvega12_baco.c88 enum BACO_STATE cur_state; in vega12_baco_set_state() local
90 smu9_baco_get_state(hwmgr, &cur_state); in vega12_baco_set_state()
92 if (cur_state == state) in vega12_baco_set_state()
Dvega10_baco.c90 enum BACO_STATE cur_state; in vega10_baco_set_state() local
92 smu9_baco_get_state(hwmgr, &cur_state); in vega10_baco_set_state()
94 if (cur_state == state) in vega10_baco_set_state()
Dfiji_baco.c163 enum BACO_STATE cur_state; in fiji_baco_set_state() local
165 smu7_baco_get_state(hwmgr, &cur_state); in fiji_baco_set_state()
167 if (cur_state == state) in fiji_baco_set_state()
Dpolaris_baco.c183 enum BACO_STATE cur_state; in polaris_baco_set_state() local
185 smu7_baco_get_state(hwmgr, &cur_state); in polaris_baco_set_state()
187 if (cur_state == state) in polaris_baco_set_state()
Dci_baco.c164 enum BACO_STATE cur_state; in ci_baco_set_state() local
166 smu7_baco_get_state(hwmgr, &cur_state); in ci_baco_set_state()
168 if (cur_state == state) in ci_baco_set_state()
Dtonga_baco.c187 enum BACO_STATE cur_state; in tonga_baco_set_state() local
189 smu7_baco_get_state(hwmgr, &cur_state); in tonga_baco_set_state()
191 if (cur_state == state) in tonga_baco_set_state()
/drivers/net/ethernet/mellanox/mlx4/
Dqp.c88 enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, in __mlx4_qp_modify() argument
140 if (cur_state >= MLX4_QP_NUM_STATE || new_state >= MLX4_QP_NUM_STATE || in __mlx4_qp_modify()
141 !op[cur_state][new_state]) in __mlx4_qp_modify()
144 if (op[cur_state][new_state] == MLX4_CMD_2RST_QP) { in __mlx4_qp_modify()
147 if (mlx4_is_master(dev) && cur_state != MLX4_QP_STATE_ERR && in __mlx4_qp_modify()
148 cur_state != MLX4_QP_STATE_RST && in __mlx4_qp_modify()
163 if (cur_state == MLX4_QP_STATE_RST && new_state == MLX4_QP_STATE_INIT) { in __mlx4_qp_modify()
170 if ((cur_state == MLX4_QP_STATE_RTR) && in __mlx4_qp_modify()
185 op[cur_state][new_state], MLX4_CMD_TIME_CLASS_C, native); in __mlx4_qp_modify()
189 if (cur_state != MLX4_QP_STATE_ERR && in __mlx4_qp_modify()
[all …]
/drivers/acpi/
Dpower.c190 u8 cur_state; in __get_state() local
196 cur_state = sta & ACPI_POWER_RESOURCE_STATE_ON; in __get_state()
199 cur_state ? "on" : "off"); in __get_state()
201 *state = cur_state; in __get_state()
222 u8 cur_state = ACPI_POWER_RESOURCE_STATE_OFF; in acpi_power_get_list_state() local
233 result = acpi_power_get_state(resource, &cur_state); in acpi_power_get_list_state()
238 if (cur_state != ACPI_POWER_RESOURCE_STATE_ON) in acpi_power_get_list_state()
242 pr_debug("Power resource list is %s\n", cur_state ? "on" : "off"); in acpi_power_get_list_state()
244 *state = cur_state; in acpi_power_get_list_state()
Dprocessor_thermal.c206 unsigned long *cur_state) in processor_get_cur_state() argument
218 *cur_state = cpufreq_get_cur_state(pr->id); in processor_get_cur_state()
220 *cur_state += pr->throttling.state; in processor_get_cur_state()
/drivers/misc/cxl/
Dguest.c823 int rc, cur_state; in afu_update_state() local
825 rc = afu_read_error_state(afu, &cur_state); in afu_update_state()
829 if (afu->guest->previous_state == cur_state) in afu_update_state()
832 pr_devel("AFU(%d) update state to %#x\n", afu->slice, cur_state); in afu_update_state()
834 switch (cur_state) { in afu_update_state()
836 afu->guest->previous_state = cur_state; in afu_update_state()
847 rc = afu_read_error_state(afu, &cur_state); in afu_update_state()
848 if (!rc && cur_state == H_STATE_NORMAL) { in afu_update_state()
857 afu->guest->previous_state = cur_state; in afu_update_state()
864 afu->guest->previous_state = cur_state; in afu_update_state()
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/drivers/net/ethernet/google/gve/
Dgve_tx_dqo.c83 struct gve_tx_pending_packet_dqo *cur_state = in gve_tx_clean_pending_packets() local
87 for (j = 0; j < cur_state->num_bufs; j++) { in gve_tx_clean_pending_packets()
90 dma_unmap_addr(cur_state, dma[j]), in gve_tx_clean_pending_packets()
91 dma_unmap_len(cur_state, len[j]), in gve_tx_clean_pending_packets()
95 dma_unmap_addr(cur_state, dma[j]), in gve_tx_clean_pending_packets()
96 dma_unmap_len(cur_state, len[j]), in gve_tx_clean_pending_packets()
100 if (cur_state->skb) { in gve_tx_clean_pending_packets()
101 dev_consume_skb_any(cur_state->skb); in gve_tx_clean_pending_packets()
102 cur_state->skb = NULL; in gve_tx_clean_pending_packets()
/drivers/infiniband/hw/usnic/
Dusnic_ib_main.c108 enum ib_qp_state cur_state; in usnic_ib_qp_grp_modify_active_to_err() local
115 cur_state = qp_grp->state; in usnic_ib_qp_grp_modify_active_to_err()
116 if (cur_state == IB_QPS_INIT || in usnic_ib_qp_grp_modify_active_to_err()
117 cur_state == IB_QPS_RTR || in usnic_ib_qp_grp_modify_active_to_err()
118 cur_state == IB_QPS_RTS) { in usnic_ib_qp_grp_modify_active_to_err()
126 (cur_state), in usnic_ib_qp_grp_modify_active_to_err()
/drivers/infiniband/hw/mlx4/
Dqp.c2075 enum ib_qp_state cur_state, in __mlx4_ib_modify_qp() argument
2187 if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT) { in __mlx4_ib_modify_qp()
2205 if (cur_state == IB_QPS_SQD && new_state == IB_QPS_SQD && in __mlx4_ib_modify_qp()
2212 if (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { in __mlx4_ib_modify_qp()
2281 (cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR)) { in __mlx4_ib_modify_qp()
2401 cur_state == IB_QPS_RESET && in __mlx4_ib_modify_qp()
2405 if (cur_state == IB_QPS_INIT && in __mlx4_ib_modify_qp()
2461 if (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD && in __mlx4_ib_modify_qp()
2468 cur_state == IB_QPS_RESET && in __mlx4_ib_modify_qp()
2479 cur_state == IB_QPS_RESET && in __mlx4_ib_modify_qp()
[all …]
/drivers/platform/x86/
Dacerhdf.c513 int cur_temp, cur_state, err = 0; in acerhdf_set_cur_state() local
524 err = acerhdf_get_fanstate(&cur_state); in acerhdf_set_cur_state()
531 if (cur_state == ACERHDF_FAN_AUTO) in acerhdf_set_cur_state()
534 if (cur_state == ACERHDF_FAN_OFF) in acerhdf_set_cur_state()
/drivers/infiniband/hw/efa/
Defa_verbs.c839 static bool efa_modify_srd_qp_is_ok(enum ib_qp_state cur_state, in efa_modify_srd_qp_is_ok() argument
846 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS && in efa_modify_srd_qp_is_ok()
847 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE) in efa_modify_srd_qp_is_ok()
850 if (!srd_qp_state_table[cur_state][next_state].valid) in efa_modify_srd_qp_is_ok()
853 req_param = srd_qp_state_table[cur_state][next_state].req_param; in efa_modify_srd_qp_is_ok()
854 opt_param = srd_qp_state_table[cur_state][next_state].opt_param; in efa_modify_srd_qp_is_ok()
867 enum ib_qp_state cur_state, in efa_modify_qp_validate() argument
885 err = !efa_modify_srd_qp_is_ok(cur_state, new_state, in efa_modify_qp_validate()
888 err = !ib_modify_qp_is_ok(cur_state, new_state, IB_QPT_UD, in efa_modify_qp_validate()
915 enum ib_qp_state cur_state; in efa_modify_qp() local
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/drivers/hwmon/
Dmlxreg-fan.c323 unsigned long cur_state; in mlxreg_fan_set_cur_state() local
356 cur_state = MLXREG_FAN_PWM_DUTY2STATE(regval); in mlxreg_fan_set_cur_state()
357 if (state < cur_state) in mlxreg_fan_set_cur_state()
360 state = cur_state; in mlxreg_fan_set_cur_state()
/drivers/infiniband/hw/mthca/
Dmthca_qp.c558 enum ib_qp_state cur_state, in __mthca_modify_qp() argument
668 cur_state == IB_QPS_INIT && new_state == IB_QPS_RTR) { in __mthca_modify_qp()
788 if (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD && in __mthca_modify_qp()
793 err = mthca_MODIFY_QP(dev, cur_state, new_state, qp->qpn, 0, in __mthca_modify_qp()
797 cur_state, new_state, err); in __mthca_modify_qp()
819 if (cur_state != IB_QPS_RTR && in __mthca_modify_qp()
823 if (cur_state != IB_QPS_RESET && in __mthca_modify_qp()
824 cur_state != IB_QPS_ERR && in __mthca_modify_qp()
863 enum ib_qp_state cur_state, new_state; in mthca_modify_qp() local
871 cur_state = attr->cur_qp_state; in mthca_modify_qp()
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/drivers/pwm/
Dpwm-sifive.c151 struct pwm_state cur_state; in pwm_sifive_apply() local
167 cur_state = pwm->state; in pwm_sifive_apply()
168 enabled = cur_state.enabled; in pwm_sifive_apply()
/drivers/gpu/drm/amd/amdgpu/
Djpeg_v3_0.c168 if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && in jpeg_v3_0_hw_fini()
493 if(state == adev->jpeg.cur_state) in jpeg_v3_0_set_powergating_state()
502 adev->jpeg.cur_state = state; in jpeg_v3_0_set_powergating_state()
Damdgpu_jpeg.h48 enum amd_powergating_state cur_state; member

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