Searched refs:format_revision (Results 1 – 17 of 17) sorted by relevance
330 if (header->format_revision != 3) { in smu_v12_0_get_vbios_bootup_values()371 smu->smu_table.boot_values.format_revision = header->format_revision; in smu_v12_0_get_vbios_bootup_values()394 if ((smu->smu_table.boot_values.format_revision == 3) && in smu_v12_0_get_vbios_bootup_values()
280 uint8_t format_revision, content_revision; in pp_atomfwctrl_get_avfs_information() local293 format_revision = ((struct atom_common_table_header *)profile)->format_revision; in pp_atomfwctrl_get_avfs_information()296 if (format_revision == 4 && content_revision == 1) { in pp_atomfwctrl_get_avfs_information()375 } else if (format_revision == 4 && content_revision == 2) { in pp_atomfwctrl_get_avfs_information()604 if ((info->format_revision == 3) && (info->content_revision == 2)) { in pp_atomfwctrl_get_vbios_bootup_values()608 } else if ((info->format_revision == 3) && (info->content_revision == 1)) { in pp_atomfwctrl_get_vbios_bootup_values()
68 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()370 if (pp_table->sHeader.format_revision >=
76 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()1256 PP_ASSERT_WITH_CODE((pp_table->sHeader.format_revision >= in vega10_get_number_of_powerplay_table_entries()1310 if (pp_table->sHeader.format_revision >= in vega10_get_powerplay_table_entry()
642 PP_ASSERT_WITH_CODE((powerplay_table->sHeader.format_revision >= in check_powerplay_tables()
2836 gpu_metrics->common_header.format_revision = 1; in vega12_init_gpu_metrics_v1_0()
4305 gpu_metrics->common_header.format_revision = 1; in vega20_init_gpu_metrics_v1_0()
526 if (header->format_revision != 3) { in smu_v13_0_get_vbios_bootup_values()579 smu->smu_table.boot_values.format_revision = header->format_revision; in smu_v13_0_get_vbios_bootup_values()607 if ((smu->smu_table.boot_values.format_revision == 3) && in smu_v13_0_get_vbios_bootup_values()
407 smc_dpm_table->table_header.format_revision, in aldebaran_append_powerplay_table()410 if ((smc_dpm_table->table_header.format_revision == 4) && in aldebaran_append_powerplay_table()
562 if (header->format_revision != 3) { in smu_v11_0_get_vbios_bootup_values()603 smu->smu_table.boot_values.format_revision = header->format_revision; in smu_v11_0_get_vbios_bootup_values()631 if ((smu->smu_table.boot_values.format_revision == 3) && in smu_v11_0_get_vbios_bootup_values()
481 smc_dpm_table->table_header.format_revision, in arcturus_append_powerplay_table()484 if ((smc_dpm_table->table_header.format_revision == 4) && in arcturus_append_powerplay_table()
424 smc_dpm_table->table_header.format_revision, in navi10_append_powerplay_table()427 if (smc_dpm_table->table_header.format_revision != 4) { in navi10_append_powerplay_table()
404 uint8_t format_revision; member
234 …uint8_t format_revision; //mainly used for a hw function, when the parser is not backward compa… member
304 uint32_t format_revision; member
1023 header->format_revision = frev; in smu_cmn_init_soft_gpu_metrics()
150 (uint32_t) atom_data_tbl->format_revision & 0x3f; in get_atom_data_table_revision()1125 if (!((lvds->table_header.format_revision == 2) in get_embedded_panel_info_v2_1()