Searched refs:get_uclk_dpm_states (Results 1 – 8 of 8) sorted by relevance
/drivers/gpu/drm/amd/display/dc/ |
D | dm_pp_smu.h | 228 enum pp_smu_status (*get_uclk_dpm_states)(struct pp_smu *pp, member
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/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_pp_smu.c | 782 if (!pp_funcs || !pp_funcs->get_uclk_dpm_states) in pp_nv_get_uclk_dpm_states() 785 if (!pp_funcs->get_uclk_dpm_states(pp_handle, in pp_nv_get_uclk_dpm_states() 863 funcs->nv_funcs.get_uclk_dpm_states = pp_nv_get_uclk_dpm_states; in dm_pp_get_funcs()
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/drivers/gpu/drm/amd/include/ |
D | kgd_pp_interface.h | 394 int (*get_uclk_dpm_states)(void *handle, member
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/drivers/gpu/drm/amd/pm/inc/ |
D | amdgpu_smu.h | 754 int (*get_uclk_dpm_states)(struct smu_context *smu, uint32_t *clocks_in_khz, uint32_t *num_states); member
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/drivers/gpu/drm/amd/pm/swsmu/ |
D | amdgpu_smu.c | 2921 if (smu->ppt_funcs->get_uclk_dpm_states) in smu_get_uclk_dpm_states() 2922 ret = smu->ppt_funcs->get_uclk_dpm_states(smu, clock_values_in_khz, num_states); in smu_get_uclk_dpm_states() 3100 .get_uclk_dpm_states = smu_get_uclk_dpm_states,
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/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_resource.c | 3656 if (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) { in init_soc_bounding_box() 3657 status = (pool->base.pp_smu->nv_funcs.get_uclk_dpm_states) in init_soc_bounding_box()
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/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
D | navi10_ppt.c | 3261 .get_uclk_dpm_states = navi10_get_uclk_dpm_states,
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D | sienna_cichlid_ppt.c | 4005 .get_uclk_dpm_states = sienna_cichlid_get_uclk_dpm_states,
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