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Searched refs:get_wptr (Results 1 – 25 of 46) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ih.h76 u32 (*get_wptr)(struct amdgpu_device *adev, struct amdgpu_ih_ring *ih); member
82 #define amdgpu_ih_get_wptr(adev, ih) (adev)->irq.ih_funcs->get_wptr((adev), (ih))
Damdgpu_ring.h151 u64 (*get_wptr)(struct amdgpu_ring *ring); member
262 #define amdgpu_ring_get_wptr(r) (r)->funcs->get_wptr((r))
Djpeg_v2_5.c591 .get_wptr = jpeg_v2_5_dec_ring_get_wptr,
621 .get_wptr = jpeg_v2_5_dec_ring_get_wptr,
Dsi_ih.c296 .get_wptr = si_ih_get_wptr,
Dcik_ih.c435 .get_wptr = cik_ih_get_wptr,
Diceland_ih.c431 .get_wptr = iceland_ih_get_wptr,
Dcz_ih.c434 .get_wptr = cz_ih_get_wptr,
Dvce_v3_0.c925 .get_wptr = vce_v3_0_ring_get_wptr,
949 .get_wptr = vce_v3_0_ring_get_wptr,
Duvd_v6_0.c1559 .get_wptr = uvd_v6_0_ring_get_wptr,
1585 .get_wptr = uvd_v6_0_ring_get_wptr,
1614 .get_wptr = uvd_v6_0_enc_ring_get_wptr,
Dtonga_ih.c486 .get_wptr = tonga_ih_get_wptr,
Djpeg_v3_0.c559 .get_wptr = jpeg_v3_0_dec_ring_get_wptr,
Dvcn_v2_5.c1530 .get_wptr = vcn_v2_5_dec_ring_get_wptr,
1560 .get_wptr = vcn_v2_5_dec_ring_get_wptr,
1660 .get_wptr = vcn_v2_5_enc_ring_get_wptr,
1690 .get_wptr = vcn_v2_5_enc_ring_get_wptr,
Dvce_v2_0.c638 .get_wptr = vce_v2_0_ring_get_wptr,
Dsdma_v4_0.c2440 .get_wptr = sdma_v4_0_ring_get_wptr,
2476 .get_wptr = sdma_v4_0_ring_get_wptr,
2508 .get_wptr = sdma_v4_0_page_ring_get_wptr,
2540 .get_wptr = sdma_v4_0_page_ring_get_wptr,
Dvega10_ih.c645 .get_wptr = vega10_ih_get_wptr,
Duvd_v4_2.c774 .get_wptr = uvd_v4_2_ring_get_wptr,
Djpeg_v1_0.c554 .get_wptr = jpeg_v1_0_decode_ring_get_wptr,
Duvd_v3_1.c185 .get_wptr = uvd_v3_1_ring_get_wptr,
Dvega20_ih.c693 .get_wptr = vega20_ih_get_wptr,
Duvd_v5_0.c882 .get_wptr = uvd_v5_0_ring_get_wptr,
Djpeg_v2_0.c783 .get_wptr = jpeg_v2_0_dec_ring_get_wptr,
/drivers/gpu/drm/radeon/
Dradeon_asic.c194 .get_wptr = &r100_gfx_get_wptr,
344 .get_wptr = &r100_gfx_get_wptr,
358 .get_wptr = &r100_gfx_get_wptr,
915 .get_wptr = &r600_gfx_get_wptr,
928 .get_wptr = &r600_dma_get_wptr,
1013 .get_wptr = &uvd_v1_0_get_wptr,
1212 .get_wptr = &uvd_v1_0_get_wptr,
1319 .get_wptr = &r600_gfx_get_wptr,
1332 .get_wptr = &r600_dma_get_wptr,
1629 .get_wptr = &cayman_gfx_get_wptr,
[all …]
/drivers/gpu/drm/msm/adreno/
Da5xx_preempt.c49 wptr = get_wptr(ring); in update_wptr()
66 empty = (get_wptr(ring) == gpu->funcs->get_rptr(gpu, ring)); in get_next_ring()
135 a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring); in a5xx_preempt_trigger()
Dadreno_gpu.c478 wptr = get_wptr(ring); in adreno_flush()
489 uint32_t wptr = get_wptr(ring); in adreno_idle()
518 state->ring[i].wptr = get_wptr(gpu->rb[i]); in adreno_gpu_state_get()
769 printk("rb wptr: %d\n", get_wptr(ring)); in adreno_dump_info()
Dadreno_gpu.h384 static inline uint32_t get_wptr(struct msm_ringbuffer *ring) in get_wptr() function

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