| /drivers/gpu/drm/radeon/ |
| D | radeon_ib.c | 59 struct radeon_ib *ib, struct radeon_vm *vm, in radeon_ib_get() argument
64 r = radeon_sa_bo_new(rdev, &rdev->ring_tmp_bo, &ib->sa_bo, size, 256); in radeon_ib_get()
70 radeon_sync_create(&ib->sync); in radeon_ib_get()
72 ib->ring = ring; in radeon_ib_get()
73 ib->fence = NULL; in radeon_ib_get()
74 ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo); in radeon_ib_get()
75 ib->vm = vm; in radeon_ib_get()
80 ib->gpu_addr = ib->sa_bo->soffset + RADEON_VA_IB_OFFSET; in radeon_ib_get()
82 ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo); in radeon_ib_get()
84 ib->is_const_ib = false; in radeon_ib_get()
[all …]
|
| D | ni_dma.c | 122 struct radeon_ib *ib) in cayman_dma_ring_ib_execute() argument
124 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cayman_dma_ring_ib_execute()
125 unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0; in cayman_dma_ring_ib_execute()
144 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in cayman_dma_ring_ib_execute()
145 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
315 struct radeon_ib *ib, in cayman_dma_vm_copy_pages() argument
326 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in cayman_dma_vm_copy_pages()
328 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cayman_dma_vm_copy_pages()
329 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cayman_dma_vm_copy_pages()
330 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
[all …]
|
| D | si_dma.c | 69 struct radeon_ib *ib, in si_dma_vm_copy_pages() argument
78 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages()
80 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pages()
81 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pages()
82 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
83 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
105 struct radeon_ib *ib, in si_dma_vm_write_pages() argument
119 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages()
120 ib->ptr[ib->length_dw++] = pe; in si_dma_vm_write_pages()
121 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
[all …]
|
| D | radeon_vce.c | 349 struct radeon_ib ib; in radeon_vce_get_create_msg() local
353 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4); in radeon_vce_get_create_msg()
359 dummy = ib.gpu_addr + 1024; in radeon_vce_get_create_msg()
362 ib.length_dw = 0; in radeon_vce_get_create_msg()
363 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */ in radeon_vce_get_create_msg()
364 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */ in radeon_vce_get_create_msg()
365 ib.ptr[ib.length_dw++] = cpu_to_le32(handle); in radeon_vce_get_create_msg()
367 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */ in radeon_vce_get_create_msg()
368 ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */ in radeon_vce_get_create_msg()
369 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000); in radeon_vce_get_create_msg()
[all …]
|
| D | cik_sdma.c | 133 struct radeon_ib *ib) in cik_sdma_ring_ib_execute() argument
135 struct radeon_ring *ring = &rdev->ring[ib->ring]; in cik_sdma_ring_ib_execute()
136 u32 extra_bits = (ib->vm ? ib->vm->ids[ib->ring].id : 0) & 0xf; in cik_sdma_ring_ib_execute()
154 radeon_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_ib_execute()
155 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); in cik_sdma_ring_ib_execute()
156 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute()
703 struct radeon_ib ib; in cik_sdma_ib_test() local
720 r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); in cik_sdma_ib_test()
726 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); in cik_sdma_ib_test()
727 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ib_test()
[all …]
|
| D | evergreen_cs.c | 450 uint32_t *ib = p->ib.ptr; in evergreen_cs_track_validate_cb() local
472 ib[track->cb_color_slice_idx[id]] = slice; in evergreen_cs_track_validate_cb()
1097 u32 tmp, *ib; in evergreen_cs_handle_reg() local
1100 ib = p->ib.ptr; in evergreen_cs_handle_reg()
1148 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg()
1177 ib[idx] &= ~Z_ARRAY_MODE(0xf); in evergreen_cs_handle_reg()
1179 ib[idx] |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); in evergreen_cs_handle_reg()
1187 ib[idx] |= DB_NUM_BANKS(evergreen_cs_get_num_banks(track->nbanks)); in evergreen_cs_handle_reg()
1188 ib[idx] |= DB_TILE_SPLIT(tile_split) | in evergreen_cs_handle_reg()
1220 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); in evergreen_cs_handle_reg()
[all …]
|
| D | r600_cs.c | 358 volatile u32 *ib = p->ib.ptr; in r600_cs_track_validate_cb() local
468 ib[track->cb_color_size_idx[i]] = tmp; in r600_cs_track_validate_cb()
527 volatile u32 *ib = p->ib.ptr; in r600_cs_track_validate_db() local
565 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF); in r600_cs_track_validate_db()
834 volatile uint32_t *ib; in r600_cs_common_vline_parse() local
836 ib = p->ib.ptr; in r600_cs_common_vline_parse()
899 ib[h_idx + 2] = PACKET2(0); in r600_cs_common_vline_parse()
900 ib[h_idx + 3] = PACKET2(0); in r600_cs_common_vline_parse()
901 ib[h_idx + 4] = PACKET2(0); in r600_cs_common_vline_parse()
902 ib[h_idx + 5] = PACKET2(0); in r600_cs_common_vline_parse()
[all …]
|
| D | radeon_vm.c | 361 struct radeon_ib *ib, in radeon_vm_set_pages() argument
370 radeon_asic_vm_copy_pages(rdev, ib, pe, src, count); in radeon_vm_set_pages()
373 radeon_asic_vm_write_pages(rdev, ib, pe, addr, in radeon_vm_set_pages()
377 radeon_asic_vm_set_pages(rdev, ib, pe, addr, in radeon_vm_set_pages()
392 struct radeon_ib ib; in radeon_vm_clear_bo() local
408 r = radeon_ib_get(rdev, R600_RING_TYPE_DMA_INDEX, &ib, NULL, 256); in radeon_vm_clear_bo()
412 ib.length_dw = 0; in radeon_vm_clear_bo()
414 radeon_vm_set_pages(rdev, &ib, addr, 0, entries, 0, 0); in radeon_vm_clear_bo()
415 radeon_asic_vm_pad_ib(rdev, &ib); in radeon_vm_clear_bo()
416 WARN_ON(ib.length_dw > 64); in radeon_vm_clear_bo()
[all …]
|
| /drivers/gpu/drm/amd/amdgpu/ |
| D | si_dma.c | 65 struct amdgpu_ib *ib, in si_dma_ring_emit_ib() argument
75 amdgpu_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); in si_dma_ring_emit_ib()
76 amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in si_dma_ring_emit_ib()
257 struct amdgpu_ib ib; in si_dma_ring_test_ib() local
271 memset(&ib, 0, sizeof(ib)); in si_dma_ring_test_ib()
273 AMDGPU_IB_POOL_DIRECT, &ib); in si_dma_ring_test_ib()
277 ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, 1); in si_dma_ring_test_ib()
278 ib.ptr[1] = lower_32_bits(gpu_addr); in si_dma_ring_test_ib()
279 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; in si_dma_ring_test_ib()
280 ib.ptr[3] = 0xDEADBEEF; in si_dma_ring_test_ib()
[all …]
|
| D | amdgpu_vce.c | 449 struct amdgpu_ib *ib; in amdgpu_vce_get_create_msg() local
459 ib = &job->ibs[0]; in amdgpu_vce_get_create_msg()
464 ib->length_dw = 0; in amdgpu_vce_get_create_msg()
465 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */ in amdgpu_vce_get_create_msg()
466 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ in amdgpu_vce_get_create_msg()
467 ib->ptr[ib->length_dw++] = handle; in amdgpu_vce_get_create_msg()
470 ib->ptr[ib->length_dw++] = 0x00000040; /* len */ in amdgpu_vce_get_create_msg()
472 ib->ptr[ib->length_dw++] = 0x00000030; /* len */ in amdgpu_vce_get_create_msg()
473 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */ in amdgpu_vce_get_create_msg()
474 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
[all …]
|
| D | sdma_v2_4.c | 254 struct amdgpu_ib *ib, in sdma_v2_4_ring_emit_ib() argument
265 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v2_4_ring_emit_ib()
266 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v2_4_ring_emit_ib()
267 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib()
605 struct amdgpu_ib ib; in sdma_v2_4_ring_test_ib() local
619 memset(&ib, 0, sizeof(ib)); in sdma_v2_4_ring_test_ib()
621 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v2_4_ring_test_ib()
625 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v2_4_ring_test_ib()
627 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
628 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v2_4_ring_test_ib()
[all …]
|
| D | cik_sdma.c | 226 struct amdgpu_ib *ib, in cik_sdma_ring_emit_ib() argument
236 amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_emit_ib()
237 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); in cik_sdma_ring_emit_ib()
238 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
670 struct amdgpu_ib ib; in cik_sdma_ring_test_ib() local
684 memset(&ib, 0, sizeof(ib)); in cik_sdma_ring_test_ib()
686 AMDGPU_IB_POOL_DIRECT, &ib); in cik_sdma_ring_test_ib()
690 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_ring_test_ib()
692 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
693 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
[all …]
|
| D | amdgpu_vcn.c | 553 struct amdgpu_ib *ib; in amdgpu_vcn_dec_send_msg() local
563 ib = &job->ibs[0]; in amdgpu_vcn_dec_send_msg()
566 ib->ptr[0] = PACKET0(adev->vcn.internal.data0, 0); in amdgpu_vcn_dec_send_msg()
567 ib->ptr[1] = addr; in amdgpu_vcn_dec_send_msg()
568 ib->ptr[2] = PACKET0(adev->vcn.internal.data1, 0); in amdgpu_vcn_dec_send_msg()
569 ib->ptr[3] = addr >> 32; in amdgpu_vcn_dec_send_msg()
570 ib->ptr[4] = PACKET0(adev->vcn.internal.cmd, 0); in amdgpu_vcn_dec_send_msg()
571 ib->ptr[5] = 0; in amdgpu_vcn_dec_send_msg()
573 ib->ptr[i] = PACKET0(adev->vcn.internal.nop, 0); in amdgpu_vcn_dec_send_msg()
574 ib->ptr[i+1] = 0; in amdgpu_vcn_dec_send_msg()
[all …]
|
| D | sdma_v3_0.c | 428 struct amdgpu_ib *ib, in sdma_v3_0_ring_emit_ib() argument
439 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v3_0_ring_emit_ib()
440 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v3_0_ring_emit_ib()
441 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
877 struct amdgpu_ib ib; in sdma_v3_0_ring_test_ib() local
891 memset(&ib, 0, sizeof(ib)); in sdma_v3_0_ring_test_ib()
893 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v3_0_ring_test_ib()
897 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_ring_test_ib()
899 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
900 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
[all …]
|
| D | sdma_v5_2.c | 341 struct amdgpu_ib *ib, in sdma_v5_2_ring_emit_ib() argument
360 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v5_2_ring_emit_ib()
361 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_2_ring_emit_ib()
362 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_2_ring_emit_ib()
967 struct amdgpu_ib ib; in sdma_v5_2_ring_test_ib() local
983 memset(&ib, 0, sizeof(ib)); in sdma_v5_2_ring_test_ib()
984 r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v5_2_ring_test_ib()
990 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_2_ring_test_ib()
992 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
993 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_2_ring_test_ib()
[all …]
|
| D | sdma_v5_0.c | 454 struct amdgpu_ib *ib, in sdma_v5_0_ring_emit_ib() argument
473 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v5_0_ring_emit_ib()
474 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v5_0_ring_emit_ib()
475 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
1045 struct amdgpu_ib ib; in sdma_v5_0_ring_test_ib() local
1061 memset(&ib, 0, sizeof(ib)); in sdma_v5_0_ring_test_ib()
1063 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v5_0_ring_test_ib()
1069 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_ring_test_ib()
1071 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
1072 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v5_0_ring_test_ib()
[all …]
|
| D | uvd_v6_0.c | 214 struct amdgpu_ib *ib; in uvd_v6_0_enc_get_create_msg() local
224 ib = &job->ibs[0]; in uvd_v6_0_enc_get_create_msg()
227 ib->length_dw = 0; in uvd_v6_0_enc_get_create_msg()
228 ib->ptr[ib->length_dw++] = 0x00000018; in uvd_v6_0_enc_get_create_msg()
229 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in uvd_v6_0_enc_get_create_msg()
230 ib->ptr[ib->length_dw++] = handle; in uvd_v6_0_enc_get_create_msg()
231 ib->ptr[ib->length_dw++] = 0x00010000; in uvd_v6_0_enc_get_create_msg()
232 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in uvd_v6_0_enc_get_create_msg()
233 ib->ptr[ib->length_dw++] = addr; in uvd_v6_0_enc_get_create_msg()
235 ib->ptr[ib->length_dw++] = 0x00000014; in uvd_v6_0_enc_get_create_msg()
[all …]
|
| D | sdma_v4_0.c | 874 struct amdgpu_ib *ib, in sdma_v4_0_ring_emit_ib() argument
885 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v4_0_ring_emit_ib()
886 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v4_0_ring_emit_ib()
887 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib()
1616 struct amdgpu_ib ib; in sdma_v4_0_ring_test_ib() local
1630 memset(&ib, 0, sizeof(ib)); in sdma_v4_0_ring_test_ib()
1632 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v4_0_ring_test_ib()
1636 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_ring_test_ib()
1638 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
1639 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v4_0_ring_test_ib()
[all …]
|
| D | amdgpu_ib.c | 66 struct amdgpu_ib *ib) in amdgpu_ib_get() argument
72 &ib->sa_bo, size, 256); in amdgpu_ib_get()
78 ib->ptr = amdgpu_sa_bo_cpu_addr(ib->sa_bo); in amdgpu_ib_get()
80 ib->flags = AMDGPU_IB_FLAG_EMIT_MEM_SYNC; in amdgpu_ib_get()
83 ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo); in amdgpu_ib_get()
98 void amdgpu_ib_free(struct amdgpu_device *adev, struct amdgpu_ib *ib, in amdgpu_ib_free() argument
101 amdgpu_sa_bo_free(adev, &ib->sa_bo, f); in amdgpu_ib_free()
131 struct amdgpu_ib *ib = &ibs[0]; in amdgpu_ib_schedule() local
168 if ((ib->flags & AMDGPU_IB_FLAGS_SECURE) && in amdgpu_ib_schedule()
196 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule()
[all …]
|
| D | uvd_v7_0.c | 221 struct amdgpu_ib *ib; in uvd_v7_0_enc_get_create_msg() local
231 ib = &job->ibs[0]; in uvd_v7_0_enc_get_create_msg()
234 ib->length_dw = 0; in uvd_v7_0_enc_get_create_msg()
235 ib->ptr[ib->length_dw++] = 0x00000018; in uvd_v7_0_enc_get_create_msg()
236 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in uvd_v7_0_enc_get_create_msg()
237 ib->ptr[ib->length_dw++] = handle; in uvd_v7_0_enc_get_create_msg()
238 ib->ptr[ib->length_dw++] = 0x00000000; in uvd_v7_0_enc_get_create_msg()
239 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in uvd_v7_0_enc_get_create_msg()
240 ib->ptr[ib->length_dw++] = addr; in uvd_v7_0_enc_get_create_msg()
242 ib->ptr[ib->length_dw++] = 0x00000014; in uvd_v7_0_enc_get_create_msg()
[all …]
|
| /drivers/net/ethernet/amd/ |
| D | 7990.c | 100 t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0, \
101 ib->brx_ring[t].length, \
102 ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits); \
106 t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0, \
107 ib->btx_ring[t].length, \
108 ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits); \
140 volatile struct lance_init_block *ib = lp->init_block; in lance_init_ring() local
150 ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */ in lance_init_ring()
163 ib->phys_addr[0] = dev->dev_addr[1]; in lance_init_ring()
164 ib->phys_addr[1] = dev->dev_addr[0]; in lance_init_ring()
[all …]
|
| D | sunlance.c | 319 struct lance_init_block *ib = lp->init_block_mem; in lance_init_ring_dvma() local
332 ib->phys_addr [0] = dev->dev_addr [1]; in lance_init_ring_dvma()
333 ib->phys_addr [1] = dev->dev_addr [0]; in lance_init_ring_dvma()
334 ib->phys_addr [2] = dev->dev_addr [3]; in lance_init_ring_dvma()
335 ib->phys_addr [3] = dev->dev_addr [2]; in lance_init_ring_dvma()
336 ib->phys_addr [4] = dev->dev_addr [5]; in lance_init_ring_dvma()
337 ib->phys_addr [5] = dev->dev_addr [4]; in lance_init_ring_dvma()
342 ib->btx_ring [i].tmd0 = leptr; in lance_init_ring_dvma()
343 ib->btx_ring [i].tmd1_hadr = leptr >> 16; in lance_init_ring_dvma()
344 ib->btx_ring [i].tmd1_bits = 0; in lance_init_ring_dvma()
[all …]
|
| D | a2065.c | 149 volatile struct lance_init_block *ib = lp->init_block; in lance_init_ring() local
160 ib->mode = 0; in lance_init_ring()
165 ib->phys_addr[0] = dev->dev_addr[1]; in lance_init_ring()
166 ib->phys_addr[1] = dev->dev_addr[0]; in lance_init_ring()
167 ib->phys_addr[2] = dev->dev_addr[3]; in lance_init_ring()
168 ib->phys_addr[3] = dev->dev_addr[2]; in lance_init_ring()
169 ib->phys_addr[4] = dev->dev_addr[5]; in lance_init_ring()
170 ib->phys_addr[5] = dev->dev_addr[4]; in lance_init_ring()
176 ib->btx_ring[i].tmd0 = leptr; in lance_init_ring()
177 ib->btx_ring[i].tmd1_hadr = leptr >> 16; in lance_init_ring()
[all …]
|
| D | declance.c | 235 #define lib_ptr(ib, rt, type) \ argument
236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type)))
453 volatile u16 *ib = (volatile u16 *)dev->mem_start; in lance_init_ring() local
465 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | in lance_init_ring()
467 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | in lance_init_ring()
469 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | in lance_init_ring()
475 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | in lance_init_ring()
477 *lib_ptr(ib, rx_ptr, lp->type) = leptr; in lance_init_ring()
484 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | in lance_init_ring()
486 *lib_ptr(ib, tx_ptr, lp->type) = leptr; in lance_init_ring()
[all …]
|
| /drivers/infiniband/hw/mlx4/ |
| D | ah.c | 48 ah->av.ib.port_pd = cpu_to_be32(to_mpd(ib_ah->pd)->pdn | in create_ib_ah()
50 ah->av.ib.g_slid = rdma_ah_get_path_bits(ah_attr); in create_ib_ah()
51 ah->av.ib.sl_tclass_flowlabel = in create_ib_ah()
56 ah->av.ib.g_slid |= 0x80; in create_ib_ah()
57 ah->av.ib.gid_index = grh->sgid_index; in create_ib_ah()
58 ah->av.ib.hop_limit = grh->hop_limit; in create_ib_ah()
59 ah->av.ib.sl_tclass_flowlabel |= in create_ib_ah()
62 memcpy(ah->av.ib.dgid, grh->dgid.raw, 16); in create_ib_ah()
65 ah->av.ib.dlid = cpu_to_be16(rdma_ah_get_dlid(ah_attr)); in create_ib_ah()
73 ah->av.ib.stat_rate = static_rate; in create_ib_ah()
[all …]
|