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Searched refs:int_type (Results 1 – 25 of 27) sorted by relevance

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/drivers/media/platform/s5p-mfc/
Ds5p_mfc_intr.c26 (dev->int_cond && (dev->int_type == command in s5p_mfc_wait_for_done_dev()
27 || dev->int_type == S5P_MFC_R2H_CMD_ERR_RET)), in s5p_mfc_wait_for_done_dev()
31 dev->int_type, command); in s5p_mfc_wait_for_done_dev()
38 dev->int_type, command); in s5p_mfc_wait_for_done_dev()
39 if (dev->int_type == S5P_MFC_R2H_CMD_ERR_RET) in s5p_mfc_wait_for_done_dev()
47 dev->int_type = 0; in s5p_mfc_clean_dev_int_flags()
58 (ctx->int_cond && (ctx->int_type == command in s5p_mfc_wait_for_done_ctx()
59 || ctx->int_type == S5P_MFC_R2H_CMD_ERR_RET)), in s5p_mfc_wait_for_done_ctx()
63 (ctx->int_cond && (ctx->int_type == command in s5p_mfc_wait_for_done_ctx()
64 || ctx->int_type == S5P_MFC_R2H_CMD_ERR_RET)), in s5p_mfc_wait_for_done_ctx()
[all …]
Ds5p_mfc_ctrl.c266 if (dev->int_err != 0 || dev->int_type != in s5p_mfc_init_hw()
270 dev->int_err, dev->int_type); in s5p_mfc_init_hw()
317 if (dev->int_err != 0 || dev->int_type != in s5p_mfc_sleep()
321 dev->int_type); in s5p_mfc_sleep()
412 if (dev->int_err != 0 || dev->int_type != in s5p_mfc_wakeup()
416 dev->int_type); in s5p_mfc_wakeup()
Ds5p_mfc_common.h320 int int_type; member
632 int int_type; member
Ds5p_mfc.c115 ctx->int_type = reason; in wake_up_ctx()
125 dev->int_type = reason; in wake_up_dev()
569 ctx->int_type = reason; in s5p_mfc_handle_init_buffers()
716 ctx->int_type = reason; in s5p_mfc_irq()
734 ctx->int_type = reason; in s5p_mfc_irq()
/drivers/scsi/
Dqlogicfas408.h83 int int_type; /* type of irq, 2 for ISA board, 0 for PCMCIA */ member
92 #define REG1 ( outb( inb( qbase + 0xd ) | 0x80 , qbase + 0xd ), outb( 0xb4 | int_type, qbase + 0xd …
114 int qlogicfas408_get_chip_type(int qbase, int int_type);
115 void qlogicfas408_setup(int qbase, int id, int int_type);
116 int qlogicfas408_detect(int qbase, int int_type);
Dqlogicfas408.c82 int int_type = priv->int_type; in ql_zap() local
217 int int_type = priv->int_type; in ql_icmd() local
271 int int_type = priv->int_type; in ql_pcmd() local
557 int qlogicfas408_get_chip_type(int qbase, int int_type) in qlogicfas408_get_chip_type() argument
567 void qlogicfas408_setup(int qbase, int id, int int_type) in qlogicfas408_setup() argument
591 int qlogicfas408_detect(int qbase, int int_type) in qlogicfas408_detect() argument
605 int int_type = priv->int_type; in qlogicfas408_disable_ints() local
Dqlogicfas.c107 priv->int_type = INT_TYPE; in __qlogicfas_detect()
/drivers/xen/xen-pciback/
Dconf_space_capability.c195 unsigned int int_type; /* interrupt type for exclusiveness check */ member
199 .int_type = INTERRUPT_TYPE_MSI,
203 .int_type = INTERRUPT_TYPE_MSIX,
245 int int_type = xen_pcibk_get_interrupt_type(dev); in msi_msix_flags_write() local
247 if (int_type == INTERRUPT_TYPE_NONE || in msi_msix_flags_write()
248 int_type == INTERRUPT_TYPE_INTX || in msi_msix_flags_write()
249 int_type == field_config->int_type) in msi_msix_flags_write()
/drivers/media/platform/mtk-vcodec/
Dmtk_vcodec_intr.c32 ctx->int_cond, ctx->int_type); in mtk_vcodec_wait_for_done_ctx()
36 ctx->int_type); in mtk_vcodec_wait_for_done_ctx()
41 ctx->int_type = 0; in mtk_vcodec_wait_for_done_ctx()
Dmtk_vcodec_drv.h283 int int_type; member
396 int int_type; member
Dmtk_vcodec_enc_drv.c80 ctx->int_type = reason; in wake_up_ctx()
/drivers/bus/
Domap_l3_smx.c165 int int_type; in omap3_l3_app_irq() local
168 int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR; in omap3_l3_app_irq()
169 if (!int_type) { in omap3_l3_app_irq()
186 base = l3->rt + omap3_l3_bases[int_type][err_source]; in omap3_l3_app_irq()
194 clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) | in omap3_l3_app_irq()
/drivers/gpio/
Dgpio-cadence.c89 u32 int_type; in cdns_gpio_irq_set_type() local
96 int_type = ioread32(cgpio->regs + CDNS_GPIO_IRQ_TYPE) & ~mask; in cdns_gpio_irq_set_type()
105 int_type |= mask; in cdns_gpio_irq_set_type()
108 int_type |= mask; in cdns_gpio_irq_set_type()
115 iowrite32(int_type, cgpio->regs + CDNS_GPIO_IRQ_TYPE); in cdns_gpio_irq_set_type()
Dgpio-zynq.c111 u32 int_type[ZYNQMP_GPIO_MAX_BANK]; member
497 u32 int_type, int_pol, int_any; in zynq_gpio_set_irq_type() local
505 int_type = readl_relaxed(gpio->base_addr + in zynq_gpio_set_irq_type()
518 int_type |= BIT(bank_pin_num); in zynq_gpio_set_irq_type()
523 int_type |= BIT(bank_pin_num); in zynq_gpio_set_irq_type()
528 int_type |= BIT(bank_pin_num); in zynq_gpio_set_irq_type()
532 int_type &= ~BIT(bank_pin_num); in zynq_gpio_set_irq_type()
536 int_type &= ~BIT(bank_pin_num); in zynq_gpio_set_irq_type()
543 writel_relaxed(int_type, in zynq_gpio_set_irq_type()
683 gpio->context.int_type[bank_num] = in zynq_gpio_save_context()
[all …]
Dgpio-rockchip.c37 .int_type = 0x38,
51 .int_type = 0x20,
418 level = rockchip_gpio_readl(bank, bank->gpio_regs->int_type); in rockchip_irq_set_type()
470 rockchip_gpio_writel(bank, level, bank->gpio_regs->int_type); in rockchip_irq_set_type()
Dgpio-dwapb.c89 u32 int_type; member
765 ctx->int_type = dwapb_read(gpio, GPIO_INTTYPE_LEVEL); in dwapb_gpio_suspend()
809 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type); in dwapb_gpio_resume()
/drivers/dma/
Dsprd-dma.c203 enum sprd_dma_int_type int_type; member
444 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config()
454 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config()
464 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config()
474 if (schan->int_type != SPRD_DMA_NO_INT) in sprd_dma_set_2stage_config()
576 enum sprd_dma_int_type int_type, in sprd_dma_check_trans_done() argument
579 if (int_type == SPRD_DMA_NO_INT) in sprd_dma_check_trans_done()
582 if (int_type >= req_mode + 1) in sprd_dma_check_trans_done()
595 enum sprd_dma_int_type int_type; in dma_irq_handle() local
612 int_type = sprd_dma_get_int_type(schan); in dma_irq_handle()
[all …]
/drivers/net/ethernet/cavium/thunder/
Dnicvf_queues.h354 void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx);
355 void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx);
356 void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx);
357 int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx);
Dnicvf_queues.c1722 static u64 nicvf_int_type_to_mask(int int_type, int q_idx) in nicvf_int_type_to_mask() argument
1726 switch (int_type) { in nicvf_int_type_to_mask()
1756 void nicvf_enable_intr(struct nicvf *nic, int int_type, int q_idx) in nicvf_enable_intr() argument
1758 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_enable_intr()
1770 void nicvf_disable_intr(struct nicvf *nic, int int_type, int q_idx) in nicvf_disable_intr() argument
1772 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_disable_intr()
1784 void nicvf_clear_intr(struct nicvf *nic, int int_type, int q_idx) in nicvf_clear_intr() argument
1786 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_clear_intr()
1798 int nicvf_is_intr_enabled(struct nicvf *nic, int int_type, int q_idx) in nicvf_is_intr_enabled() argument
1800 u64 mask = nicvf_int_type_to_mask(int_type, q_idx); in nicvf_is_intr_enabled()
/drivers/mfd/
Drc5t583-irq.c16 enum int_type { enum
77 u8 int_type; member
87 .int_type = _int_type, \
180 if ((data->int_type & GPIO_INT) && (type & IRQ_TYPE_EDGE_BOTH)) { in rc5t583_irq_set_type()
/drivers/clocksource/
Dexynos_mct.c529 unsigned int int_type) in exynos4_timer_interrupts() argument
533 mct_int_type = int_type; in exynos4_timer_interrupts()
611 static int __init mct_init_dt(struct device_node *np, unsigned int int_type) in mct_init_dt() argument
619 ret = exynos4_timer_interrupts(np, int_type); in mct_init_dt()
/drivers/pinctrl/
Dpinctrl-rockchip.h58 u32 int_type; member
/drivers/iommu/amd/
Damd_iommu_types.h842 int_type : 3, member
863 int_type : 3, member
Diommu.c2908 irte->fields.int_type = delivery_mode; in irte_prepare()
2922 irte->lo.fields_remap.int_type = delivery_mode; in irte_ga_prepare()
3357 entry->lo.fields_remap.int_type = apic->delivery_mode; in amd_iommu_deactivate_guest_mode()
/drivers/scsi/pcmcia/
Dqlogic_stub.c120 priv->int_type = INT_TYPE; in qlogic_detect()

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