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Searched refs:lt (Results 1 – 23 of 23) sorted by relevance

/drivers/gpu/drm/bridge/
Dlontium-lt8912b.c48 static int lt8912_write_init_config(struct lt8912 *lt) in lt8912_write_init_config() argument
85 return regmap_multi_reg_write(lt->regmap[I2C_MAIN], seq, ARRAY_SIZE(seq)); in lt8912_write_init_config()
88 static int lt8912_write_mipi_basic_config(struct lt8912 *lt) in lt8912_write_mipi_basic_config() argument
98 return regmap_multi_reg_write(lt->regmap[I2C_CEC_DSI], seq, ARRAY_SIZE(seq)); in lt8912_write_mipi_basic_config()
101 static int lt8912_write_dds_config(struct lt8912 *lt) in lt8912_write_dds_config() argument
151 return regmap_multi_reg_write(lt->regmap[I2C_CEC_DSI], seq, ARRAY_SIZE(seq)); in lt8912_write_dds_config()
154 static int lt8912_write_rxlogicres_config(struct lt8912 *lt) in lt8912_write_rxlogicres_config() argument
158 ret = regmap_write(lt->regmap[I2C_MAIN], 0x03, 0x7f); in lt8912_write_rxlogicres_config()
160 ret |= regmap_write(lt->regmap[I2C_MAIN], 0x03, 0xff); in lt8912_write_rxlogicres_config()
165 static int lt8912_write_lvds_config(struct lt8912 *lt) in lt8912_write_lvds_config() argument
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/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Ddp.c52 nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay) in nvkm_dp_train_sense() argument
54 struct nvkm_dp *dp = lt->dp; in nvkm_dp_train_sense()
62 ret = nvkm_rdaux(dp->aux, DPCD_LS02, lt->stat, 6); in nvkm_dp_train_sense()
67 ret = nvkm_rdaux(dp->aux, DPCD_LS0C, &lt->pc2stat, 1); in nvkm_dp_train_sense()
69 lt->pc2stat = 0x00; in nvkm_dp_train_sense()
71 lt->stat, lt->pc2stat); in nvkm_dp_train_sense()
73 OUTP_TRACE(&dp->outp, "status %6ph", lt->stat); in nvkm_dp_train_sense()
80 nvkm_dp_train_drive(struct lt_state *lt, bool pc) in nvkm_dp_train_drive() argument
82 struct nvkm_dp *dp = lt->dp; in nvkm_dp_train_drive()
92 u8 lane = (lt->stat[4 + (i >> 1)] >> ((i & 1) * 4)) & 0xf; in nvkm_dp_train_drive()
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Ddp.h30 } lt; member
Drootnv50.c239 dp->lt.mst = !!args->v0.state; in nv50_disp_root_mthd_()
/drivers/mtd/nand/raw/
Dmarvell_nand.c1026 const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout; in marvell_nfc_hw_ecc_hmg_do_read_page() local
1036 unsigned int oob_bytes = lt->spare_bytes + (raw ? lt->ecc_bytes : 0); in marvell_nfc_hw_ecc_hmg_do_read_page()
1061 lt->data_bytes + oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1062 memcpy(data_buf, nfc->dma_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1063 memcpy(oob_buf, nfc->dma_buf + lt->data_bytes, oob_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1065 marvell_nfc_xfer_data_in_pio(nfc, data_buf, lt->data_bytes); in marvell_nfc_hw_ecc_hmg_do_read_page()
1084 const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout; in marvell_nfc_hw_ecc_hmg_read_page() local
1085 unsigned int full_sz = lt->data_bytes + lt->spare_bytes + lt->ecc_bytes; in marvell_nfc_hw_ecc_hmg_read_page()
1108 lt->data_bytes, true, page); in marvell_nfc_hw_ecc_hmg_read_page()
1140 const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout; in marvell_nfc_hw_ecc_hmg_do_write_page() local
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/drivers/media/platform/rockchip/rga/
Drga-hw.c50 struct rga_addr_offset *lt, *lb, *rt, *rb; in rga_get_addr_offset() local
54 lt = &offsets.left_top; in rga_get_addr_offset()
65 lt->y_off = y * frm->stride + x * pixel_width; in rga_get_addr_offset()
66 lt->u_off = in rga_get_addr_offset()
68 lt->v_off = lt->u_off + frm->width * frm->height / uv_factor; in rga_get_addr_offset()
70 lb->y_off = lt->y_off + (h - 1) * frm->stride; in rga_get_addr_offset()
71 lb->u_off = lt->u_off + (h / y_div - 1) * uv_stride; in rga_get_addr_offset()
72 lb->v_off = lt->v_off + (h / y_div - 1) * uv_stride; in rga_get_addr_offset()
74 rt->y_off = lt->y_off + (w - 1) * pixel_width; in rga_get_addr_offset()
75 rt->u_off = lt->u_off + w / x_div - 1; in rga_get_addr_offset()
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/drivers/net/ethernet/marvell/octeontx2/af/
Drvu_npc_fs.c133 u64 cfg, u8 lid, u8 lt, u8 intf) in npc_set_layer_mdata() argument
143 input->layer_mdata.ltype = lt; in npc_set_layer_mdata()
178 u8 nr_bits, lid, lt, ld; in npc_check_overlap() local
190 for (lt = 0; lt < NPC_MAX_LT; lt++) { in npc_check_overlap()
194 (intf, lid, lt, ld)); in npc_check_overlap()
199 lid, lt, intf); in npc_check_overlap()
389 u8 lt, u64 cfg, u8 intf) in npc_scan_ldata() argument
416 if (lid == (hlid) && lt == (hlt)) { \ in npc_scan_ldata()
420 npc_set_layer_mdata(mcam, (name), cfg, lid, lt, intf); \ in npc_scan_ldata()
512 u8 lid, lt, ld, bitnr; in npc_scan_kex() local
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Drvu_npc.c1244 int lid, lt, ld, fl; in npc_program_mkex_rx() local
1254 for (lt = 0; lt < NPC_MAX_LT; lt++) { in npc_program_mkex_rx()
1256 SET_KEX_LD(intf, lid, lt, ld, in npc_program_mkex_rx()
1258 [lid][lt][ld]); in npc_program_mkex_rx()
1273 int lid, lt, ld, fl; in npc_program_mkex_tx() local
1283 for (lt = 0; lt < NPC_MAX_LT; lt++) { in npc_program_mkex_tx()
1285 SET_KEX_LD(intf, lid, lt, ld, in npc_program_mkex_tx()
1287 [lid][lt][ld]); in npc_program_mkex_tx()
3194 #define GET_KEX_LD(intf, lid, lt, ld) \ argument
3196 NPC_AF_INTFX_LIDX_LTX_LDX_CFG(intf, lid, lt, ld))
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/drivers/power/supply/
Dbq25890_charger.c296 struct bq25890_lookup lt; member
310 [TBL_TREG] = { .lt = {bq25890_treg_tbl, BQ25890_TREG_TBL_SIZE} },
311 [TBL_BOOSTI] = { .lt = {bq25890_boosti_tbl, BQ25890_BOOSTI_TBL_SIZE} }
338 const u32 *tbl = bq25890_tables[id].lt.tbl; in bq25890_find_idx()
339 u32 tbl_size = bq25890_tables[id].lt.size; in bq25890_find_idx()
364 return bq25890_tables[id].lt.tbl[idx]; in bq25890_find_val()
/drivers/gpu/drm/amd/display/dc/dcn303/
DMakefile20 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/dcn302/
DMakefile24 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/dcn21/
DMakefile17 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/dcn301/
DMakefile25 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/dcn31/
DMakefile25 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/dcn20/
DMakefile21 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/calcs/
DMakefile37 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/gpu/drm/amd/display/dc/dcn30/
DMakefile45 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/scsi/be2iscsi/
Dbe_main.h711 u8 lt; /* DWORD 0 */ member
779 u8 lt; /* DWORD 11 */ member
867 u8 lt; /* DWORD 0 */ member
/drivers/gpu/drm/amd/display/dc/dml/
DMakefile37 ifeq ($(call cc-ifversion, -lt, 0701, y), y)
/drivers/hid/
Dhid-wiimote-modules.c1046 __s8 rx, ry, lx, ly, lt, rt; in wiimod_classic_in_ext() local
1121 lt = (ext[2] >> 2) & 0x18; in wiimod_classic_in_ext()
1122 lt |= (ext[3] >> 5) & 0x07; in wiimod_classic_in_ext()
1127 lt <<= 1; in wiimod_classic_in_ext()
1134 input_report_abs(wdata->extension.input, ABS_HAT3Y, lt); in wiimod_classic_in_ext()
/drivers/net/ethernet/cavium/liquidio/
Dlio_main.c624 struct lio_time *lt; in lio_sync_octeon_time() local
634 lt = (struct lio_time *)sc->virtdptr; in lio_sync_octeon_time()
638 lt->sec = ts.tv_sec; in lio_sync_octeon_time()
639 lt->nsec = ts.tv_nsec; in lio_sync_octeon_time()
640 octeon_swap_8B_data((u64 *)lt, (sizeof(struct lio_time)) / 8); in lio_sync_octeon_time()
/drivers/infiniband/core/
Dverbs.c233 enum rdma_transport_type lt; in rdma_port_get_link_layer() local
237 lt = rdma_node_get_transport(device->node_type); in rdma_port_get_link_layer()
238 if (lt == RDMA_TRANSPORT_IB) in rdma_port_get_link_layer()
/drivers/memory/tegra/
Dtegra210-emc-cc-r21021.c407 #define __COPY_EMA(nt, lt, dev) \ in periodic_compensation_handler() argument
408 ({ __MOVAVG(nt, dev) = __MOVAVG(lt, dev) * \ in periodic_compensation_handler()