| /drivers/vfio/platform/ |
| D | vfio_platform_irq.c | 24 if (!irq_ctx->masked) { in vfio_platform_mask()
26 irq_ctx->masked = true; in vfio_platform_mask()
84 if (irq_ctx->masked) { in vfio_platform_unmask()
86 irq_ctx->masked = false; in vfio_platform_unmask()
147 if (!irq_ctx->masked) { in vfio_automasked_irq_handler()
152 irq_ctx->masked = true; in vfio_automasked_irq_handler()
212 if (!irq->masked) in vfio_set_trigger()
309 vdev->irqs[i].masked = false; in vfio_platform_irq_init()
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| D | vfio_platform_private.h | 29 bool masked; member
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| /drivers/net/wireless/ath/ath9k/ |
| D | ar9002_mac.c | 32 static bool ar9002_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked, in ar9002_hw_get_isr() argument
53 *masked = 0; in ar9002_hw_get_isr()
58 *masked = 0; in ar9002_hw_get_isr()
91 *masked = 0; in ar9002_hw_get_isr()
95 *masked = isr & ATH9K_INT_COMMON; in ar9002_hw_get_isr()
99 *masked |= ATH9K_INT_RX; in ar9002_hw_get_isr()
106 *masked |= ATH9K_INT_TX; in ar9002_hw_get_isr()
134 *masked |= mask2; in ar9002_hw_get_isr()
153 *masked |= ATH9K_INT_GENTIMER; in ar9002_hw_get_isr()
157 *masked |= ATH9K_INT_TIM_TIMER; in ar9002_hw_get_isr()
[all …]
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| D | ar9003_mac.c | 182 static bool ar9003_hw_get_isr(struct ath_hw *ah, enum ath9k_int *masked, in ar9003_hw_get_isr() argument
206 *masked = 0; in ar9003_hw_get_isr()
243 *masked = 0; in ar9003_hw_get_isr()
247 *masked = isr & ATH9K_INT_COMMON; in ar9003_hw_get_isr()
251 *masked |= ATH9K_INT_RXLP; in ar9003_hw_get_isr()
255 *masked |= ATH9K_INT_TX; in ar9003_hw_get_isr()
258 *masked |= ATH9K_INT_RXLP; in ar9003_hw_get_isr()
261 *masked |= ATH9K_INT_RXHP; in ar9003_hw_get_isr()
264 *masked |= ATH9K_INT_TX; in ar9003_hw_get_isr()
293 *masked |= ATH9K_INT_GENTIMER; in ar9003_hw_get_isr()
[all …]
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| D | hw-ops.h | 51 static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked, in ath9k_hw_getisr() argument
54 return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p); in ath9k_hw_getisr()
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| D | ar9003_mci.h | 335 void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked);
374 static inline void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked) in ar9003_mci_get_isr() argument
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| D | ar9003_mci.c | 369 void ar9003_mci_get_isr(struct ath_hw *ah, enum ath9k_int *masked) in ar9003_mci_get_isr() argument
384 *masked |= ATH9K_INT_MCI; in ar9003_mci_get_isr()
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| D | hw.h | 730 bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked,
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| /drivers/vfio/pci/ |
| D | vfio_pci_intrs.c | 52 } else if (!vdev->ctx[0].masked) { in vfio_pci_intx_mask()
62 vdev->ctx[0].masked = true; in vfio_pci_intx_mask()
90 } else if (vdev->ctx[0].masked && !vdev->virq_disabled) { in vfio_pci_intx_unmask_handler()
102 vdev->ctx[0].masked = (ret > 0); in vfio_pci_intx_unmask_handler()
126 vdev->ctx[0].masked = true; in vfio_intx_handler()
128 } else if (!vdev->ctx[0].masked && /* may be shared */ in vfio_intx_handler()
130 vdev->ctx[0].masked = true; in vfio_intx_handler()
162 vdev->ctx[0].masked = vdev->virq_disabled; in vfio_intx_enable()
164 pci_intx(vdev->pdev, !vdev->ctx[0].masked); in vfio_intx_enable()
219 if (!vdev->pci_2_3 && vdev->ctx[0].masked) in vfio_intx_set_signal()
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| /drivers/irqchip/ |
| D | irq-mtk-cirq.c | 165 bool pending, masked; in mtk_cirq_suspend() local
196 &masked); in mtk_cirq_suspend()
199 (pending && !masked)) in mtk_cirq_suspend()
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| D | irq-mips-gic.c | 312 unsigned long pending, masked; in gic_handle_local_int() local
316 masked = read_gic_vl_mask(); in gic_handle_local_int()
318 bitmap_and(&pending, &pending, &masked, GIC_NUM_LOCAL_INTRS); in gic_handle_local_int()
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| /drivers/pinctrl/mediatek/ |
| D | mtk-eint.c | 160 bool masked; in mtk_eint_set_type() local
179 masked = false; in mtk_eint_set_type()
181 masked = true; in mtk_eint_set_type()
201 if (!masked) in mtk_eint_set_type()
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| /drivers/bus/ |
| D | moxtet.c | 644 moxtet->irq.masked |= BIT(d->hwirq); in moxtet_irq_mask()
651 moxtet->irq.masked &= ~BIT(d->hwirq); in moxtet_irq_unmask()
703 set &= ~moxtet->irq.masked; in moxtet_irq_thread_fn()
717 set &= ~moxtet->irq.masked; in moxtet_irq_thread_fn()
755 moxtet->irq.masked = ~0; in moxtet_irq_setup()
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| /drivers/staging/greybus/ |
| D | gpio.c | 30 bool masked; member
277 line->masked = true; in gb_gpio_irq_mask()
287 line->masked = false; in gb_gpio_irq_unmask()
349 if (line->masked) in gb_gpio_irq_bus_sync_unlock()
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| /drivers/hv/ |
| D | hv.c | 224 shared_sint.masked = false; in hv_synic_enable_regs()
268 shared_sint.masked = 1; in hv_synic_disable_regs()
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| /drivers/net/dsa/mv88e6xxx/ |
| D | global2.c | 1035 chip->g2_irq.masked |= (1 << n); in mv88e6xxx_g2_irq_mask()
1043 chip->g2_irq.masked &= ~(1 << n); in mv88e6xxx_g2_irq_unmask()
1084 err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked); in mv88e6xxx_g2_irq_bus_sync_unlock()
1138 chip->g2_irq.masked = ~0; in mv88e6xxx_g2_irq_setup()
1140 err = mv88e6xxx_g2_int_mask(chip, ~chip->g2_irq.masked); in mv88e6xxx_g2_irq_setup()
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| D | chip.h | 193 u16 masked; member
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| D | chip.c | 133 chip->g1_irq.masked |= (1 << n); in mv88e6xxx_g1_irq_mask()
141 chip->g1_irq.masked &= ~(1 << n); in mv88e6xxx_g1_irq_unmask()
212 reg |= (~chip->g1_irq.masked & mask); in mv88e6xxx_g1_irq_bus_sync_unlock()
295 chip->g1_irq.masked = ~0; in mv88e6xxx_g1_irq_setup_common()
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| /drivers/pinctrl/ |
| D | pinctrl-sx150x.c | 106 u32 masked; member
494 pctl->irq.masked |= BIT(n); in sx150x_irq_mask()
503 pctl->irq.masked &= ~BIT(n); in sx150x_irq_unmask()
576 regmap_write(pctl->regmap, pctl->data->reg_irq_mask, pctl->irq.masked); in sx150x_irq_bus_sync_unlock()
1197 pctl->irq.masked = ~0; in sx150x_probe()
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| /drivers/watchdog/ |
| D | orion_wdt.c | 347 bool masked, enabled, running; in armada375_enabled() local
349 masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit; in armada375_enabled()
353 return !masked && enabled && running; in armada375_enabled()
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| /drivers/gpu/drm/exynos/ |
| D | exynos_drm_gsc.c | 609 bool masked = !enqueue; in gsc_src_set_buf_seq() local
618 cfg |= masked << buf_id; in gsc_src_set_buf_seq()
926 bool masked = !enqueue; in gsc_dst_set_buf_seq() local
935 cfg |= masked << buf_id; in gsc_dst_set_buf_seq()
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| /drivers/gpu/drm/i915/gt/uc/ |
| D | intel_guc_ads.c | 239 #define GUC_MMIO_REG_ADD(regset, reg, masked) \ argument
242 (masked) ? GUC_REGSET_MASKED : 0)
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| /drivers/media/platform/ |
| D | sh_vou.c | 1020 u32 irq_status = sh_vou_reg_a_read(vou_dev, VOUIR), masked; in sh_vou_isr() local
1041 masked = ~(0x300 & irq_status) & irq_status & 0x30304; in sh_vou_isr()
1044 irq_status, masked, vou_status, cnt); in sh_vou_isr()
1050 sh_vou_reg_a_write(vou_dev, VOUIR, masked); in sh_vou_isr()
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| /drivers/net/ethernet/mellanox/mlx5/core/steering/ |
| D | dr_ste.c | 30 u8 masked[DR_STE_SIZE_TAG] = {}; in mlx5dr_ste_calc_hash_index() local
43 masked[i] = hw_ste->tag[i]; in mlx5dr_ste_calc_hash_index()
48 crc32 = dr_ste_crc32_calc(masked, DR_STE_SIZE_TAG); in mlx5dr_ste_calc_hash_index()
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