Searched refs:pll_params (Results 1 – 6 of 6) sorted by relevance
/drivers/clk/tegra/ |
D | clk-pll.c | 1202 static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, in _pll_fixed_mdiv() argument 1205 u16 mdiv = parent_rate / pll_params->cf_min; in _pll_fixed_mdiv() 1207 if (pll_params->flags & TEGRA_MDIV_NEW) in _pll_fixed_mdiv() 1208 return (!pll_params->mdiv_default ? mdiv : in _pll_fixed_mdiv() 1209 min(mdiv, pll_params->mdiv_default)); in _pll_fixed_mdiv() 1211 if (pll_params->mdiv_default) in _pll_fixed_mdiv() 1212 return pll_params->mdiv_default; in _pll_fixed_mdiv() 1214 if (parent_rate > pll_params->cf_max) in _pll_fixed_mdiv() 1267 static int _setup_dynamic_ramp(struct tegra_clk_pll_params *pll_params, in _setup_dynamic_ramp() argument 1296 val = step_a << pll_params->stepa_shift; in _setup_dynamic_ramp() [all …]
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D | clk.h | 344 unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params, 397 struct tegra_clk_pll_params *pll_params; member 406 unsigned long flags, struct tegra_clk_pll_params *pll_params, 411 unsigned long flags, struct tegra_clk_pll_params *pll_params, 417 struct tegra_clk_pll_params *pll_params, 423 struct tegra_clk_pll_params *pll_params, 429 struct tegra_clk_pll_params *pll_params, 435 struct tegra_clk_pll_params *pll_params, 441 struct tegra_clk_pll_params *pll_params, 447 struct tegra_clk_pll_params *pll_params, [all …]
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D | clk-tegra-periph.c | 941 struct tegra_clk_pll_params *pll_params) in init_pllp() argument 951 pmc_base, 0, pll_params, NULL); in init_pllp() 1024 struct tegra_clk_pll_params *pll_params) in tegra_periph_clk_init() argument 1026 init_pllp(clk_base, pmc_base, tegra_clks, pll_params); in tegra_periph_clk_init()
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D | clk-tegra-audio.c | 184 clk_base, pmc_base, 0, info->pll_params, in tegra_audio_clk_init()
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/drivers/phy/st/ |
D | phy-stm32-usbphyc.c | 52 struct pll_params { struct 125 struct pll_params *pll_params) in stm32_usbphyc_get_pll_params() argument 143 pll_params->ndiv = (u8)ndiv; in stm32_usbphyc_get_pll_params() 148 pll_params->frac = (u16)frac; in stm32_usbphyc_get_pll_params() 153 struct pll_params pll_params; in stm32_usbphyc_pll_init() local 165 stm32_usbphyc_get_pll_params(clk_rate, &pll_params); in stm32_usbphyc_pll_init() 166 ndiv = FIELD_PREP(PLLNDIV, pll_params.ndiv); in stm32_usbphyc_pll_init() 167 frac = FIELD_PREP(PLLFRACIN, pll_params.frac); in stm32_usbphyc_pll_init() 171 if (pll_params.frac) in stm32_usbphyc_pll_init()
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/drivers/gpu/drm/i915/display/ |
D | intel_dpll_mgr.c | 2536 struct skl_wrpll_params *pll_params) in icl_calc_dp_combo_pll() argument 2548 *pll_params = params[i].wrpll; in icl_calc_dp_combo_pll() 2558 struct skl_wrpll_params *pll_params) in icl_calc_tbt_pll() argument 2569 *pll_params = tgl_tbt_pll_19_2MHz_values; in icl_calc_tbt_pll() 2572 *pll_params = tgl_tbt_pll_24MHz_values; in icl_calc_tbt_pll() 2582 *pll_params = icl_tbt_pll_19_2MHz_values; in icl_calc_tbt_pll() 2585 *pll_params = icl_tbt_pll_24MHz_values; in icl_calc_tbt_pll() 2726 const struct skl_wrpll_params *pll_params, in icl_calc_dpll_state() argument 2729 u32 dco_fraction = pll_params->dco_fraction; in icl_calc_dpll_state() 2737 pll_params->dco_integer; in icl_calc_dpll_state() [all …]
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