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Searched refs:scdc (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dhdmigm200.c27 gm200_hdmi_scdc(struct nvkm_ior *ior, u8 scdc) in gm200_hdmi_scdc() argument
31 const u32 ctrl = scdc & 0x3; in gm200_hdmi_scdc()
35 ior->tmds.high_speed = !!(scdc & 0x2); in gm200_hdmi_scdc()
Dsorgp100.c35 .scdc = gm200_hdmi_scdc,
66 .scdc = gm200_hdmi_scdc,
Dsortu102.c75 .scdc = gm200_hdmi_scdc,
106 .scdc = gm200_hdmi_scdc,
Dsorga102.c86 .scdc = gm200_hdmi_scdc,
117 .scdc = gm200_hdmi_scdc,
Drootnv50.c182 args->v0.scdc); in nv50_disp_root_mthd_()
207 if (outp->ior->func->hdmi.scdc) in nv50_disp_root_mthd_()
208 outp->ior->func->hdmi.scdc(outp->ior, args->v0.scdc); in nv50_disp_root_mthd_()
Dsorgv100.c91 .scdc = gm200_hdmi_scdc,
121 .scdc = gm200_hdmi_scdc,
Dsorgm200.c102 .scdc = gm200_hdmi_scdc,
133 .scdc = gm200_hdmi_scdc,
Dior.h69 void (*scdc)(struct nvkm_ior *, u8 scdc); member
/drivers/gpu/drm/nouveau/include/nvif/
Dcl5070.h75 __u8 scdc; member
/drivers/gpu/drm/tegra/
Dsor.c440 struct delayed_work scdc; member
2154 cancel_delayed_work_sync(&sor->scdc); in tegra_sor_hdmi_scdc_stop()
2181 struct tegra_sor *sor = container_of(work, struct tegra_sor, scdc.work); in tegra_sor_hdmi_scdc_work()
2189 schedule_delayed_work(&sor->scdc, msecs_to_jiffies(5000)); in tegra_sor_hdmi_scdc_work()
2194 struct drm_scdc *scdc = &sor->output.connector.display_info.hdmi.scdc; in tegra_sor_hdmi_scdc_start() local
2199 if (mode->clock >= 340000 && scdc->supported) { in tegra_sor_hdmi_scdc_start()
2200 schedule_delayed_work(&sor->scdc, msecs_to_jiffies(5000)); in tegra_sor_hdmi_scdc_start()
3007 INIT_DELAYED_WORK(&sor->scdc, tegra_sor_hdmi_scdc_work); in tegra_sor_hdmi_probe()
/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi.c1266 if (!display->hdmi.scdc.supported || in dw_hdmi_support_scdc()
1267 !display->hdmi.scdc.scrambling.supported) in dw_hdmi_support_scdc()
1274 if (!display->hdmi.scdc.scrambling.low_rates && in dw_hdmi_support_scdc()
1900 hdmi_info->scdc.scrambling.low_rates)) ? in hdmi_av_composer()
1968 hdmi_info->scdc.scrambling.low_rates) { in hdmi_av_composer()
2542 bool is_hdmi2_sink = info->hdmi.scdc.supported || in dw_hdmi_bridge_atomic_get_output_bus_fmts()
/drivers/gpu/drm/
Ddrm_edid.c4888 hdmi->scdc.supported = true; in drm_parse_hdmi_forum_vsdb()
4890 hdmi->scdc.read_request = true; in drm_parse_hdmi_forum_vsdb()
4905 struct drm_scdc *scdc = &hdmi->scdc; in drm_parse_hdmi_forum_vsdb() local
4913 if (scdc->supported) { in drm_parse_hdmi_forum_vsdb()
4914 scdc->scrambling.supported = true; in drm_parse_hdmi_forum_vsdb()
4918 scdc->scrambling.low_rates = true; in drm_parse_hdmi_forum_vsdb()
5506 return connector->display_info.hdmi.scdc.supported || in is_hdmi2_sink()
/drivers/gpu/drm/meson/
Dmeson_encoder_hdmi.c122 bool is_hdmi2_sink = display_info->hdmi.scdc.supported; in meson_encoder_hdmi_mode_valid()
Dmeson_dw_hdmi.c373 bool is_hdmi2_sink = display->hdmi.scdc.supported; in dw_hdmi_phy_init()
/drivers/gpu/drm/i915/display/
Dintel_hdmi.c2194 struct drm_scdc *scdc = &connector->display_info.hdmi.scdc; in intel_hdmi_compute_config() local
2235 if (scdc->scrambling.supported && DISPLAY_VER(dev_priv) >= 10) { in intel_hdmi_compute_config()
2236 if (scdc->scrambling.low_rates) in intel_hdmi_compute_config()
2574 &connector->display_info.hdmi.scdc.scrambling; in intel_hdmi_handle_sink_scrambling()
/drivers/gpu/drm/nouveau/dispnv50/
Ddisp.c908 if (hdmi->scdc.scrambling.supported) { in nv50_hdmi_enable()
911 hdmi->scdc.scrambling.low_rates; in nv50_hdmi_enable()
914 args.pwr.scdc = in nv50_hdmi_enable()
929 if (!hdmi->scdc.scrambling.supported) in nv50_hdmi_enable()
/drivers/gpu/drm/vc4/
Dvc4_hdmi.c541 if (!display->hdmi.scdc.supported || in vc4_hdmi_supports_scrambling()
542 !display->hdmi.scdc.scrambling.supported) in vc4_hdmi_supports_scrambling()
/drivers/gpu/drm/nouveau/
Dnouveau_connector.c1028 info->hdmi.scdc.scrambling.supported ? in get_tmds_link_bandwidth()
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm.c6306 drm_connector->display_info.hdmi.scdc.scrambling.low_rates; in create_stream_for_sink()