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Searched refs:src_fmt (Results 1 – 25 of 38) sorted by relevance

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/drivers/media/platform/rockchip/rkisp1/
Drkisp1-isp.c276 const struct rkisp1_isp_mbus_info *src_fmt, *sink_fmt; in rkisp1_config_isp() local
283 src_fmt = rkisp1->isp.src_fmt; in rkisp1_config_isp()
293 if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { in rkisp1_config_isp()
360 if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) { in rkisp1_config_isp()
645 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; in rkisp1_isp_init_config() local
662 src_fmt = v4l2_subdev_get_try_format(sd, sd_state, in rkisp1_isp_init_config()
664 *src_fmt = *sink_fmt; in rkisp1_isp_init_config()
665 src_fmt->code = RKISP1_DEF_SRC_PAD_FMT; in rkisp1_isp_init_config()
673 src_fmt = v4l2_subdev_get_try_format(sd, sd_state, in rkisp1_isp_init_config()
679 *src_fmt = *sink_fmt; in rkisp1_isp_init_config()
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Drkisp1-resizer.c400 struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; in rkisp1_rsz_config() local
405 src_fmt = rkisp1_rsz_get_pad_fmt(rsz, NULL, RKISP1_RSZ_PAD_SRC, in rkisp1_rsz_config()
407 src_yuv_info = rkisp1_rsz_get_yuv_mbus_info(src_fmt->code); in rkisp1_rsz_config()
423 src_y.width = src_fmt->width; in rkisp1_rsz_config()
424 src_y.height = src_fmt->height; in rkisp1_rsz_config()
445 src_fmt->width, src_fmt->height); in rkisp1_rsz_config()
504 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt; in rkisp1_rsz_init_config() local
525 src_fmt = v4l2_subdev_get_try_format(sd, sd_state, in rkisp1_rsz_init_config()
527 *src_fmt = *sink_fmt; in rkisp1_rsz_init_config()
540 struct v4l2_mbus_framefmt *src_fmt, *sink_fmt; in rkisp1_rsz_set_src_fmt() local
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/drivers/media/platform/sunxi/sun8i-rotate/
Dsun8i_rotate.c87 fmt = rotate_find_format(ctx->src_fmt.pixelformat); in rotate_device_run()
94 ctx->src_fmt.bytesperline, ctx->src_fmt.height, in rotate_device_run()
98 ROTATE_SIZE(ctx->src_fmt.width, ctx->src_fmt.height)); in rotate_device_run()
264 fmt = rotate_find_format(ctx->src_fmt.pixelformat); in rotate_set_cap_format()
271 f->pixelformat = ctx->src_fmt.pixelformat; in rotate_set_cap_format()
276 f->width = ctx->src_fmt.height; in rotate_set_cap_format()
277 f->height = ctx->src_fmt.width; in rotate_set_cap_format()
279 f->width = ctx->src_fmt.width; in rotate_set_cap_format()
280 f->height = ctx->src_fmt.height; in rotate_set_cap_format()
303 f->fmt.pix = ctx->src_fmt; in rotate_g_fmt_vid_out()
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Dsun8i-rotate.h108 struct v4l2_pix_format src_fmt; member
/drivers/staging/media/hantro/
Dhantro_v4l2.c219 *pix_mp = ctx->src_fmt; in vidioc_g_fmt_out_mplane()
270 pix_mp->width = ctx->src_fmt.width; in hantro_try_fmt()
271 pix_mp->height = ctx->src_fmt.height; in hantro_try_fmt()
340 fmt = &ctx->src_fmt; in hantro_reset_encoded_fmt()
362 raw_fmt = &ctx->src_fmt; in hantro_reset_raw_fmt()
367 encoded_fmt = &ctx->src_fmt; in hantro_reset_raw_fmt()
424 pix_mp->pixelformat != ctx->src_fmt.pixelformat)) in hantro_set_fmt_out()
445 ctx->src_fmt = *pix_mp; in hantro_set_fmt_out()
522 ctx->src_fmt.colorspace = pix_mp->colorspace; in hantro_set_fmt_cap()
523 ctx->src_fmt.ycbcr_enc = pix_mp->ycbcr_enc; in hantro_set_fmt_cap()
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Dhantro_g1_h264_dec.c52 reg = G1_REG_DEC_CTRL1_PIC_MB_WIDTH(MB_WIDTH(ctx->src_fmt.width)) | in set_params()
53 G1_REG_DEC_CTRL1_PIC_MB_HEIGHT_P(MB_HEIGHT(ctx->src_fmt.height)) | in set_params()
222 offset = ALIGN(ctx->src_fmt.width, MB_DIM); in set_buffers()
233 offset = bytes_per_mb * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
234 MB_HEIGHT(ctx->src_fmt.height); in set_buffers()
241 offset += 32 * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
242 MB_HEIGHT(ctx->src_fmt.height); in set_buffers()
Dhantro_h1_jpeg_enc.c21 struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; in hantro_h1_set_src_img_ctrl()
35 struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; in hantro_h1_jpeg_enc_set_buffers()
130 reg = H1_REG_ENC_CTRL_WIDTH(MB_WIDTH(ctx->src_fmt.width)) in hantro_h1_jpeg_enc_run()
131 | H1_REG_ENC_CTRL_HEIGHT(MB_HEIGHT(ctx->src_fmt.height)) in hantro_h1_jpeg_enc_run()
Drockchip_vpu2_hw_jpeg_enc.c38 struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; in rockchip_vpu2_set_src_img_ctrl()
66 struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt; in rockchip_vpu2_jpeg_enc_set_buffers()
162 reg = VEPU_REG_MB_WIDTH(MB_WIDTH(ctx->src_fmt.width)) in rockchip_vpu2_jpeg_enc_run()
163 | VEPU_REG_MB_HEIGHT(MB_HEIGHT(ctx->src_fmt.height)) in rockchip_vpu2_jpeg_enc_run()
Drockchip_vpu2_hw_h264_dec.c263 VDPU_REG_PIC_MB_HEIGHT_P(MB_HEIGHT(ctx->src_fmt.height)) | in set_params()
264 VDPU_REG_PIC_MB_WIDTH(MB_WIDTH(ctx->src_fmt.width)); in set_params()
439 offset = ALIGN(ctx->src_fmt.width, MB_DIM); in set_buffers()
450 offset = bytes_per_mb * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
451 MB_HEIGHT(ctx->src_fmt.height); in set_buffers()
458 offset += 32 * MB_WIDTH(ctx->src_fmt.width) * in set_buffers()
459 MB_HEIGHT(ctx->src_fmt.height); in set_buffers()
/drivers/staging/media/sunxi/cedrus/
Dcedrus_video.c240 f->fmt.pix = ctx->src_fmt; in cedrus_g_fmt_vid_out()
258 pix_fmt->width = ctx->src_fmt.width; in cedrus_try_fmt_vid_cap()
259 pix_fmt->height = ctx->src_fmt.height; in cedrus_try_fmt_vid_cap()
323 f->fmt.pix.pixelformat != ctx->src_fmt.pixelformat)) in cedrus_s_fmt_vid_out()
339 ctx->src_fmt = f->fmt.pix; in cedrus_s_fmt_vid_out()
341 switch (ctx->src_fmt.pixelformat) { in cedrus_s_fmt_vid_out()
358 ctx->dst_fmt.width = ctx->src_fmt.width; in cedrus_s_fmt_vid_out()
359 ctx->dst_fmt.height = ctx->src_fmt.height; in cedrus_s_fmt_vid_out()
404 pix_fmt = &ctx->src_fmt; in cedrus_queue_setup()
454 pix_fmt = &ctx->src_fmt; in cedrus_buf_prepare()
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Dcedrus_h264.c346 if (ctx->src_fmt.width > 2048) { in cedrus_set_params()
525 if (ctx->src_fmt.width > 2048) in cedrus_h264_start()
534 pic_info_size += ctx->src_fmt.height * 2 * 64; in cedrus_h264_start()
563 field_size = DIV_ROUND_UP(ctx->src_fmt.width, 16) * in cedrus_h264_start()
564 DIV_ROUND_UP(ctx->src_fmt.height, 16) * 16; in cedrus_h264_start()
594 if (ctx->src_fmt.width > 2048) { in cedrus_h264_start()
601 ALIGN(ctx->src_fmt.width, 32) * 12; in cedrus_h264_start()
617 ALIGN(ctx->src_fmt.width, 64) * 5 * 2; in cedrus_h264_start()
Dcedrus.c287 ctx->src_fmt.pixelformat = V4L2_PIX_FMT_MPEG2_SLICE; in cedrus_open()
292 ctx->src_fmt.width = ctx->dst_fmt.width; in cedrus_open()
293 ctx->src_fmt.height = ctx->dst_fmt.height; in cedrus_open()
294 cedrus_prepare_format(&ctx->src_fmt); in cedrus_open()
Dcedrus_mpeg2.c120 reg = VE_DEC_MPEG_PICBOUNDSIZE_WIDTH(ctx->src_fmt.width); in cedrus_mpeg2_setup()
121 reg |= VE_DEC_MPEG_PICBOUNDSIZE_HEIGHT(ctx->src_fmt.height); in cedrus_mpeg2_setup()
Dcedrus_h265.c287 DIV_ROUND_UP(ctx->src_fmt.width, ctb_size_luma) * in cedrus_h265_setup()
288 DIV_ROUND_UP(ctx->src_fmt.height, ctb_size_luma) * in cedrus_h265_setup()
529 reg = VE_DEC_H265_DEC_PIC_SIZE_WIDTH(ctx->src_fmt.width) | in cedrus_h265_setup()
530 VE_DEC_H265_DEC_PIC_SIZE_HEIGHT(ctx->src_fmt.height); in cedrus_h265_setup()
Dcedrus_hw.c64 if (ctx->src_fmt.width == 4096) in cedrus_engine_enable()
66 if (ctx->src_fmt.width > 2048) in cedrus_engine_enable()
Dcedrus_dec.c41 switch (ctx->src_fmt.pixelformat) { in cedrus_device_run()
/drivers/media/platform/sunxi/sun8i-di/
Dsun8i-di.c91 width = ctx->src_fmt.width; in deinterlace_device_run()
92 height = ctx->src_fmt.height; in deinterlace_device_run()
93 stride = ctx->src_fmt.bytesperline; in deinterlace_device_run()
111 switch (ctx->src_fmt.pixelformat) { in deinterlace_device_run()
128 switch (ctx->src_fmt.pixelformat) { in deinterlace_device_run()
156 hstep = (ctx->src_fmt.width << 16) / ctx->dst_fmt.width; in deinterlace_device_run()
157 vstep = (ctx->src_fmt.height << 16) / ctx->dst_fmt.height; in deinterlace_device_run()
408 f->fmt.pix = ctx->src_fmt; in deinterlace_g_fmt_vid_out()
478 ctx->src_fmt = f->fmt.pix; in deinterlace_s_fmt_vid_out()
524 pix_fmt = &ctx->src_fmt; in deinterlace_queue_setup()
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/drivers/media/platform/ti-vpe/
Dcsc.c140 struct v4l2_format *src_fmt, struct v4l2_format *dst_fmt) in csc_set_coeff() argument
152 if (V4L2_TYPE_IS_MULTIPLANAR(src_fmt->type)) { in csc_set_coeff()
153 mp = &src_fmt->fmt.pix_mp; in csc_set_coeff()
158 pix = &src_fmt->fmt.pix; in csc_set_coeff()
Dcsc.h61 struct v4l2_format *src_fmt, struct v4l2_format *dst_fmt);
/drivers/media/platform/exynos4-is/
Dfimc-isp.c142 *mf = isp->src_fmt; in fimc_isp_subdev_get_fmt()
239 isp->src_fmt = format.format; in fimc_isp_subdev_set_fmt()
240 __is_set_frame_size(is, &isp->src_fmt); in fimc_isp_subdev_set_fmt()
242 isp->src_fmt = *mf; in fimc_isp_subdev_set_fmt()
687 isp->src_fmt.width = DEFAULT_PREVIEW_STILL_WIDTH; in __isp_subdev_set_default_format()
688 isp->src_fmt.height = DEFAULT_PREVIEW_STILL_HEIGHT; in __isp_subdev_set_default_format()
689 isp->src_fmt.code = MEDIA_BUS_FMT_SGRBG10_1X10; in __isp_subdev_set_default_format()
690 __is_set_frame_size(is, &isp->src_fmt); in __isp_subdev_set_default_format()
Dfimc-isp-video.c452 struct v4l2_subdev_format sink_fmt, src_fmt; in isp_video_pipeline_validate() local
473 src_fmt.pad = pad->index; in isp_video_pipeline_validate()
474 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; in isp_video_pipeline_validate()
475 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); in isp_video_pipeline_validate()
479 if (src_fmt.format.width != sink_fmt.format.width || in isp_video_pipeline_validate()
480 src_fmt.format.height != sink_fmt.format.height || in isp_video_pipeline_validate()
481 src_fmt.format.code != sink_fmt.format.code) in isp_video_pipeline_validate()
Dfimc-lite.c772 struct v4l2_subdev_format sink_fmt, src_fmt; in fimc_pipeline_validate() local
801 src_fmt.pad = pad->index; in fimc_pipeline_validate()
802 src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE; in fimc_pipeline_validate()
803 ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt); in fimc_pipeline_validate()
807 if (src_fmt.format.width != sink_fmt.format.width || in fimc_pipeline_validate()
808 src_fmt.format.height != sink_fmt.format.height || in fimc_pipeline_validate()
809 src_fmt.format.code != sink_fmt.format.code) in fimc_pipeline_validate()
1086 struct v4l2_mbus_framefmt *src_fmt; in fimc_lite_subdev_set_fmt() local
1093 src_fmt = __fimc_lite_subdev_get_try_fmt(sd, sd_state, in fimc_lite_subdev_set_fmt()
1095 *src_fmt = *mf; in fimc_lite_subdev_set_fmt()
/drivers/gpu/drm/exynos/
Dexynos_drm_scaler.c143 u32 src_fmt, u32 tile) in scaler_set_src_fmt() argument
147 val = SCALER_SRC_CFG_SET_COLOR_FORMAT(src_fmt) | (tile << 10); in scaler_set_src_fmt()
364 const struct scaler_format *src_fmt, *dst_fmt; in scaler_commit() local
367 src_fmt = scaler_get_format(task->src.buf.fourcc); in scaler_commit()
380 scaler, src_fmt->internal_fmt, task->src.buf.modifier != 0); in scaler_commit()
383 scaler_set_src_luma_chroma_pos(scaler, src_pos, src_fmt); in scaler_commit()
/drivers/media/platform/sti/bdisp/
Dbdisp-hw.c769 u32 src_fmt, dst_fmt; in bdisp_hw_build_node() local
786 src_fmt = src->fmt->pixelformat; in bdisp_hw_build_node()
868 node->s2ty |= bdisp_hw_color_format(src_fmt); in bdisp_hw_build_node()
890 node->s2ty |= bdisp_hw_color_format(src_fmt); in bdisp_hw_build_node()
909 node->s3ty |= bdisp_hw_color_format(src_fmt); in bdisp_hw_build_node()
/drivers/media/platform/s5p-mfc/
Ds5p_mfc_dec.c359 pix_mp->pixelformat = ctx->src_fmt->fourcc; in vidioc_g_fmt()
360 pix_mp->num_planes = ctx->src_fmt->num_planes; in vidioc_g_fmt()
432 ctx->src_fmt = find_format(f, MFC_FMT_DEC); in vidioc_s_fmt()
433 ctx->codec_mode = ctx->src_fmt->codec_mode; in vidioc_s_fmt()
784 if (ctx->src_fmt->fourcc == V4L2_PIX_FMT_H264) { in vidioc_g_selection()
1189 ctx->src_fmt = find_format(&f, MFC_FMT_DEC); in s5p_mfc_dec_init()
1198 ctx->src_fmt, ctx->dst_fmt); in s5p_mfc_dec_init()

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