| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-mediatek.c | 44 u32 tx_delay; member
130 mac_delay->tx_delay /= 550; in mt2712_delay_ps2stage()
138 mac_delay->tx_delay /= 170; in mt2712_delay_ps2stage()
155 mac_delay->tx_delay *= 550; in mt2712_delay_stage2ps()
163 mac_delay->tx_delay *= 170; in mt2712_delay_stage2ps()
181 delay_val |= FIELD_PREP(ETH_DLY_TXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
182 delay_val |= FIELD_PREP(ETH_DLY_TXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
200 delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
201 delay_val |= FIELD_PREP(ETH_DLY_GTXC_STAGES, mac_delay->tx_delay); in mt2712_set_delay()
241 delay_val |= FIELD_PREP(ETH_DLY_GTXC_ENABLE, !!mac_delay->tx_delay); in mt2712_set_delay()
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| D | dwmac-rk.c | 31 int tx_delay, int rx_delay);
65 int tx_delay; member
168 int tx_delay, int rx_delay) in rk3128_set_to_rgmii() argument
181 DELAY_ENABLE(RK3128, tx_delay, rx_delay) | in rk3128_set_to_rgmii()
183 RK3128_GMAC_CLK_TX_DL_CFG(tx_delay)); in rk3128_set_to_rgmii()
284 int tx_delay, int rx_delay) in rk3228_set_to_rgmii() argument
296 DELAY_ENABLE(RK3228, tx_delay, rx_delay)); in rk3228_set_to_rgmii()
300 RK3228_GMAC_CLK_TX_DL_CFG(tx_delay)); in rk3228_set_to_rgmii()
406 int tx_delay, int rx_delay) in rk3288_set_to_rgmii() argument
419 DELAY_ENABLE(RK3288, tx_delay, rx_delay) | in rk3288_set_to_rgmii()
[all …]
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| D | dwmac-ingenic.c | 64 int tx_delay; member
208 if (mac->tx_delay == 0) in x2000_mac_set_mode()
212 FIELD_PREP(MACPHYC_TX_DELAY_MASK, (mac->tx_delay + 9750) / 19500 - 1); in x2000_mac_set_mode()
273 mac->tx_delay = tx_delay_ps * 1000; in ingenic_mac_probe()
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| /drivers/net/hamradio/ |
| D | hdlcdrv.c | 225 s->ch_params.tx_delay = data[1]; in do_kiss_params()
226 PKP("TX delay = %ums", 10 * s->ch_params.tx_delay); in do_kiss_params()
355 s->hdlctx.numflags = tenms_to_2flags(s, s->ch_params.tx_delay); in start_tx()
508 bi.data.cp.tx_delay = s->ch_params.tx_delay; in hdlcdrv_siocdevprivate()
518 s->ch_params.tx_delay = bi.data.cp.tx_delay; in hdlcdrv_siocdevprivate()
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| D | 6pack.c | 110 unsigned char tx_delay; member
189 count = encode_sixpack(p, sp->xbuff, len, sp->tx_delay); in sp_encaps()
193 case 1: sp->tx_delay = p[1]; in sp_encaps()
600 sp->tx_delay = SIXP_TXDELAY; in sixpack_open()
784 int length, unsigned char tx_delay) in encode_sixpack() argument
793 buf[0] = tx_delay; in encode_sixpack()
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| D | baycom_epp.c | 331 bc->ch_params.tx_delay = data[1]; in do_kiss_params()
332 PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay); in do_kiss_params()
447 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay); in transmit()
1024 hi.data.cp.tx_delay = bc->ch_params.tx_delay; in baycom_siocdevprivate()
1034 bc->ch_params.tx_delay = hi.data.cp.tx_delay; in baycom_siocdevprivate()
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| /drivers/net/phy/ |
| D | nxp-c45-tja11xx.c | 200 u32 tx_delay; member
890 u64 tx_delay = priv->tx_delay; in nxp_c45_set_delays() local
896 degree = div_u64(tx_delay, PS_PER_DEGREE); in nxp_c45_set_delays()
924 &priv->tx_delay); in nxp_c45_get_delays()
926 priv->tx_delay = DEFAULT_ID_PS; in nxp_c45_get_delays()
928 ret = nxp_c45_check_delay(phydev, priv->tx_delay); in nxp_c45_get_delays()
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| /drivers/staging/octeon/ |
| D | ethernet.c | 646 bool tx_delay; in cvm_set_rgmii_delay() local
652 tx_delay = true; in cvm_set_rgmii_delay()
660 tx_delay = delay_value > 0; in cvm_set_rgmii_delay()
663 if (!rx_delay && !tx_delay) in cvm_set_rgmii_delay()
667 else if (!tx_delay) in cvm_set_rgmii_delay()
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| /drivers/isdn/mISDN/ |
| D | dsp_cmx.c | 1765 if (delay < dsp->tx_delay[0])
1766 dsp->tx_delay[0] = delay;
1801 delay = dsp->tx_delay[0];
1804 if (delay > dsp->tx_delay[i])
1805 delay = dsp->tx_delay[i];
1835 dsp->tx_delay[i] = dsp->tx_delay[i - 1];
1838 dsp->tx_delay[0] = CMX_BUFF_HALF; /* (infinite) delay */
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| D | dsp.h | 203 int tx_delay[MAX_SECONDS_JITTER_CHECK]; member
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| /drivers/net/ethernet/apm/xgene/ |
| D | xgene_enet_main.h | 232 u8 tx_delay; member
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| D | xgene_enet_hw.c | 490 CFG_TXCLK_MUXSEL0_SET(&rgmii, pdata->tx_delay); in xgene_gmac_set_speed()
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| D | xgene_enet_main.c | 1586 pdata->tx_delay = 4; in xgene_get_tx_delay()
1595 pdata->tx_delay = delay; in xgene_get_tx_delay()
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| /drivers/net/arcnet/ |
| D | arcnet.c | 200 unsigned long tx_delay = 50; in arcnet_led_event() local
217 &tx_delay, &tx_delay, 0); in arcnet_led_event()
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| /drivers/net/dsa/ |
| D | mt7530.c | 928 u8 tx_delay = 0; in mt7530_setup_port5() local
974 tx_delay = 4; /* n * 0.5 ns */ in mt7530_setup_port5()
978 CSR_RGMII_TXC_CFG(0x10 + tx_delay)); in mt7530_setup_port5()
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