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Searched refs:scr (Results 1 – 4 of 4) sorted by relevance

/sound/soc/mxs/
Dmxs-saif.c81 u32 scr; in mxs_saif_set_clk() local
102 scr = __raw_readl(master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
103 scr &= ~BM_SAIF_CTRL_BITCLK_MULT_RATE; in mxs_saif_set_clk()
104 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
127 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
134 scr |= BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
144 scr &= ~BM_SAIF_CTRL_BITCLK_BASE_RATE; in mxs_saif_set_clk()
155 __raw_writel(scr, master_saif->base + SAIF_CTRL); in mxs_saif_set_clk()
167 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(4); in mxs_saif_set_clk()
170 scr |= BF_SAIF_CTRL_BITCLK_MULT_RATE(3); in mxs_saif_set_clk()
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/sound/soc/fsl/
Dfsl_ssi.c122 u32 scr; member
465 vals[dir].scr, vals[dir].scr); in fsl_ssi_config_enable()
505 u32 sier, srcr, stcr, scr; in fsl_ssi_config_disable() local
522 scr = ssi_excl_shared_bits(vals->scr, avals->scr, aactive); in fsl_ssi_config_disable()
525 regmap_update_bits(ssi->regs, REG_SSI_SCR, scr, 0); in fsl_ssi_config_disable()
587 vals[RX].scr = SSI_SCR_SSIEN | SSI_SCR_RE; in fsl_ssi_setup_regvals()
590 vals[TX].scr = SSI_SCR_SSIEN | SSI_SCR_TE; in fsl_ssi_setup_regvals()
594 vals[RX].scr = vals[TX].scr = 0; in fsl_ssi_setup_regvals()
879 u32 strcr = 0, scr = 0, stcr, srcr, mask; in _fsl_ssi_set_dai_fmt() local
885 scr |= SSI_SCR_SYNC_TX_FS; in _fsl_ssi_set_dai_fmt()
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Dfsl_spdif.c553 u32 scr, mask; in fsl_spdif_startup() local
569 scr = SCR_TXFIFO_AUTOSYNC | SCR_TXFIFO_CTRL_NORMAL | in fsl_spdif_startup()
576 scr = SCR_RXFIFO_FSEL_IF8 | SCR_RXFIFO_AUTOSYNC; in fsl_spdif_startup()
580 regmap_update_bits(regmap, REG_SPDIF_SCR, mask, scr); in fsl_spdif_startup()
594 u32 scr, mask; in fsl_spdif_shutdown() local
597 scr = 0; in fsl_spdif_shutdown()
604 scr = SCR_RXFIFO_OFF | SCR_RXFIFO_CTL_ZERO; in fsl_spdif_shutdown()
608 regmap_update_bits(regmap, REG_SPDIF_SCR, mask, scr); in fsl_spdif_shutdown()
/sound/pci/ice1712/
Dquartet.c26 unsigned int scr; /* system control register */ member
438 return spec->scr; in get_scr()
457 spec->scr = val; in set_scr()
663 PRIV_ENUM2(AIN34_SEL, SCR_AIN34_SEL, scr, "Line In 3/4", "Hi-Z"),