1* Qualcomm PCI express root complex 2 3- compatible: 4 Usage: required 5 Value type: <stringlist> 6 Definition: Value should contain 7 - "qcom,pcie-ipq8064" for ipq8064 8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065 9 - "qcom,pcie-apq8064" for apq8064 10 - "qcom,pcie-apq8084" for apq8084 11 - "qcom,pcie-msm8996" for msm8996 or apq8096 12 - "qcom,pcie-ipq4019" for ipq4019 13 - "qcom,pcie-ipq8074" for ipq8074 14 - "qcom,pcie-qcs404" for qcs404 15 - "qcom,pcie-sdm845" for sdm845 16 - "qcom,pcie-sm8250" for sm8250 17 - "qcom,pcie-ipq6018" for ipq6018 18 19- reg: 20 Usage: required 21 Value type: <prop-encoded-array> 22 Definition: Register ranges as listed in the reg-names property 23 24- reg-names: 25 Usage: required 26 Value type: <stringlist> 27 Definition: Must include the following entries 28 - "parf" Qualcomm specific registers 29 - "dbi" DesignWare PCIe registers 30 - "elbi" External local bus interface registers 31 - "config" PCIe configuration space 32 - "atu" ATU address space (optional) 33 34- device_type: 35 Usage: required 36 Value type: <string> 37 Definition: Should be "pci". As specified in snps,dw-pcie.yaml 38 39- #address-cells: 40 Usage: required 41 Value type: <u32> 42 Definition: Should be 3. As specified in snps,dw-pcie.yaml 43 44- #size-cells: 45 Usage: required 46 Value type: <u32> 47 Definition: Should be 2. As specified in snps,dw-pcie.yaml 48 49- ranges: 50 Usage: required 51 Value type: <prop-encoded-array> 52 Definition: As specified in snps,dw-pcie.yaml 53 54- interrupts: 55 Usage: required 56 Value type: <prop-encoded-array> 57 Definition: MSI interrupt 58 59- interrupt-names: 60 Usage: required 61 Value type: <stringlist> 62 Definition: Should contain "msi" 63 64- #interrupt-cells: 65 Usage: required 66 Value type: <u32> 67 Definition: Should be 1. As specified in snps,dw-pcie.yaml 68 69- interrupt-map-mask: 70 Usage: required 71 Value type: <prop-encoded-array> 72 Definition: As specified in snps,dw-pcie.yaml 73 74- interrupt-map: 75 Usage: required 76 Value type: <prop-encoded-array> 77 Definition: As specified in snps,dw-pcie.yaml 78 79- clocks: 80 Usage: required 81 Value type: <prop-encoded-array> 82 Definition: List of phandle and clock specifier pairs as listed 83 in clock-names property 84 85- clock-names: 86 Usage: required 87 Value type: <stringlist> 88 Definition: Should contain the following entries 89 - "iface" Configuration AHB clock 90 91- clock-names: 92 Usage: required for ipq/apq8064 93 Value type: <stringlist> 94 Definition: Should contain the following entries 95 - "core" Clocks the pcie hw block 96 - "phy" Clocks the pcie PHY block 97 - "aux" Clocks the pcie AUX block 98 - "ref" Clocks the pcie ref block 99- clock-names: 100 Usage: required for apq8084/ipq4019 101 Value type: <stringlist> 102 Definition: Should contain the following entries 103 - "aux" Auxiliary (AUX) clock 104 - "bus_master" Master AXI clock 105 - "bus_slave" Slave AXI clock 106 107- clock-names: 108 Usage: required for msm8996/apq8096 109 Value type: <stringlist> 110 Definition: Should contain the following entries 111 - "pipe" Pipe Clock driving internal logic 112 - "aux" Auxiliary (AUX) clock 113 - "cfg" Configuration clock 114 - "bus_master" Master AXI clock 115 - "bus_slave" Slave AXI clock 116 117- clock-names: 118 Usage: required for ipq8074 119 Value type: <stringlist> 120 Definition: Should contain the following entries 121 - "iface" PCIe to SysNOC BIU clock 122 - "axi_m" AXI Master clock 123 - "axi_s" AXI Slave clock 124 - "ahb" AHB clock 125 - "aux" Auxiliary clock 126 127- clock-names: 128 Usage: required for ipq6018 129 Value type: <stringlist> 130 Definition: Should contain the following entries 131 - "iface" PCIe to SysNOC BIU clock 132 - "axi_m" AXI Master clock 133 - "axi_s" AXI Slave clock 134 - "axi_bridge" AXI bridge clock 135 - "rchng" 136 137- clock-names: 138 Usage: required for qcs404 139 Value type: <stringlist> 140 Definition: Should contain the following entries 141 - "iface" AHB clock 142 - "aux" Auxiliary clock 143 - "master_bus" AXI Master clock 144 - "slave_bus" AXI Slave clock 145 146- clock-names: 147 Usage: required for sdm845 148 Value type: <stringlist> 149 Definition: Should contain the following entries 150 - "aux" Auxiliary clock 151 - "cfg" Configuration clock 152 - "bus_master" Master AXI clock 153 - "bus_slave" Slave AXI clock 154 - "slave_q2a" Slave Q2A clock 155 - "tbu" PCIe TBU clock 156 - "pipe" PIPE clock 157 158- clock-names: 159 Usage: required for sm8250 160 Value type: <stringlist> 161 Definition: Should contain the following entries 162 - "aux" Auxiliary clock 163 - "cfg" Configuration clock 164 - "bus_master" Master AXI clock 165 - "bus_slave" Slave AXI clock 166 - "slave_q2a" Slave Q2A clock 167 - "tbu" PCIe TBU clock 168 - "ddrss_sf_tbu" PCIe SF TBU clock 169 - "pipe" PIPE clock 170 171- resets: 172 Usage: required 173 Value type: <prop-encoded-array> 174 Definition: List of phandle and reset specifier pairs as listed 175 in reset-names property 176 177- reset-names: 178 Usage: required for ipq/apq8064 179 Value type: <stringlist> 180 Definition: Should contain the following entries 181 - "axi" AXI reset 182 - "ahb" AHB reset 183 - "por" POR reset 184 - "pci" PCI reset 185 - "phy" PHY reset 186 187- reset-names: 188 Usage: required for apq8084 189 Value type: <stringlist> 190 Definition: Should contain the following entries 191 - "core" Core reset 192 193- reset-names: 194 Usage: required for ipq/apq8064 195 Value type: <stringlist> 196 Definition: Should contain the following entries 197 - "axi_m" AXI master reset 198 - "axi_s" AXI slave reset 199 - "pipe" PIPE reset 200 - "axi_m_vmid" VMID reset 201 - "axi_s_xpu" XPU reset 202 - "parf" PARF reset 203 - "phy" PHY reset 204 - "axi_m_sticky" AXI sticky reset 205 - "pipe_sticky" PIPE sticky reset 206 - "pwr" PWR reset 207 - "ahb" AHB reset 208 - "phy_ahb" PHY AHB reset 209 - "ext" EXT reset 210 211- reset-names: 212 Usage: required for ipq8074 213 Value type: <stringlist> 214 Definition: Should contain the following entries 215 - "pipe" PIPE reset 216 - "sleep" Sleep reset 217 - "sticky" Core Sticky reset 218 - "axi_m" AXI Master reset 219 - "axi_s" AXI Slave reset 220 - "ahb" AHB Reset 221 - "axi_m_sticky" AXI Master Sticky reset 222 223- reset-names: 224 Usage: required for ipq6018 225 Value type: <stringlist> 226 Definition: Should contain the following entries 227 - "pipe" PIPE reset 228 - "sleep" Sleep reset 229 - "sticky" Core Sticky reset 230 - "axi_m" AXI Master reset 231 - "axi_s" AXI Slave reset 232 - "ahb" AHB Reset 233 - "axi_m_sticky" AXI Master Sticky reset 234 - "axi_s_sticky" AXI Slave Sticky reset 235 236- reset-names: 237 Usage: required for qcs404 238 Value type: <stringlist> 239 Definition: Should contain the following entries 240 - "axi_m" AXI Master reset 241 - "axi_s" AXI Slave reset 242 - "axi_m_sticky" AXI Master Sticky reset 243 - "pipe_sticky" PIPE sticky reset 244 - "pwr" PWR reset 245 - "ahb" AHB reset 246 247- reset-names: 248 Usage: required for sdm845 and sm8250 249 Value type: <stringlist> 250 Definition: Should contain the following entries 251 - "pci" PCIe core reset 252 253- power-domains: 254 Usage: required for apq8084 and msm8996/apq8096 255 Value type: <prop-encoded-array> 256 Definition: A phandle and power domain specifier pair to the 257 power domain which is responsible for collapsing 258 and restoring power to the peripheral 259 260- vdda-supply: 261 Usage: required 262 Value type: <phandle> 263 Definition: A phandle to the core analog power supply 264 265- vdda_phy-supply: 266 Usage: required for ipq/apq8064 267 Value type: <phandle> 268 Definition: A phandle to the analog power supply for PHY 269 270- vdda_refclk-supply: 271 Usage: required for ipq/apq8064 272 Value type: <phandle> 273 Definition: A phandle to the analog power supply for IC which generates 274 reference clock 275- vddpe-3v3-supply: 276 Usage: optional 277 Value type: <phandle> 278 Definition: A phandle to the PCIe endpoint power supply 279 280- phys: 281 Usage: required for apq8084 and qcs404 282 Value type: <phandle> 283 Definition: List of phandle(s) as listed in phy-names property 284 285- phy-names: 286 Usage: required for apq8084 and qcs404 287 Value type: <stringlist> 288 Definition: Should contain "pciephy" 289 290- <name>-gpios: 291 Usage: optional 292 Value type: <prop-encoded-array> 293 Definition: List of phandle and GPIO specifier pairs. Should contain 294 - "perst-gpios" PCIe endpoint reset signal line 295 - "wake-gpios" PCIe endpoint wake signal line 296 297* Example for ipq/apq8064 298 pcie@1b500000 { 299 compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064", "snps,dw-pcie"; 300 reg = <0x1b500000 0x1000 301 0x1b502000 0x80 302 0x1b600000 0x100 303 0x0ff00000 0x100000>; 304 reg-names = "dbi", "elbi", "parf", "config"; 305 device_type = "pci"; 306 linux,pci-domain = <0>; 307 bus-range = <0x00 0xff>; 308 num-lanes = <1>; 309 #address-cells = <3>; 310 #size-cells = <2>; 311 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */ 312 0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */ 313 interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>; 314 interrupt-names = "msi"; 315 #interrupt-cells = <1>; 316 interrupt-map-mask = <0 0 0 0x7>; 317 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 318 <0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 319 <0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 320 <0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 321 clocks = <&gcc PCIE_A_CLK>, 322 <&gcc PCIE_H_CLK>, 323 <&gcc PCIE_PHY_CLK>, 324 <&gcc PCIE_AUX_CLK>, 325 <&gcc PCIE_ALT_REF_CLK>; 326 clock-names = "core", "iface", "phy", "aux", "ref"; 327 resets = <&gcc PCIE_ACLK_RESET>, 328 <&gcc PCIE_HCLK_RESET>, 329 <&gcc PCIE_POR_RESET>, 330 <&gcc PCIE_PCI_RESET>, 331 <&gcc PCIE_PHY_RESET>, 332 <&gcc PCIE_EXT_RESET>; 333 reset-names = "axi", "ahb", "por", "pci", "phy", "ext"; 334 pinctrl-0 = <&pcie_pins_default>; 335 pinctrl-names = "default"; 336 }; 337 338* Example for apq8084 339 pcie0@fc520000 { 340 compatible = "qcom,pcie-apq8084", "snps,dw-pcie"; 341 reg = <0xfc520000 0x2000>, 342 <0xff000000 0x1000>, 343 <0xff001000 0x1000>, 344 <0xff002000 0x2000>; 345 reg-names = "parf", "dbi", "elbi", "config"; 346 device_type = "pci"; 347 linux,pci-domain = <0>; 348 bus-range = <0x00 0xff>; 349 num-lanes = <1>; 350 #address-cells = <3>; 351 #size-cells = <2>; 352 ranges = <0x81000000 0 0 0xff200000 0 0x00100000 /* I/O */ 353 0x82000000 0 0x00300000 0xff300000 0 0x00d00000>; /* memory */ 354 interrupts = <GIC_SPI 243 IRQ_TYPE_NONE>; 355 interrupt-names = "msi"; 356 #interrupt-cells = <1>; 357 interrupt-map-mask = <0 0 0 0x7>; 358 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>, /* int_a */ 359 <0 0 0 2 &intc 0 245 IRQ_TYPE_LEVEL_HIGH>, /* int_b */ 360 <0 0 0 3 &intc 0 247 IRQ_TYPE_LEVEL_HIGH>, /* int_c */ 361 <0 0 0 4 &intc 0 248 IRQ_TYPE_LEVEL_HIGH>; /* int_d */ 362 clocks = <&gcc GCC_PCIE_0_CFG_AHB_CLK>, 363 <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, 364 <&gcc GCC_PCIE_0_SLV_AXI_CLK>, 365 <&gcc GCC_PCIE_0_AUX_CLK>; 366 clock-names = "iface", "master_bus", "slave_bus", "aux"; 367 resets = <&gcc GCC_PCIE_0_BCR>; 368 reset-names = "core"; 369 power-domains = <&gcc PCIE0_GDSC>; 370 vdda-supply = <&pma8084_l3>; 371 phys = <&pciephy0>; 372 phy-names = "pciephy"; 373 perst-gpio = <&tlmm 70 GPIO_ACTIVE_LOW>; 374 pinctrl-0 = <&pcie0_pins_default>; 375 pinctrl-names = "default"; 376 }; 377