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1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: Qualcomm QMP PHY controller
9
10maintainers:
11  - Manu Gautam <mgautam@codeaurora.org>
12
13description:
14  QMP phy controller supports physical layer functionality for a number of
15  controllers on Qualcomm chipsets, such as, PCIe, UFS, and USB.
16
17properties:
18  compatible:
19    enum:
20      - qcom,ipq6018-qmp-pcie-phy
21      - qcom,ipq6018-qmp-usb3-phy
22      - qcom,ipq8074-qmp-pcie-phy
23      - qcom,ipq8074-qmp-usb3-phy
24      - qcom,msm8996-qmp-pcie-phy
25      - qcom,msm8996-qmp-ufs-phy
26      - qcom,msm8996-qmp-usb3-phy
27      - qcom,msm8998-qmp-pcie-phy
28      - qcom,msm8998-qmp-ufs-phy
29      - qcom,msm8998-qmp-usb3-phy
30      - qcom,sc7180-qmp-usb3-phy
31      - qcom,sc8180x-qmp-pcie-phy
32      - qcom,sc8180x-qmp-ufs-phy
33      - qcom,sc8180x-qmp-usb3-phy
34      - qcom,sdm845-qhp-pcie-phy
35      - qcom,sdm845-qmp-pcie-phy
36      - qcom,sdm845-qmp-ufs-phy
37      - qcom,sdm845-qmp-usb3-phy
38      - qcom,sdm845-qmp-usb3-uni-phy
39      - qcom,sm6115-qmp-ufs-phy
40      - qcom,sm8150-qmp-ufs-phy
41      - qcom,sm8150-qmp-usb3-phy
42      - qcom,sm8150-qmp-usb3-uni-phy
43      - qcom,sm8250-qmp-ufs-phy
44      - qcom,sm8250-qmp-gen3x1-pcie-phy
45      - qcom,sm8250-qmp-gen3x2-pcie-phy
46      - qcom,sm8250-qmp-modem-pcie-phy
47      - qcom,sm8250-qmp-usb3-phy
48      - qcom,sm8250-qmp-usb3-uni-phy
49      - qcom,sm8350-qmp-ufs-phy
50      - qcom,sm8350-qmp-usb3-phy
51      - qcom,sm8350-qmp-usb3-uni-phy
52      - qcom,sdx55-qmp-pcie-phy
53      - qcom,sdx55-qmp-usb3-uni-phy
54
55  reg:
56    minItems: 1
57    items:
58      - description: Address and length of PHY's common serdes block.
59      - description: Address and length of PHY's DP_COM control block.
60
61  "#clock-cells":
62    enum: [ 1, 2 ]
63
64  "#address-cells":
65    enum: [ 1, 2 ]
66
67  "#size-cells":
68    enum: [ 1, 2 ]
69
70  ranges: true
71
72  clocks:
73    minItems: 1
74    maxItems: 4
75
76  clock-names:
77    minItems: 1
78    maxItems: 4
79
80  resets:
81    minItems: 1
82    maxItems: 3
83
84  reset-names:
85    minItems: 1
86    maxItems: 3
87
88  vdda-phy-supply:
89    description:
90      Phandle to a regulator supply to PHY core block.
91
92  vdda-pll-supply:
93    description:
94      Phandle to 1.8V regulator supply to PHY refclk pll block.
95
96  vddp-ref-clk-supply:
97    description:
98      Phandle to a regulator supply to any specific refclk pll block.
99
100#Required nodes:
101patternProperties:
102  "^phy@[0-9a-f]+$":
103    type: object
104    description:
105      Each device node of QMP phy is required to have as many child nodes as
106      the number of lanes the PHY has.
107
108required:
109  - compatible
110  - reg
111  - "#clock-cells"
112  - "#address-cells"
113  - "#size-cells"
114  - ranges
115  - clocks
116  - clock-names
117  - resets
118  - reset-names
119  - vdda-phy-supply
120  - vdda-pll-supply
121
122additionalProperties: false
123
124allOf:
125  - if:
126      properties:
127        compatible:
128          contains:
129            enum:
130              - qcom,sdm845-qmp-usb3-uni-phy
131    then:
132      properties:
133        clocks:
134          items:
135            - description: Phy aux clock.
136            - description: Phy config clock.
137            - description: 19.2 MHz ref clk.
138            - description: Phy common block aux clock.
139        clock-names:
140          items:
141            - const: aux
142            - const: cfg_ahb
143            - const: ref
144            - const: com_aux
145        resets:
146          items:
147            - description: reset of phy block.
148            - description: phy common block reset.
149        reset-names:
150          items:
151            - const: phy
152            - const: common
153  - if:
154      properties:
155        compatible:
156          contains:
157            enum:
158              - qcom,sdx55-qmp-usb3-uni-phy
159    then:
160      properties:
161        clocks:
162          items:
163            - description: Phy aux clock.
164            - description: Phy config clock.
165            - description: 19.2 MHz ref clk.
166        clock-names:
167          items:
168            - const: aux
169            - const: cfg_ahb
170            - const: ref
171        resets:
172          items:
173            - description: reset of phy block.
174            - description: phy common block reset.
175        reset-names:
176          items:
177            - const: phy
178            - const: common
179  - if:
180      properties:
181        compatible:
182          contains:
183            enum:
184              - qcom,msm8996-qmp-pcie-phy
185    then:
186      properties:
187        clocks:
188          items:
189            - description: Phy aux clock.
190            - description: Phy config clock.
191            - description: 19.2 MHz ref clk.
192        clock-names:
193          items:
194            - const: aux
195            - const: cfg_ahb
196            - const: ref
197        resets:
198          items:
199            - description: reset of phy block.
200            - description: phy common block reset.
201            - description: phy's ahb cfg block reset.
202        reset-names:
203          items:
204            - const: phy
205            - const: common
206            - const: cfg
207  - if:
208      properties:
209        compatible:
210          contains:
211            enum:
212              - qcom,ipq8074-qmp-usb3-phy
213              - qcom,msm8996-qmp-usb3-phy
214              - qcom,msm8998-qmp-pcie-phy
215              - qcom,msm8998-qmp-usb3-phy
216    then:
217      properties:
218        clocks:
219          items:
220            - description: Phy aux clock.
221            - description: Phy config clock.
222            - description: 19.2 MHz ref clk.
223        clock-names:
224          items:
225            - const: aux
226            - const: cfg_ahb
227            - const: ref
228        resets:
229          items:
230            - description: reset of phy block.
231            - description: phy common block reset.
232        reset-names:
233          items:
234            - const: phy
235            - const: common
236  - if:
237      properties:
238        compatible:
239          contains:
240            enum:
241              - qcom,msm8996-qmp-ufs-phy
242    then:
243      properties:
244        clocks:
245          items:
246            - description: 19.2 MHz ref clk.
247        clock-names:
248          items:
249            - const: ref
250        resets:
251          items:
252            - description: PHY reset in the UFS controller.
253        reset-names:
254          items:
255            - const: ufsphy
256  - if:
257      properties:
258        compatible:
259          contains:
260            enum:
261              - qcom,msm8998-qmp-ufs-phy
262              - qcom,sdm845-qmp-ufs-phy
263              - qcom,sm8150-qmp-ufs-phy
264              - qcom,sm8250-qmp-ufs-phy
265    then:
266      properties:
267        clocks:
268          items:
269            - description: 19.2 MHz ref clk.
270            - description: Phy reference aux clock.
271        clock-names:
272          items:
273            - const: ref
274            - const: ref_aux
275        resets:
276          items:
277            - description: PHY reset in the UFS controller.
278        reset-names:
279          items:
280            - const: ufsphy
281  - if:
282      properties:
283        compatible:
284          contains:
285            enum:
286              - qcom,ipq8074-qmp-pcie-phy
287    then:
288      properties:
289        clocks:
290          items:
291            - description: pipe clk.
292        clock-names:
293          items:
294            - const: pipe_clk
295        resets:
296          items:
297            - description: reset of phy block.
298            - description: phy common block reset.
299        reset-names:
300          items:
301            - const: phy
302            - const: common
303  - if:
304      properties:
305        compatible:
306          contains:
307            enum:
308              - qcom,ipq6018-qmp-pcie-phy
309    then:
310      properties:
311        clocks:
312          items:
313            - description: Phy aux clock.
314            - description: Phy config clock.
315        clock-names:
316          items:
317            - const: aux
318            - const: cfg_ahb
319        resets:
320          items:
321            - description: reset of phy block.
322            - description: phy common block reset.
323        reset-names:
324          items:
325            - const: phy
326            - const: common
327  - if:
328      properties:
329        compatible:
330          contains:
331            enum:
332              - qcom,sc8180x-qmp-pcie-phy
333              - qcom,sdm845-qhp-pcie-phy
334              - qcom,sdm845-qmp-pcie-phy
335              - qcom,sdx55-qmp-pcie-phy
336              - qcom,sm8250-qmp-gen3x1-pcie-phy
337              - qcom,sm8250-qmp-gen3x2-pcie-phy
338              - qcom,sm8250-qmp-modem-pcie-phy
339    then:
340      properties:
341        clocks:
342          items:
343            - description: Phy aux clock.
344            - description: Phy config clock.
345            - description: 19.2 MHz ref clk.
346            - description: Phy refgen clk.
347        clock-names:
348          items:
349            - const: aux
350            - const: cfg_ahb
351            - const: ref
352            - const: refgen
353        resets:
354          items:
355            - description: reset of phy block.
356        reset-names:
357          items:
358            - const: phy
359  - if:
360      properties:
361        compatible:
362          contains:
363            enum:
364              - qcom,sm8150-qmp-usb3-phy
365              - qcom,sm8150-qmp-usb3-uni-phy
366              - qcom,sm8250-qmp-usb3-uni-phy
367              - qcom,sm8350-qmp-usb3-uni-phy
368    then:
369      properties:
370        clocks:
371          items:
372            - description: Phy aux clock.
373            - description: 19.2 MHz ref clk source.
374            - description: 19.2 MHz ref clk.
375            - description: Phy common block aux clock.
376        clock-names:
377          items:
378            - const: aux
379            - const: ref_clk_src
380            - const: ref
381            - const: com_aux
382        resets:
383          items:
384            - description: reset of phy block.
385            - description: phy common block reset.
386        reset-names:
387          items:
388            - const: phy
389            - const: common
390  - if:
391      properties:
392        compatible:
393          contains:
394            enum:
395              - qcom,sm8250-qmp-usb3-phy
396              - qcom,sm8350-qmp-usb3-phy
397    then:
398      properties:
399        clocks:
400          items:
401            - description: Phy aux clock.
402            - description: 19.2 MHz ref clk.
403            - description: Phy common block aux clock.
404        clock-names:
405          items:
406            - const: aux
407            - const: ref_clk_src
408            - const: com_aux
409        resets:
410          items:
411            - description: reset of phy block.
412            - description: phy common block reset.
413        reset-names:
414          items:
415            - const: phy
416            - const: common
417
418examples:
419  - |
420    #include <dt-bindings/clock/qcom,gcc-sdm845.h>
421    usb_2_qmpphy: phy-wrapper@88eb000 {
422        compatible = "qcom,sdm845-qmp-usb3-uni-phy";
423        reg = <0x088eb000 0x18c>;
424        #clock-cells = <1>;
425        #address-cells = <1>;
426        #size-cells = <1>;
427        ranges = <0x0 0x088eb000 0x2000>;
428
429        clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK >,
430                 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
431                 <&gcc GCC_USB3_SEC_CLKREF_CLK>,
432                 <&gcc GCC_USB3_SEC_PHY_COM_AUX_CLK>;
433        clock-names = "aux", "cfg_ahb", "ref", "com_aux";
434
435        resets = <&gcc GCC_USB3PHY_PHY_SEC_BCR>,
436                 <&gcc GCC_USB3_PHY_SEC_BCR>;
437        reset-names = "phy", "common";
438
439        vdda-phy-supply = <&vdda_usb2_ss_1p2>;
440        vdda-pll-supply = <&vdda_usb2_ss_core>;
441
442        usb_2_ssphy: phy@200 {
443                reg = <0x200 0x128>,
444                      <0x400 0x1fc>,
445                      <0x800 0x218>,
446                      <0x600 0x70>;
447                #clock-cells = <0>;
448                #phy-cells = <0>;
449                clocks = <&gcc GCC_USB3_SEC_PHY_PIPE_CLK>;
450                clock-names = "pipe0";
451                clock-output-names = "usb3_uni_phy_pipe_clk_src";
452            };
453        };
454