1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2020 MediaTek 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: MediaTek USB3 xHCI Device Tree Bindings 9 10maintainers: 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 12 13allOf: 14 - $ref: "usb-xhci.yaml" 15 16description: | 17 There are two scenarios: 18 case 1: only supports xHCI driver; 19 case 2: supports dual-role mode, and the host is based on xHCI driver. 20 21properties: 22 # common properties for both case 1 and case 2 23 compatible: 24 items: 25 - enum: 26 - mediatek,mt2701-xhci 27 - mediatek,mt2712-xhci 28 - mediatek,mt7622-xhci 29 - mediatek,mt7623-xhci 30 - mediatek,mt7629-xhci 31 - mediatek,mt8173-xhci 32 - mediatek,mt8183-xhci 33 - mediatek,mt8192-xhci 34 - mediatek,mt8195-xhci 35 - const: mediatek,mtk-xhci 36 37 reg: 38 minItems: 1 39 items: 40 - description: the registers of xHCI MAC 41 - description: the registers of IP Port Control 42 43 reg-names: 44 minItems: 1 45 items: 46 - const: mac 47 - const: ippc # optional, only needed for case 1. 48 49 interrupts: 50 description: 51 use "interrupts-extended" when the interrupts are connected to the 52 separate interrupt controllers 53 minItems: 1 54 items: 55 - description: xHCI host controller interrupt 56 - description: optional, wakeup interrupt used to support runtime PM 57 58 interrupt-names: 59 minItems: 1 60 items: 61 - const: host 62 - const: wakeup 63 64 power-domains: 65 description: A phandle to USB power domain node to control USB's MTCMOS 66 maxItems: 1 67 68 clocks: 69 minItems: 1 70 items: 71 - description: Controller clock used by normal mode 72 - description: Reference clock used by low power mode etc 73 - description: Mcu bus clock for register access 74 - description: DMA bus clock for data transfer 75 - description: controller clock 76 77 clock-names: 78 minItems: 1 79 items: 80 - const: sys_ck # required, the following ones are optional 81 - const: ref_ck 82 - const: mcu_ck 83 - const: dma_ck 84 - const: xhci_ck 85 86 assigned-clocks: 87 minItems: 1 88 maxItems: 5 89 90 assigned-clock-parents: 91 minItems: 1 92 maxItems: 5 93 94 phys: 95 description: 96 List of all PHYs used on this HCD, it's better to keep PHYs in order 97 as the hardware layout 98 minItems: 1 99 items: 100 - description: USB2/HS PHY # required, others are optional 101 - description: USB3/SS(P) PHY 102 - description: USB2/HS PHY 103 - description: USB3/SS(P) PHY 104 - description: USB2/HS PHY 105 - description: USB3/SS(P) PHY 106 - description: USB2/HS PHY 107 - description: USB3/SS(P) PHY 108 - description: USB2/HS PHY 109 110 vusb33-supply: 111 description: Regulator of USB AVDD3.3v 112 113 vbus-supply: 114 description: Regulator of USB VBUS5v 115 116 usb3-lpm-capable: true 117 118 usb2-lpm-disable: true 119 120 imod-interval-ns: 121 description: 122 Interrupt moderation interval value, it is 8 times as much as that 123 defined in the xHCI spec on MTK's controller. 124 default: 5000 125 126 # the following properties are only used for case 1 127 wakeup-source: 128 description: enable USB remote wakeup, see power/wakeup-source.txt 129 type: boolean 130 131 mediatek,syscon-wakeup: 132 $ref: /schemas/types.yaml#/definitions/phandle-array 133 maxItems: 1 134 description: 135 A phandle to syscon used to access the register of the USB wakeup glue 136 layer between xHCI and SPM, the field should always be 3 cells long. 137 items: 138 items: 139 - description: 140 The first cell represents a phandle to syscon 141 - description: 142 The second cell represents the register base address of the glue 143 layer in syscon 144 - description: | 145 The third cell represents the hardware version of the glue layer, 146 1 - used by mt8173 etc, revision 1 without following IPM rule; 147 2 - used by mt2712 etc, revision 2 following IPM rule; 148 101 - used by mt8183, specific 1.01; 149 102 - used by mt8192, specific 1.02; 150 enum: [1, 2, 101, 102] 151 152 mediatek,u3p-dis-msk: 153 $ref: /schemas/types.yaml#/definitions/uint32 154 description: The mask to disable u3ports, bit0 for u3port0, 155 bit1 for u3port1, ... etc 156 157 mediatek,u2p-dis-msk: 158 $ref: /schemas/types.yaml#/definitions/uint32 159 description: The mask to disable u2ports, bit0 for u2port0, 160 bit1 for u2port1, ... etc 161 162 "#address-cells": 163 const: 1 164 165 "#size-cells": 166 const: 0 167 168patternProperties: 169 "@[0-9a-f]{1}$": 170 type: object 171 description: The hard wired USB devices. 172 173dependencies: 174 wakeup-source: [ 'mediatek,syscon-wakeup' ] 175 176required: 177 - compatible 178 - reg 179 - reg-names 180 - interrupts 181 - clocks 182 - clock-names 183 184additionalProperties: false 185 186examples: 187 - | 188 #include <dt-bindings/clock/mt8173-clk.h> 189 #include <dt-bindings/interrupt-controller/arm-gic.h> 190 #include <dt-bindings/interrupt-controller/irq.h> 191 #include <dt-bindings/phy/phy.h> 192 #include <dt-bindings/power/mt8173-power.h> 193 194 usb@11270000 { 195 compatible = "mediatek,mt8173-xhci", "mediatek,mtk-xhci"; 196 reg = <0x11270000 0x1000>, <0x11280700 0x0100>; 197 reg-names = "mac", "ippc"; 198 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_LOW>; 199 power-domains = <&scpsys MT8173_POWER_DOMAIN_USB>; 200 clocks = <&topckgen CLK_TOP_USB30_SEL>, <&clk26m>; 201 clock-names = "sys_ck", "ref_ck"; 202 phys = <&u3port0 PHY_TYPE_USB3>, <&u2port1 PHY_TYPE_USB2>; 203 vusb33-supply = <&mt6397_vusb_reg>; 204 vbus-supply = <&usb_p1_vbus>; 205 imod-interval-ns = <10000>; 206 mediatek,syscon-wakeup = <&pericfg 0x400 1>; 207 wakeup-source; 208 usb3-lpm-capable; 209 }; 210... 211