1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the iWave-RZ/G1H Qseven board 4 * 5 * Copyright (C) 2020 Renesas Electronics Corp. 6 */ 7 8/* 9 * SSI-SGTL5000 10 * 11 * This command is required when Playback/Capture 12 * 13 * amixer set "DVC Out" 100% 14 * amixer set "DVC In" 100% 15 * 16 * You can use Mute 17 * 18 * amixer set "DVC Out Mute" on 19 * amixer set "DVC In Mute" on 20 * 21 * You can use Volume Ramp 22 * 23 * amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps" 24 * amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps" 25 * amixer set "DVC Out Ramp" on 26 * aplay xxx.wav & 27 * amixer set "DVC Out" 80% // Volume Down 28 * amixer set "DVC Out" 100% // Volume Up 29 */ 30 31/dts-v1/; 32#include "r8a7742-iwg21m.dtsi" 33#include <dt-bindings/pwm/pwm.h> 34 35/ { 36 model = "iWave Systems RainboW-G21D-Qseven board based on RZ/G1H"; 37 compatible = "iwave,g21d", "iwave,g21m", "renesas,r8a7742"; 38 39 aliases { 40 serial2 = &scifa2; 41 serial4 = &scifb2; 42 ethernet0 = &avb; 43 }; 44 45 chosen { 46 bootargs = "ignore_loglevel root=/dev/mmcblk0p1 rw rootwait"; 47 stdout-path = "serial2:115200n8"; 48 }; 49 50 audio_clock: audio_clock { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <26000000>; 54 }; 55 56 lcd_backlight: backlight { 57 compatible = "pwm-backlight"; 58 pwms = <&tpu 2 5000000 0>; 59 brightness-levels = <0 4 8 16 32 64 128 255>; 60 pinctrl-0 = <&backlight_pins>; 61 pinctrl-names = "default"; 62 default-brightness-level = <7>; 63 enable-gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>; 64 }; 65 66 leds { 67 compatible = "gpio-leds"; 68 69 sdhi2_led { 70 label = "sdio-led"; 71 gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; 72 linux,default-trigger = "mmc1"; 73 }; 74 }; 75 76 lvds-receiver { 77 compatible = "ti,ds90cf384a", "lvds-decoder"; 78 power-supply = <&vcc_3v3_tft1>; 79 80 ports { 81 #address-cells = <1>; 82 #size-cells = <0>; 83 84 port@0 { 85 reg = <0>; 86 lvds_receiver_in: endpoint { 87 remote-endpoint = <&lvds0_out>; 88 }; 89 }; 90 port@1 { 91 reg = <1>; 92 lvds_receiver_out: endpoint { 93 remote-endpoint = <&panel_in>; 94 }; 95 }; 96 }; 97 }; 98 99 panel { 100 compatible = "edt,etm0700g0dh6"; 101 backlight = <&lcd_backlight>; 102 power-supply = <&vcc_3v3_tft1>; 103 104 port { 105 panel_in: endpoint { 106 remote-endpoint = <&lvds_receiver_out>; 107 }; 108 }; 109 }; 110 111 reg_1p5v: 1p5v { 112 compatible = "regulator-fixed"; 113 regulator-name = "1P5V"; 114 regulator-min-microvolt = <1500000>; 115 regulator-max-microvolt = <1500000>; 116 regulator-always-on; 117 }; 118 119 rsnd_sgtl5000: sound { 120 compatible = "simple-audio-card"; 121 simple-audio-card,format = "i2s"; 122 simple-audio-card,bitclock-master = <&sndcodec>; 123 simple-audio-card,frame-master = <&sndcodec>; 124 125 sndcpu: simple-audio-card,cpu { 126 sound-dai = <&rcar_sound>; 127 }; 128 129 sndcodec: simple-audio-card,codec { 130 sound-dai = <&sgtl5000>; 131 }; 132 }; 133 134 vcc_3v3_tft1: regulator-panel { 135 compatible = "regulator-fixed"; 136 137 regulator-name = "vcc-3v3-tft1"; 138 regulator-min-microvolt = <3300000>; 139 regulator-max-microvolt = <3300000>; 140 enable-active-high; 141 startup-delay-us = <500>; 142 gpio = <&gpio5 28 GPIO_ACTIVE_HIGH>; 143 }; 144 145 vcc_sdhi2: regulator-vcc-sdhi2 { 146 compatible = "regulator-fixed"; 147 148 regulator-name = "SDHI2 Vcc"; 149 regulator-min-microvolt = <3300000>; 150 regulator-max-microvolt = <3300000>; 151 152 gpio = <&gpio1 27 GPIO_ACTIVE_LOW>; 153 }; 154 155 vccq_sdhi2: regulator-vccq-sdhi2 { 156 compatible = "regulator-gpio"; 157 158 regulator-name = "SDHI2 VccQ"; 159 regulator-min-microvolt = <1800000>; 160 regulator-max-microvolt = <3300000>; 161 162 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 163 gpios-states = <1>; 164 states = <3300000 1>, <1800000 0>; 165 }; 166}; 167 168&avb { 169 pinctrl-0 = <&avb_pins>; 170 pinctrl-names = "default"; 171 172 phy-handle = <&phy3>; 173 phy-mode = "gmii"; 174 renesas,no-ether-link; 175 status = "okay"; 176 177 phy3: ethernet-phy@3 { 178 reg = <3>; 179 micrel,led-mode = <1>; 180 }; 181}; 182 183&i2c2 { 184 pinctrl-0 = <&i2c2_pins>; 185 pinctrl-names = "default"; 186 187 status = "okay"; 188 clock-frequency = <400000>; 189 190 sgtl5000: codec@a { 191 compatible = "fsl,sgtl5000"; 192 #sound-dai-cells = <0>; 193 reg = <0x0a>; 194 clocks = <&audio_clock>; 195 VDDA-supply = <®_3p3v>; 196 VDDIO-supply = <®_3p3v>; 197 VDDD-supply = <®_1p5v>; 198 }; 199 200 touch: touchpanel@38 { 201 compatible = "edt,edt-ft5406"; 202 reg = <0x38>; 203 interrupt-parent = <&gpio0>; 204 interrupts = <24 IRQ_TYPE_EDGE_FALLING>; 205 /* GP1_29 is also shared with audio codec reset pin */ 206 reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 207 vcc-supply = <&vcc_3v3_tft1>; 208 }; 209}; 210 211&can1 { 212 pinctrl-0 = <&can1_pins>; 213 pinctrl-names = "default"; 214 215 status = "okay"; 216}; 217 218&cmt0 { 219 status = "okay"; 220}; 221 222&du { 223 status = "okay"; 224}; 225 226&gpio0 { 227 touch-interrupt { 228 gpio-hog; 229 gpios = <24 GPIO_ACTIVE_LOW>; 230 input; 231 }; 232}; 233 234&gpio1 { 235 can-trx-en-gpio{ 236 gpio-hog; 237 gpios = <28 GPIO_ACTIVE_HIGH>; 238 output-low; 239 line-name = "can-trx-en-gpio"; 240 }; 241}; 242 243&hsusb { 244 pinctrl-0 = <&usb0_pins>; 245 pinctrl-names = "default"; 246 status = "okay"; 247}; 248 249&lvds0 { 250 status = "okay"; 251 ports { 252 port@1 { 253 lvds0_out: endpoint { 254 remote-endpoint = <&lvds_receiver_in>; 255 }; 256 }; 257 }; 258}; 259 260&msiof0 { 261 pinctrl-0 = <&msiof0_pins>; 262 pinctrl-names = "default"; 263 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 264 265 status = "okay"; 266 267 flash1: flash@0 { 268 compatible = "sst,sst25vf016b", "jedec,spi-nor"; 269 reg = <0>; 270 spi-max-frequency = <50000000>; 271 m25p,fast-read; 272 273 partitions { 274 compatible = "fixed-partitions"; 275 #address-cells = <1>; 276 #size-cells = <1>; 277 278 partition@0 { 279 label = "user"; 280 reg = <0x00000000 0x00200000>; 281 }; 282 }; 283 }; 284}; 285 286&pci0 { 287 pinctrl-0 = <&usb0_pins>; 288 pinctrl-names = "default"; 289 /* Disable hsusb to enable USB2.0 host mode support on J2 */ 290 /* status = "okay"; */ 291}; 292 293&pci1 { 294 pinctrl-0 = <&usb1_pins>; 295 pinctrl-names = "default"; 296 status = "okay"; 297}; 298 299&pci2 { 300 /* Disable xhci to enable USB2.0 host mode support on J23 bottom port */ 301 /* status = "okay"; */ 302}; 303 304&pcie_bus_clk { 305 clock-frequency = <100000000>; 306}; 307 308&pciec { 309 /* SW2[6] determines which connector is activated 310 * ON = PCIe X4 (connector-J7) 311 * OFF = mini-PCIe (connector-J26) 312 */ 313 status = "okay"; 314}; 315 316&pfc { 317 avb_pins: avb { 318 groups = "avb_mdio", "avb_gmii"; 319 function = "avb"; 320 }; 321 322 backlight_pins: backlight { 323 groups = "tpu0_to2"; 324 function = "tpu0"; 325 }; 326 327 can1_pins: can1 { 328 groups = "can1_data_b"; 329 function = "can1"; 330 }; 331 332 i2c2_pins: i2c2 { 333 groups = "i2c2_b"; 334 function = "i2c2"; 335 }; 336 337 msiof0_pins: msiof0 { 338 groups = "msiof0_clk", "msiof0_sync", "msiof0_tx", "msiof0_rx"; 339 function = "msiof0"; 340 }; 341 342 scifa2_pins: scifa2 { 343 groups = "scifa2_data_c"; 344 function = "scifa2"; 345 }; 346 347 scifb2_pins: scifb2 { 348 groups = "scifb2_data", "scifb2_ctrl"; 349 function = "scifb2"; 350 }; 351 352 sdhi2_pins: sd2 { 353 groups = "sdhi2_data4", "sdhi2_ctrl"; 354 function = "sdhi2"; 355 power-source = <3300>; 356 }; 357 358 sdhi2_pins_uhs: sd2_uhs { 359 groups = "sdhi2_data4", "sdhi2_ctrl"; 360 function = "sdhi2"; 361 power-source = <1800>; 362 }; 363 364 sound_pins: sound { 365 groups = "ssi34_ctrl", "ssi3_data", "ssi4_data"; 366 function = "ssi"; 367 }; 368 369 usb0_pins: usb0 { 370 groups = "usb0"; 371 function = "usb0"; 372 }; 373 374 usb1_pins: usb1 { 375 groups = "usb1_pwen"; 376 function = "usb1"; 377 }; 378}; 379 380&rcar_sound { 381 pinctrl-0 = <&sound_pins>; 382 pinctrl-names = "default"; 383 status = "okay"; 384 385 /* Single DAI */ 386 #sound-dai-cells = <0>; 387 388 rcar_sound,dai { 389 dai0 { 390 playback = <&ssi4>, <&src4>, <&dvc1>; 391 capture = <&ssi3>, <&src3>, <&dvc0>; 392 }; 393 }; 394}; 395 396&rwdt { 397 timeout-sec = <60>; 398 status = "okay"; 399}; 400 401&scifa2 { 402 pinctrl-0 = <&scifa2_pins>; 403 pinctrl-names = "default"; 404 405 status = "okay"; 406}; 407 408&scifb2 { 409 pinctrl-0 = <&scifb2_pins>; 410 pinctrl-names = "default"; 411 412 uart-has-rtscts; 413 status = "okay"; 414}; 415 416&sdhi2 { 417 pinctrl-0 = <&sdhi2_pins>; 418 pinctrl-1 = <&sdhi2_pins_uhs>; 419 pinctrl-names = "default", "state_uhs"; 420 421 vmmc-supply = <&vcc_sdhi2>; 422 vqmmc-supply = <&vccq_sdhi2>; 423 cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; 424 wp-gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>; 425 sd-uhs-sdr50; 426 status = "okay"; 427}; 428 429&ssi4 { 430 shared-pin; 431}; 432 433&tpu { 434 status = "okay"; 435}; 436 437&usbphy { 438 status = "okay"; 439}; 440 441&xhci { 442 status = "okay"; 443}; 444