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1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * TI DaVinci DM646X EVM board
4  *
5  * Derived from: arch/arm/mach-davinci/board-evm.c
6  * Copyright (C) 2006 Texas Instruments.
7  *
8  * (C) 2007-2008, MontaVista Software, Inc.
9  */
10 
11 /**************************************************************************
12  * Included Files
13  **************************************************************************/
14 
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/leds.h>
18 #include <linux/gpio.h>
19 #include <linux/platform_device.h>
20 #include <linux/i2c.h>
21 #include <linux/property.h>
22 #include <linux/platform_data/pcf857x.h>
23 #include <linux/platform_data/ti-aemif.h>
24 
25 #include <media/i2c/tvp514x.h>
26 #include <media/i2c/adv7343.h>
27 
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/rawnand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/nvmem-provider.h>
32 #include <linux/clk.h>
33 #include <linux/export.h>
34 #include <linux/platform_data/gpio-davinci.h>
35 #include <linux/platform_data/i2c-davinci.h>
36 #include <linux/platform_data/mtd-davinci.h>
37 #include <linux/platform_data/mtd-davinci-aemif.h>
38 
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 
42 #include <mach/common.h>
43 #include <mach/serial.h>
44 
45 #include "davinci.h"
46 #include "irqs.h"
47 
48 #define NAND_BLOCK_SIZE		SZ_128K
49 
50 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
51  * and U-Boot environment this avoids dependency on any particular combination
52  * of UBL, U-Boot or flashing tools etc.
53  */
54 static struct mtd_partition davinci_nand_partitions[] = {
55 	{
56 		/* UBL, U-Boot with environment */
57 		.name		= "bootloader",
58 		.offset		= MTDPART_OFS_APPEND,
59 		.size		= 16 * NAND_BLOCK_SIZE,
60 		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
61 	}, {
62 		.name		= "kernel",
63 		.offset		= MTDPART_OFS_APPEND,
64 		.size		= SZ_4M,
65 		.mask_flags	= 0,
66 	}, {
67 		.name		= "filesystem",
68 		.offset		= MTDPART_OFS_APPEND,
69 		.size		= MTDPART_SIZ_FULL,
70 		.mask_flags	= 0,
71 	}
72 };
73 
74 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
75 	.wsetup		= 29,
76 	.wstrobe	= 24,
77 	.whold		= 14,
78 	.rsetup		= 19,
79 	.rstrobe	= 33,
80 	.rhold		= 0,
81 	.ta		= 29,
82 };
83 
84 static struct davinci_nand_pdata davinci_nand_data = {
85 	.core_chipsel		= 0,
86 	.mask_cle 		= 0x80000,
87 	.mask_ale 		= 0x40000,
88 	.parts			= davinci_nand_partitions,
89 	.nr_parts		= ARRAY_SIZE(davinci_nand_partitions),
90 	.engine_type		= NAND_ECC_ENGINE_TYPE_ON_HOST,
91 	.ecc_bits		= 1,
92 	.options		= 0,
93 };
94 
95 static struct resource davinci_nand_resources[] = {
96 	{
97 		.start		= DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
98 		.end		= DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
99 		.flags		= IORESOURCE_MEM,
100 	}, {
101 		.start		= DM646X_ASYNC_EMIF_CONTROL_BASE,
102 		.end		= DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
103 		.flags		= IORESOURCE_MEM,
104 	},
105 };
106 
107 static struct platform_device davinci_aemif_devices[] = {
108 	{
109 		.name		= "davinci_nand",
110 		.id		= 0,
111 		.num_resources	= ARRAY_SIZE(davinci_nand_resources),
112 		.resource	= davinci_nand_resources,
113 		.dev		= {
114 			.platform_data	= &davinci_nand_data,
115 		},
116 	},
117 };
118 
119 static struct resource davinci_aemif_resources[] = {
120 	{
121 		.start	= DM646X_ASYNC_EMIF_CONTROL_BASE,
122 		.end	= DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
123 		.flags	= IORESOURCE_MEM,
124 	},
125 };
126 
127 static struct aemif_abus_data davinci_aemif_abus_data[] = {
128 	{
129 		.cs	= 1,
130 	},
131 };
132 
133 static struct aemif_platform_data davinci_aemif_pdata = {
134 	.abus_data		= davinci_aemif_abus_data,
135 	.num_abus_data		= ARRAY_SIZE(davinci_aemif_abus_data),
136 	.sub_devices		= davinci_aemif_devices,
137 	.num_sub_devices	= ARRAY_SIZE(davinci_aemif_devices),
138 };
139 
140 static struct platform_device davinci_aemif_device = {
141 	.name		= "ti-aemif",
142 	.id		= -1,
143 	.dev = {
144 		.platform_data	= &davinci_aemif_pdata,
145 	},
146 	.resource	= davinci_aemif_resources,
147 	.num_resources	= ARRAY_SIZE(davinci_aemif_resources),
148 };
149 
150 #define HAS_ATA		(IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
151 			 IS_ENABLED(CONFIG_PATA_BK3710))
152 
153 #ifdef CONFIG_I2C
154 /* CPLD Register 0 bits to control ATA */
155 #define DM646X_EVM_ATA_RST		BIT(0)
156 #define DM646X_EVM_ATA_PWD		BIT(1)
157 
158 /* CPLD Register 0 Client: used for I/O Control */
cpld_reg0_probe(struct i2c_client * client)159 static int cpld_reg0_probe(struct i2c_client *client)
160 {
161 	if (HAS_ATA) {
162 		u8 data;
163 		struct i2c_msg msg[2] = {
164 			{
165 				.addr = client->addr,
166 				.flags = I2C_M_RD,
167 				.len = 1,
168 				.buf = &data,
169 			},
170 			{
171 				.addr = client->addr,
172 				.flags = 0,
173 				.len = 1,
174 				.buf = &data,
175 			},
176 		};
177 
178 		/* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
179 		i2c_transfer(client->adapter, msg, 1);
180 		data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
181 		i2c_transfer(client->adapter, msg + 1, 1);
182 	}
183 
184 	return 0;
185 }
186 
187 static const struct i2c_device_id cpld_reg_ids[] = {
188 	{ "cpld_reg0", 0, },
189 	{ },
190 };
191 
192 static struct i2c_driver dm6467evm_cpld_driver = {
193 	.driver.name	= "cpld_reg0",
194 	.id_table	= cpld_reg_ids,
195 	.probe_new	= cpld_reg0_probe,
196 };
197 
198 /* LEDS */
199 
200 static struct gpio_led evm_leds[] = {
201 	{ .name = "DS1", .active_low = 1, },
202 	{ .name = "DS2", .active_low = 1, },
203 	{ .name = "DS3", .active_low = 1, },
204 	{ .name = "DS4", .active_low = 1, },
205 };
206 
207 static const struct gpio_led_platform_data evm_led_data = {
208 	.num_leds = ARRAY_SIZE(evm_leds),
209 	.leds     = evm_leds,
210 };
211 
212 static struct platform_device *evm_led_dev;
213 
evm_led_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)214 static int evm_led_setup(struct i2c_client *client, int gpio,
215 			unsigned int ngpio, void *c)
216 {
217 	struct gpio_led *leds = evm_leds;
218 	int status;
219 
220 	while (ngpio--) {
221 		leds->gpio = gpio++;
222 		leds++;
223 	}
224 
225 	evm_led_dev = platform_device_alloc("leds-gpio", 0);
226 	platform_device_add_data(evm_led_dev, &evm_led_data,
227 				sizeof(evm_led_data));
228 
229 	evm_led_dev->dev.parent = &client->dev;
230 	status = platform_device_add(evm_led_dev);
231 	if (status < 0) {
232 		platform_device_put(evm_led_dev);
233 		evm_led_dev = NULL;
234 	}
235 	return status;
236 }
237 
evm_led_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)238 static int evm_led_teardown(struct i2c_client *client, int gpio,
239 				unsigned ngpio, void *c)
240 {
241 	if (evm_led_dev) {
242 		platform_device_unregister(evm_led_dev);
243 		evm_led_dev = NULL;
244 	}
245 	return 0;
246 }
247 
248 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
249 
evm_sw_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)250 static int evm_sw_setup(struct i2c_client *client, int gpio,
251 			unsigned ngpio, void *c)
252 {
253 	int status;
254 	int i;
255 	char label[10];
256 
257 	for (i = 0; i < 4; ++i) {
258 		snprintf(label, 10, "user_sw%d", i);
259 		status = gpio_request(gpio, label);
260 		if (status)
261 			goto out_free;
262 		evm_sw_gpio[i] = gpio++;
263 
264 		status = gpio_direction_input(evm_sw_gpio[i]);
265 		if (status)
266 			goto out_free;
267 
268 		status = gpio_export(evm_sw_gpio[i], 0);
269 		if (status)
270 			goto out_free;
271 	}
272 	return 0;
273 
274 out_free:
275 	for (i = 0; i < 4; ++i) {
276 		if (evm_sw_gpio[i] != -EINVAL) {
277 			gpio_free(evm_sw_gpio[i]);
278 			evm_sw_gpio[i] = -EINVAL;
279 		}
280 	}
281 	return status;
282 }
283 
evm_sw_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)284 static int evm_sw_teardown(struct i2c_client *client, int gpio,
285 			unsigned ngpio, void *c)
286 {
287 	int i;
288 
289 	for (i = 0; i < 4; ++i) {
290 		if (evm_sw_gpio[i] != -EINVAL) {
291 			gpio_unexport(evm_sw_gpio[i]);
292 			gpio_free(evm_sw_gpio[i]);
293 			evm_sw_gpio[i] = -EINVAL;
294 		}
295 	}
296 	return 0;
297 }
298 
evm_pcf_setup(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)299 static int evm_pcf_setup(struct i2c_client *client, int gpio,
300 			unsigned int ngpio, void *c)
301 {
302 	int status;
303 
304 	if (ngpio < 8)
305 		return -EINVAL;
306 
307 	status = evm_sw_setup(client, gpio, 4, c);
308 	if (status)
309 		return status;
310 
311 	return evm_led_setup(client, gpio+4, 4, c);
312 }
313 
evm_pcf_teardown(struct i2c_client * client,int gpio,unsigned int ngpio,void * c)314 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
315 			unsigned int ngpio, void *c)
316 {
317 	BUG_ON(ngpio < 8);
318 
319 	evm_sw_teardown(client, gpio, 4, c);
320 	evm_led_teardown(client, gpio+4, 4, c);
321 
322 	return 0;
323 }
324 
325 static struct pcf857x_platform_data pcf_data = {
326 	.gpio_base	= DAVINCI_N_GPIO+1,
327 	.setup		= evm_pcf_setup,
328 	.teardown	= evm_pcf_teardown,
329 };
330 
331 /* Most of this EEPROM is unused, but U-Boot uses some data:
332  *  - 0x7f00, 6 bytes Ethernet Address
333  *  - ... newer boards may have more
334  */
335 
336 static struct nvmem_cell_info dm646x_evm_nvmem_cells[] = {
337 	{
338 		.name		= "macaddr",
339 		.offset		= 0x7f00,
340 		.bytes		= ETH_ALEN,
341 	}
342 };
343 
344 static struct nvmem_cell_table dm646x_evm_nvmem_cell_table = {
345 	.nvmem_name	= "1-00500",
346 	.cells		= dm646x_evm_nvmem_cells,
347 	.ncells		= ARRAY_SIZE(dm646x_evm_nvmem_cells),
348 };
349 
350 static struct nvmem_cell_lookup dm646x_evm_nvmem_cell_lookup = {
351 	.nvmem_name	= "1-00500",
352 	.cell_name	= "macaddr",
353 	.dev_id		= "davinci_emac.1",
354 	.con_id		= "mac-address",
355 };
356 
357 static const struct property_entry eeprom_properties[] = {
358 	PROPERTY_ENTRY_U32("pagesize", 64),
359 	{ }
360 };
361 
362 static const struct software_node eeprom_node = {
363 	.properties = eeprom_properties,
364 };
365 #endif
366 
367 static u8 dm646x_iis_serializer_direction[] = {
368        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
369 };
370 
371 static u8 dm646x_dit_serializer_direction[] = {
372        TX_MODE,
373 };
374 
375 static struct snd_platform_data dm646x_evm_snd_data[] = {
376 	{
377 		.tx_dma_offset  = 0x400,
378 		.rx_dma_offset  = 0x400,
379 		.op_mode        = DAVINCI_MCASP_IIS_MODE,
380 		.num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
381 		.tdm_slots      = 2,
382 		.serial_dir     = dm646x_iis_serializer_direction,
383 		.asp_chan_q     = EVENTQ_0,
384 	},
385 	{
386 		.tx_dma_offset  = 0x400,
387 		.rx_dma_offset  = 0,
388 		.op_mode        = DAVINCI_MCASP_DIT_MODE,
389 		.num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
390 		.tdm_slots      = 32,
391 		.serial_dir     = dm646x_dit_serializer_direction,
392 		.asp_chan_q     = EVENTQ_0,
393 	},
394 };
395 
396 #ifdef CONFIG_I2C
397 static struct i2c_client *cpld_client;
398 
cpld_video_probe(struct i2c_client * client)399 static int cpld_video_probe(struct i2c_client *client)
400 {
401 	cpld_client = client;
402 	return 0;
403 }
404 
cpld_video_remove(struct i2c_client * client)405 static int cpld_video_remove(struct i2c_client *client)
406 {
407 	cpld_client = NULL;
408 	return 0;
409 }
410 
411 static const struct i2c_device_id cpld_video_id[] = {
412 	{ "cpld_video", 0 },
413 	{ }
414 };
415 
416 static struct i2c_driver cpld_video_driver = {
417 	.driver = {
418 		.name	= "cpld_video",
419 	},
420 	.probe_new	= cpld_video_probe,
421 	.remove		= cpld_video_remove,
422 	.id_table	= cpld_video_id,
423 };
424 
evm_init_cpld(void)425 static void evm_init_cpld(void)
426 {
427 	i2c_add_driver(&cpld_video_driver);
428 }
429 
430 static struct i2c_board_info __initdata i2c_info[] =  {
431 	{
432 		I2C_BOARD_INFO("24c256", 0x50),
433 		.swnode = &eeprom_node,
434 	},
435 	{
436 		I2C_BOARD_INFO("pcf8574a", 0x38),
437 		.platform_data	= &pcf_data,
438 	},
439 	{
440 		I2C_BOARD_INFO("cpld_reg0", 0x3a),
441 	},
442 	{
443 		I2C_BOARD_INFO("tlv320aic33", 0x18),
444 	},
445 	{
446 		I2C_BOARD_INFO("cpld_video", 0x3b),
447 	},
448 };
449 
450 static struct davinci_i2c_platform_data i2c_pdata = {
451 	.bus_freq       = 100 /* kHz */,
452 	.bus_delay      = 0 /* usec */,
453 };
454 
455 #define VCH2CLK_MASK		(BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
456 #define VCH2CLK_SYSCLK8		(BIT(9))
457 #define VCH2CLK_AUXCLK		(BIT(9) | BIT(8))
458 #define VCH3CLK_MASK		(BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
459 #define VCH3CLK_SYSCLK8		(BIT(13))
460 #define VCH3CLK_AUXCLK		(BIT(14) | BIT(13))
461 
462 #define VIDCH2CLK		(BIT(10))
463 #define VIDCH3CLK		(BIT(11))
464 #define VIDCH1CLK		(BIT(4))
465 #define TVP7002_INPUT		(BIT(4))
466 #define TVP5147_INPUT		(~BIT(4))
467 #define VPIF_INPUT_ONE_CHANNEL	(BIT(5))
468 #define VPIF_INPUT_TWO_CHANNEL	(~BIT(5))
469 #define TVP5147_CH0		"tvp514x-0"
470 #define TVP5147_CH1		"tvp514x-1"
471 
472 /* spin lock for updating above registers */
473 static spinlock_t vpif_reg_lock;
474 
set_vpif_clock(int mux_mode,int hd)475 static int set_vpif_clock(int mux_mode, int hd)
476 {
477 	unsigned long flags;
478 	unsigned int value;
479 	int val = 0;
480 	int err = 0;
481 
482 	if (!cpld_client)
483 		return -ENXIO;
484 
485 	/* disable the clock */
486 	spin_lock_irqsave(&vpif_reg_lock, flags);
487 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
488 	value |= (VIDCH3CLK | VIDCH2CLK);
489 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
490 	spin_unlock_irqrestore(&vpif_reg_lock, flags);
491 
492 	val = i2c_smbus_read_byte(cpld_client);
493 	if (val < 0)
494 		return val;
495 
496 	if (mux_mode == 1)
497 		val &= ~0x40;
498 	else
499 		val |= 0x40;
500 
501 	err = i2c_smbus_write_byte(cpld_client, val);
502 	if (err)
503 		return err;
504 
505 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
506 	value &= ~(VCH2CLK_MASK);
507 	value &= ~(VCH3CLK_MASK);
508 
509 	if (hd >= 1)
510 		value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
511 	else
512 		value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
513 
514 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
515 
516 	spin_lock_irqsave(&vpif_reg_lock, flags);
517 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
518 	/* enable the clock */
519 	value &= ~(VIDCH3CLK | VIDCH2CLK);
520 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
521 	spin_unlock_irqrestore(&vpif_reg_lock, flags);
522 
523 	return 0;
524 }
525 
526 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
527 	{
528 		.name	= "adv7343",
529 		.board_info = {
530 			I2C_BOARD_INFO("adv7343", 0x2a),
531 		},
532 	},
533 	{
534 		.name	= "ths7303",
535 		.board_info = {
536 			I2C_BOARD_INFO("ths7303", 0x2c),
537 		},
538 	},
539 };
540 
541 static const struct vpif_output dm6467_ch0_outputs[] = {
542 	{
543 		.output = {
544 			.index = 0,
545 			.name = "Composite",
546 			.type = V4L2_OUTPUT_TYPE_ANALOG,
547 			.capabilities = V4L2_OUT_CAP_STD,
548 			.std = V4L2_STD_ALL,
549 		},
550 		.subdev_name = "adv7343",
551 		.output_route = ADV7343_COMPOSITE_ID,
552 	},
553 	{
554 		.output = {
555 			.index = 1,
556 			.name = "Component",
557 			.type = V4L2_OUTPUT_TYPE_ANALOG,
558 			.capabilities = V4L2_OUT_CAP_DV_TIMINGS,
559 		},
560 		.subdev_name = "adv7343",
561 		.output_route = ADV7343_COMPONENT_ID,
562 	},
563 	{
564 		.output = {
565 			.index = 2,
566 			.name = "S-Video",
567 			.type = V4L2_OUTPUT_TYPE_ANALOG,
568 			.capabilities = V4L2_OUT_CAP_STD,
569 			.std = V4L2_STD_ALL,
570 		},
571 		.subdev_name = "adv7343",
572 		.output_route = ADV7343_SVIDEO_ID,
573 	},
574 };
575 
576 static struct vpif_display_config dm646x_vpif_display_config = {
577 	.set_clock	= set_vpif_clock,
578 	.subdevinfo	= dm646x_vpif_subdev,
579 	.subdev_count	= ARRAY_SIZE(dm646x_vpif_subdev),
580 	.i2c_adapter_id = 1,
581 	.chan_config[0] = {
582 		.outputs = dm6467_ch0_outputs,
583 		.output_count = ARRAY_SIZE(dm6467_ch0_outputs),
584 	},
585 	.card_name	= "DM646x EVM Video Display",
586 };
587 
588 /**
589  * setup_vpif_input_path()
590  * @channel: channel id (0 - CH0, 1 - CH1)
591  * @sub_dev_name: ptr sub device name
592  *
593  * This will set vpif input to capture data from tvp514x or
594  * tvp7002.
595  */
setup_vpif_input_path(int channel,const char * sub_dev_name)596 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
597 {
598 	int err = 0;
599 	int val;
600 
601 	/* for channel 1, we don't do anything */
602 	if (channel != 0)
603 		return 0;
604 
605 	if (!cpld_client)
606 		return -ENXIO;
607 
608 	val = i2c_smbus_read_byte(cpld_client);
609 	if (val < 0)
610 		return val;
611 
612 	if (!strcmp(sub_dev_name, TVP5147_CH0) ||
613 	    !strcmp(sub_dev_name, TVP5147_CH1))
614 		val &= TVP5147_INPUT;
615 	else
616 		val |= TVP7002_INPUT;
617 
618 	err = i2c_smbus_write_byte(cpld_client, val);
619 	if (err)
620 		return err;
621 	return 0;
622 }
623 
624 /**
625  * setup_vpif_input_channel_mode()
626  * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
627  *
628  * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
629  */
setup_vpif_input_channel_mode(int mux_mode)630 static int setup_vpif_input_channel_mode(int mux_mode)
631 {
632 	unsigned long flags;
633 	int err = 0;
634 	int val;
635 	u32 value;
636 
637 	if (!cpld_client)
638 		return -ENXIO;
639 
640 	val = i2c_smbus_read_byte(cpld_client);
641 	if (val < 0)
642 		return val;
643 
644 	spin_lock_irqsave(&vpif_reg_lock, flags);
645 	value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
646 	if (mux_mode) {
647 		val &= VPIF_INPUT_TWO_CHANNEL;
648 		value |= VIDCH1CLK;
649 	} else {
650 		val |= VPIF_INPUT_ONE_CHANNEL;
651 		value &= ~VIDCH1CLK;
652 	}
653 	__raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
654 	spin_unlock_irqrestore(&vpif_reg_lock, flags);
655 
656 	err = i2c_smbus_write_byte(cpld_client, val);
657 	if (err)
658 		return err;
659 
660 	return 0;
661 }
662 
663 static struct tvp514x_platform_data tvp5146_pdata = {
664 	.clk_polarity = 0,
665 	.hs_polarity = 1,
666 	.vs_polarity = 1
667 };
668 
669 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
670 
671 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
672 	{
673 		.name	= TVP5147_CH0,
674 		.board_info = {
675 			I2C_BOARD_INFO("tvp5146", 0x5d),
676 			.platform_data = &tvp5146_pdata,
677 		},
678 	},
679 	{
680 		.name	= TVP5147_CH1,
681 		.board_info = {
682 			I2C_BOARD_INFO("tvp5146", 0x5c),
683 			.platform_data = &tvp5146_pdata,
684 		},
685 	},
686 };
687 
688 static struct vpif_input dm6467_ch0_inputs[] = {
689 	{
690 		.input = {
691 			.index = 0,
692 			.name = "Composite",
693 			.type = V4L2_INPUT_TYPE_CAMERA,
694 			.capabilities = V4L2_IN_CAP_STD,
695 			.std = TVP514X_STD_ALL,
696 		},
697 		.subdev_name = TVP5147_CH0,
698 		.input_route = INPUT_CVBS_VI2B,
699 		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
700 	},
701 };
702 
703 static struct vpif_input dm6467_ch1_inputs[] = {
704        {
705 		.input = {
706 			.index = 0,
707 			.name = "S-Video",
708 			.type = V4L2_INPUT_TYPE_CAMERA,
709 			.capabilities = V4L2_IN_CAP_STD,
710 			.std = TVP514X_STD_ALL,
711 		},
712 		.subdev_name = TVP5147_CH1,
713 		.input_route = INPUT_SVIDEO_VI2C_VI1C,
714 		.output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
715 	},
716 };
717 
718 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
719 	.setup_input_path = setup_vpif_input_path,
720 	.setup_input_channel_mode = setup_vpif_input_channel_mode,
721 	.subdev_info = vpif_capture_sdev_info,
722 	.subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
723 	.i2c_adapter_id = 1,
724 	.chan_config[0] = {
725 		.inputs = dm6467_ch0_inputs,
726 		.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
727 		.vpif_if = {
728 			.if_type = VPIF_IF_BT656,
729 			.hd_pol = 1,
730 			.vd_pol = 1,
731 			.fid_pol = 0,
732 		},
733 	},
734 	.chan_config[1] = {
735 		.inputs = dm6467_ch1_inputs,
736 		.input_count = ARRAY_SIZE(dm6467_ch1_inputs),
737 		.vpif_if = {
738 			.if_type = VPIF_IF_BT656,
739 			.hd_pol = 1,
740 			.vd_pol = 1,
741 			.fid_pol = 0,
742 		},
743 	},
744 	.card_name = "DM646x EVM Video Capture",
745 };
746 
evm_init_video(void)747 static void __init evm_init_video(void)
748 {
749 	spin_lock_init(&vpif_reg_lock);
750 
751 	dm646x_setup_vpif(&dm646x_vpif_display_config,
752 			  &dm646x_vpif_capture_cfg);
753 }
754 
evm_init_i2c(void)755 static void __init evm_init_i2c(void)
756 {
757 	davinci_init_i2c(&i2c_pdata);
758 	i2c_add_driver(&dm6467evm_cpld_driver);
759 	i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
760 	evm_init_cpld();
761 	evm_init_video();
762 }
763 #endif
764 
765 #define DM646X_REF_FREQ			27000000
766 #define DM646X_AUX_FREQ			24000000
767 #define DM6467T_EVM_REF_FREQ		33000000
768 
davinci_map_io(void)769 static void __init davinci_map_io(void)
770 {
771 	dm646x_init();
772 }
773 
dm646x_evm_init_time(void)774 static void __init dm646x_evm_init_time(void)
775 {
776 	dm646x_init_time(DM646X_REF_FREQ, DM646X_AUX_FREQ);
777 }
778 
dm6467t_evm_init_time(void)779 static void __init dm6467t_evm_init_time(void)
780 {
781 	dm646x_init_time(DM6467T_EVM_REF_FREQ, DM646X_AUX_FREQ);
782 }
783 
784 #define DM646X_EVM_PHY_ID		"davinci_mdio-0:01"
785 /*
786  * The following EDMA channels/slots are not being used by drivers (for
787  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
788  * reserved for codecs on the DSP side.
789  */
790 static const s16 dm646x_dma_rsv_chans[][2] = {
791 	/* (offset, number) */
792 	{ 0,  4},
793 	{13,  3},
794 	{24,  4},
795 	{30,  2},
796 	{54,  3},
797 	{-1, -1}
798 };
799 
800 static const s16 dm646x_dma_rsv_slots[][2] = {
801 	/* (offset, number) */
802 	{ 0,  4},
803 	{13,  3},
804 	{24,  4},
805 	{30,  2},
806 	{54,  3},
807 	{128, 384},
808 	{-1, -1}
809 };
810 
811 static struct edma_rsv_info dm646x_edma_rsv[] = {
812 	{
813 		.rsv_chans	= dm646x_dma_rsv_chans,
814 		.rsv_slots	= dm646x_dma_rsv_slots,
815 	},
816 };
817 
evm_init(void)818 static __init void evm_init(void)
819 {
820 	int ret;
821 	struct davinci_soc_info *soc_info = &davinci_soc_info;
822 
823 	dm646x_register_clocks();
824 
825 	ret = dm646x_gpio_register();
826 	if (ret)
827 		pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
828 
829 #ifdef CONFIG_I2C
830 	nvmem_add_cell_table(&dm646x_evm_nvmem_cell_table);
831 	nvmem_add_cell_lookups(&dm646x_evm_nvmem_cell_lookup, 1);
832 	evm_init_i2c();
833 #endif
834 
835 	davinci_serial_init(dm646x_serial_device);
836 	dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
837 	dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
838 
839 	if (machine_is_davinci_dm6467tevm())
840 		davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
841 
842 	if (platform_device_register(&davinci_aemif_device))
843 		pr_warn("%s: Cannot register AEMIF device.\n", __func__);
844 
845 	dm646x_init_edma(dm646x_edma_rsv);
846 
847 	if (HAS_ATA)
848 		davinci_init_ide();
849 
850 	soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
851 }
852 
853 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
854 	.atag_offset  = 0x100,
855 	.map_io       = davinci_map_io,
856 	.init_irq     = dm646x_init_irq,
857 	.init_time	= dm646x_evm_init_time,
858 	.init_machine = evm_init,
859 	.init_late	= davinci_init_late,
860 	.dma_zone_size	= SZ_128M,
861 MACHINE_END
862 
863 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
864 	.atag_offset  = 0x100,
865 	.map_io       = davinci_map_io,
866 	.init_irq     = dm646x_init_irq,
867 	.init_time	= dm6467t_evm_init_time,
868 	.init_machine = evm_init,
869 	.init_late	= davinci_init_late,
870 	.dma_zone_size	= SZ_128M,
871 MACHINE_END
872