1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2019 Akash Gajjar <Akash_Gajjar@mentor.com> 4 * Copyright (c) 2019 Pragnesh Patel <Pragnesh_Patel@mentor.com> 5 */ 6 7/dts-v1/; 8#include <dt-bindings/input/linux-event-codes.h> 9#include <dt-bindings/pwm/pwm.h> 10#include "rk3399.dtsi" 11#include "rk3399-opp.dtsi" 12 13/ { 14 aliases { 15 mmc0 = &sdmmc; 16 mmc1 = &sdhci; 17 }; 18 19 chosen { 20 stdout-path = "serial2:1500000n8"; 21 }; 22 23 clkin_gmac: external-gmac-clock { 24 compatible = "fixed-clock"; 25 clock-frequency = <125000000>; 26 clock-output-names = "clkin_gmac"; 27 #clock-cells = <0>; 28 }; 29 30 sdio_pwrseq: sdio-pwrseq { 31 compatible = "mmc-pwrseq-simple"; 32 clocks = <&rk808 1>; 33 clock-names = "ext_clock"; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&wifi_enable_h>; 36 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 37 }; 38 39 sound { 40 compatible = "audio-graph-card"; 41 label = "Analog"; 42 dais = <&i2s0_p0>; 43 }; 44 45 sound-dit { 46 compatible = "audio-graph-card"; 47 label = "SPDIF"; 48 dais = <&spdif_p0>; 49 }; 50 51 spdif-dit { 52 compatible = "linux,spdif-dit"; 53 #sound-dai-cells = <0>; 54 55 port { 56 dit_p0_0: endpoint { 57 remote-endpoint = <&spdif_p0_0>; 58 }; 59 }; 60 }; 61 62 vcc12v_dcin: dc-12v { 63 compatible = "regulator-fixed"; 64 regulator-name = "vcc12v_dcin"; 65 regulator-always-on; 66 regulator-boot-on; 67 regulator-min-microvolt = <12000000>; 68 regulator-max-microvolt = <12000000>; 69 }; 70 71 vcc5v0_sys: vcc-sys { 72 compatible = "regulator-fixed"; 73 regulator-name = "vcc5v0_sys"; 74 regulator-always-on; 75 regulator-boot-on; 76 regulator-min-microvolt = <5000000>; 77 regulator-max-microvolt = <5000000>; 78 vin-supply = <&vcc12v_dcin>; 79 }; 80 81 vcc_0v9: vcc-0v9 { 82 compatible = "regulator-fixed"; 83 regulator-name = "vcc_0v9"; 84 regulator-always-on; 85 regulator-boot-on; 86 regulator-min-microvolt = <900000>; 87 regulator-max-microvolt = <900000>; 88 vin-supply = <&vcc3v3_sys>; 89 }; 90 91 vcc3v3_pcie: vcc3v3-pcie-regulator { 92 compatible = "regulator-fixed"; 93 enable-active-high; 94 gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&pcie_pwr_en>; 97 regulator-name = "vcc3v3_pcie"; 98 regulator-always-on; 99 regulator-boot-on; 100 vin-supply = <&vcc5v0_sys>; 101 }; 102 103 vcc3v3_sys: vcc3v3-sys { 104 compatible = "regulator-fixed"; 105 regulator-name = "vcc3v3_sys"; 106 regulator-always-on; 107 regulator-boot-on; 108 regulator-min-microvolt = <3300000>; 109 regulator-max-microvolt = <3300000>; 110 vin-supply = <&vcc5v0_sys>; 111 }; 112 113 vcc5v0_host: vcc5v0-host-regulator { 114 compatible = "regulator-fixed"; 115 enable-active-high; 116 gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>; 117 pinctrl-names = "default"; 118 pinctrl-0 = <&vcc5v0_host_en>; 119 regulator-name = "vcc5v0_host"; 120 regulator-always-on; 121 vin-supply = <&vcc5v0_sys>; 122 }; 123 124 vbus_typec: vbus-typec-regulator { 125 compatible = "regulator-fixed"; 126 enable-active-high; 127 gpio = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; 128 pinctrl-names = "default"; 129 pinctrl-0 = <&vcc5v0_typec_en>; 130 regulator-name = "vbus_typec"; 131 regulator-always-on; 132 vin-supply = <&vcc5v0_sys>; 133 }; 134 135 vcc3v3_lan: vcc3v3-lan-regulator { 136 compatible = "regulator-fixed"; 137 regulator-name = "vcc3v3_lan"; 138 regulator-always-on; 139 regulator-boot-on; 140 regulator-min-microvolt = <3300000>; 141 regulator-max-microvolt = <3300000>; 142 vin-supply = <&vcc3v3_sys>; 143 }; 144 145 vdd_log: vdd-log { 146 compatible = "pwm-regulator"; 147 pwms = <&pwm2 0 25000 1>; 148 regulator-name = "vdd_log"; 149 regulator-always-on; 150 regulator-boot-on; 151 regulator-min-microvolt = <800000>; 152 regulator-max-microvolt = <1400000>; 153 vin-supply = <&vcc5v0_sys>; 154 }; 155}; 156 157&cpu_l0 { 158 cpu-supply = <&vdd_cpu_l>; 159}; 160 161&cpu_l1 { 162 cpu-supply = <&vdd_cpu_l>; 163}; 164 165&cpu_l2 { 166 cpu-supply = <&vdd_cpu_l>; 167}; 168 169&cpu_l3 { 170 cpu-supply = <&vdd_cpu_l>; 171}; 172 173&cpu_b0 { 174 cpu-supply = <&vdd_cpu_b>; 175}; 176 177&cpu_b1 { 178 cpu-supply = <&vdd_cpu_b>; 179}; 180 181&emmc_phy { 182 status = "okay"; 183}; 184 185&gmac { 186 assigned-clocks = <&cru SCLK_RMII_SRC>; 187 assigned-clock-parents = <&clkin_gmac>; 188 clock_in_out = "input"; 189 phy-supply = <&vcc3v3_lan>; 190 phy-mode = "rgmii"; 191 pinctrl-names = "default"; 192 pinctrl-0 = <&rgmii_pins>; 193 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 194 snps,reset-active-low; 195 snps,reset-delays-us = <0 10000 50000>; 196 tx_delay = <0x28>; 197 rx_delay = <0x11>; 198 status = "okay"; 199}; 200 201&gpu { 202 mali-supply = <&vdd_gpu>; 203 status = "okay"; 204}; 205 206&hdmi { 207 ddc-i2c-bus = <&i2c3>; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&hdmi_cec>; 210 status = "okay"; 211}; 212 213&hdmi_sound { 214 status = "okay"; 215}; 216 217&i2c0 { 218 clock-frequency = <400000>; 219 i2c-scl-rising-time-ns = <168>; 220 i2c-scl-falling-time-ns = <4>; 221 status = "okay"; 222 223 rk808: pmic@1b { 224 compatible = "rockchip,rk808"; 225 reg = <0x1b>; 226 interrupt-parent = <&gpio1>; 227 interrupts = <21 IRQ_TYPE_LEVEL_LOW>; 228 #clock-cells = <1>; 229 clock-output-names = "xin32k", "rk808-clkout2"; 230 pinctrl-names = "default"; 231 pinctrl-0 = <&pmic_int_l>; 232 rockchip,system-power-controller; 233 wakeup-source; 234 235 vcc1-supply = <&vcc5v0_sys>; 236 vcc2-supply = <&vcc5v0_sys>; 237 vcc3-supply = <&vcc5v0_sys>; 238 vcc4-supply = <&vcc5v0_sys>; 239 vcc6-supply = <&vcc5v0_sys>; 240 vcc7-supply = <&vcc5v0_sys>; 241 vcc8-supply = <&vcc3v3_sys>; 242 vcc9-supply = <&vcc5v0_sys>; 243 vcc10-supply = <&vcc5v0_sys>; 244 vcc11-supply = <&vcc5v0_sys>; 245 vcc12-supply = <&vcc3v3_sys>; 246 vddio-supply = <&vcc_1v8>; 247 248 regulators { 249 vdd_center: DCDC_REG1 { 250 regulator-name = "vdd_center"; 251 regulator-always-on; 252 regulator-boot-on; 253 regulator-min-microvolt = <750000>; 254 regulator-max-microvolt = <1350000>; 255 regulator-ramp-delay = <6001>; 256 regulator-state-mem { 257 regulator-off-in-suspend; 258 }; 259 }; 260 261 vdd_cpu_l: DCDC_REG2 { 262 regulator-name = "vdd_cpu_l"; 263 regulator-always-on; 264 regulator-boot-on; 265 regulator-min-microvolt = <750000>; 266 regulator-max-microvolt = <1350000>; 267 regulator-ramp-delay = <6001>; 268 regulator-state-mem { 269 regulator-off-in-suspend; 270 }; 271 }; 272 273 vcc_ddr: DCDC_REG3 { 274 regulator-name = "vcc_ddr"; 275 regulator-always-on; 276 regulator-boot-on; 277 regulator-state-mem { 278 regulator-on-in-suspend; 279 }; 280 }; 281 282 vcc_1v8: DCDC_REG4 { 283 regulator-name = "vcc_1v8"; 284 regulator-always-on; 285 regulator-boot-on; 286 regulator-min-microvolt = <1800000>; 287 regulator-max-microvolt = <1800000>; 288 regulator-state-mem { 289 regulator-on-in-suspend; 290 regulator-suspend-microvolt = <1800000>; 291 }; 292 }; 293 294 vcca1v8_codec: LDO_REG1 { 295 regulator-name = "vcca1v8_codec"; 296 regulator-always-on; 297 regulator-boot-on; 298 regulator-min-microvolt = <1800000>; 299 regulator-max-microvolt = <1800000>; 300 regulator-state-mem { 301 regulator-off-in-suspend; 302 }; 303 }; 304 305 vcca1v8_hdmi: LDO_REG2 { 306 regulator-name = "vcca1v8_hdmi"; 307 regulator-always-on; 308 regulator-boot-on; 309 regulator-min-microvolt = <1800000>; 310 regulator-max-microvolt = <1800000>; 311 regulator-state-mem { 312 regulator-off-in-suspend; 313 }; 314 }; 315 316 vcca_1v8: LDO_REG3 { 317 regulator-name = "vcca_1v8"; 318 regulator-always-on; 319 regulator-boot-on; 320 regulator-min-microvolt = <1800000>; 321 regulator-max-microvolt = <1800000>; 322 regulator-state-mem { 323 regulator-on-in-suspend; 324 regulator-suspend-microvolt = <1800000>; 325 }; 326 }; 327 328 vcc_sdio: LDO_REG4 { 329 regulator-name = "vcc_sdio"; 330 regulator-always-on; 331 regulator-boot-on; 332 regulator-min-microvolt = <3000000>; 333 regulator-max-microvolt = <3000000>; 334 regulator-state-mem { 335 regulator-on-in-suspend; 336 regulator-suspend-microvolt = <3000000>; 337 }; 338 }; 339 340 vcca3v0_codec: LDO_REG5 { 341 regulator-name = "vcca3v0_codec"; 342 regulator-always-on; 343 regulator-boot-on; 344 regulator-min-microvolt = <3000000>; 345 regulator-max-microvolt = <3000000>; 346 regulator-state-mem { 347 regulator-off-in-suspend; 348 }; 349 }; 350 351 vcc_1v5: LDO_REG6 { 352 regulator-name = "vcc_1v5"; 353 regulator-always-on; 354 regulator-boot-on; 355 regulator-min-microvolt = <1500000>; 356 regulator-max-microvolt = <1500000>; 357 regulator-state-mem { 358 regulator-on-in-suspend; 359 regulator-suspend-microvolt = <1500000>; 360 }; 361 }; 362 363 vcca0v9_hdmi: LDO_REG7 { 364 regulator-name = "vcca0v9_hdmi"; 365 regulator-always-on; 366 regulator-boot-on; 367 regulator-min-microvolt = <900000>; 368 regulator-max-microvolt = <900000>; 369 regulator-state-mem { 370 regulator-off-in-suspend; 371 }; 372 }; 373 374 vcc_3v0: LDO_REG8 { 375 regulator-name = "vcc_3v0"; 376 regulator-always-on; 377 regulator-boot-on; 378 regulator-min-microvolt = <3000000>; 379 regulator-max-microvolt = <3000000>; 380 regulator-state-mem { 381 regulator-on-in-suspend; 382 regulator-suspend-microvolt = <3000000>; 383 }; 384 }; 385 386 vcc_cam: SWITCH_REG1 { 387 regulator-name = "vcc_cam"; 388 regulator-always-on; 389 regulator-boot-on; 390 regulator-state-mem { 391 regulator-off-in-suspend; 392 }; 393 }; 394 395 vcc_mipi: SWITCH_REG2 { 396 regulator-name = "vcc_mipi"; 397 regulator-always-on; 398 regulator-boot-on; 399 regulator-state-mem { 400 regulator-off-in-suspend; 401 }; 402 }; 403 }; 404 }; 405 406 vdd_cpu_b: regulator@40 { 407 compatible = "silergy,syr827"; 408 reg = <0x40>; 409 fcs,suspend-voltage-selector = <1>; 410 pinctrl-names = "default"; 411 pinctrl-0 = <&vsel1_pin>; 412 regulator-name = "vdd_cpu_b"; 413 regulator-min-microvolt = <712500>; 414 regulator-max-microvolt = <1500000>; 415 regulator-ramp-delay = <1000>; 416 regulator-always-on; 417 regulator-boot-on; 418 vin-supply = <&vcc5v0_sys>; 419 420 regulator-state-mem { 421 regulator-off-in-suspend; 422 }; 423 }; 424 425 vdd_gpu: regulator@41 { 426 compatible = "silergy,syr828"; 427 reg = <0x41>; 428 fcs,suspend-voltage-selector = <1>; 429 pinctrl-names = "default"; 430 pinctrl-0 = <&vsel2_pin>; 431 regulator-name = "vdd_gpu"; 432 regulator-min-microvolt = <712500>; 433 regulator-max-microvolt = <1500000>; 434 regulator-ramp-delay = <1000>; 435 regulator-always-on; 436 regulator-boot-on; 437 vin-supply = <&vcc5v0_sys>; 438 439 regulator-state-mem { 440 regulator-off-in-suspend; 441 }; 442 }; 443}; 444 445&i2c1 { 446 i2c-scl-rising-time-ns = <300>; 447 i2c-scl-falling-time-ns = <15>; 448 status = "okay"; 449 450 es8316: codec@11 { 451 compatible = "everest,es8316"; 452 reg = <0x11>; 453 clocks = <&cru SCLK_I2S_8CH_OUT>; 454 clock-names = "mclk"; 455 #sound-dai-cells = <0>; 456 457 port { 458 es8316_p0_0: endpoint { 459 remote-endpoint = <&i2s0_p0_0>; 460 }; 461 }; 462 }; 463}; 464 465&i2c3 { 466 i2c-scl-rising-time-ns = <450>; 467 i2c-scl-falling-time-ns = <15>; 468 status = "okay"; 469}; 470 471&i2c4 { 472 i2c-scl-rising-time-ns = <600>; 473 i2c-scl-falling-time-ns = <20>; 474 status = "okay"; 475}; 476 477&i2s0 { 478 pinctrl-0 = <&i2s0_2ch_bus>; 479 rockchip,capture-channels = <2>; 480 rockchip,playback-channels = <2>; 481 status = "okay"; 482 483 i2s0_p0: port { 484 i2s0_p0_0: endpoint { 485 dai-format = "i2s"; 486 mclk-fs = <256>; 487 remote-endpoint = <&es8316_p0_0>; 488 }; 489 }; 490}; 491 492&i2s1 { 493 rockchip,playback-channels = <2>; 494 rockchip,capture-channels = <2>; 495}; 496 497&i2s2 { 498 status = "okay"; 499}; 500 501&io_domains { 502 status = "okay"; 503 504 bt656-supply = <&vcc_3v0>; 505 audio-supply = <&vcca1v8_codec>; 506 sdmmc-supply = <&vcc_sdio>; 507 gpio1830-supply = <&vcc_3v0>; 508}; 509 510&pmu_io_domains { 511 status = "okay"; 512 513 pmu1830-supply = <&vcc_3v0>; 514}; 515 516&pcie_phy { 517 status = "okay"; 518}; 519 520&pcie0 { 521 ep-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>; 522 num-lanes = <4>; 523 pinctrl-0 = <&pcie_clkreqnb_cpm>; 524 pinctrl-names = "default"; 525 vpcie0v9-supply = <&vcc_0v9>; 526 vpcie1v8-supply = <&vcc_1v8>; 527 vpcie3v3-supply = <&vcc3v3_pcie>; 528 status = "okay"; 529}; 530 531&pinctrl { 532 bt { 533 bt_enable_h: bt-enable-h { 534 rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 535 }; 536 537 bt_host_wake_l: bt-host-wake-l { 538 rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 539 }; 540 541 bt_wake_l: bt-wake-l { 542 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 543 }; 544 }; 545 546 pcie { 547 pcie_pwr_en: pcie-pwr-en { 548 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 549 }; 550 }; 551 552 sdio0 { 553 sdio0_bus4: sdio0-bus4 { 554 rockchip,pins = <2 RK_PC4 1 &pcfg_pull_up_20ma>, 555 <2 RK_PC5 1 &pcfg_pull_up_20ma>, 556 <2 RK_PC6 1 &pcfg_pull_up_20ma>, 557 <2 RK_PC7 1 &pcfg_pull_up_20ma>; 558 }; 559 560 sdio0_cmd: sdio0-cmd { 561 rockchip,pins = <2 RK_PD0 1 &pcfg_pull_up_20ma>; 562 }; 563 564 sdio0_clk: sdio0-clk { 565 rockchip,pins = <2 RK_PD1 1 &pcfg_pull_none_20ma>; 566 }; 567 }; 568 569 pmic { 570 pmic_int_l: pmic-int-l { 571 rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 572 }; 573 574 vsel1_pin: vsel1-pin { 575 rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; 576 }; 577 578 vsel2_pin: vsel2-pin { 579 rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 580 }; 581 }; 582 583 usb-typec { 584 vcc5v0_typec_en: vcc5v0-typec-en { 585 rockchip,pins = <1 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 586 }; 587 }; 588 589 usb2 { 590 vcc5v0_host_en: vcc5v0-host-en { 591 rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; 592 }; 593 }; 594 595 wifi { 596 wifi_enable_h: wifi-enable-h { 597 rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 598 }; 599 600 wifi_host_wake_l: wifi-host-wake-l { 601 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 602 }; 603 }; 604}; 605 606&pwm2 { 607 status = "okay"; 608}; 609 610&saradc { 611 status = "okay"; 612 613 vref-supply = <&vcc_1v8>; 614}; 615 616&sdio0 { 617 #address-cells = <1>; 618 #size-cells = <0>; 619 bus-width = <4>; 620 clock-frequency = <50000000>; 621 cap-sdio-irq; 622 cap-sd-highspeed; 623 keep-power-in-suspend; 624 mmc-pwrseq = <&sdio_pwrseq>; 625 non-removable; 626 pinctrl-names = "default"; 627 pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 628 sd-uhs-sdr104; 629}; 630 631&sdmmc { 632 bus-width = <4>; 633 cap-mmc-highspeed; 634 cap-sd-highspeed; 635 cd-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; 636 disable-wp; 637 max-frequency = <150000000>; 638 pinctrl-names = "default"; 639 pinctrl-0 = <&sdmmc_clk &sdmmc_cd &sdmmc_cmd &sdmmc_bus4>; 640 status = "okay"; 641}; 642 643&sdhci { 644 max-frequency = <150000000>; 645 bus-width = <8>; 646 mmc-hs200-1_8v; 647 non-removable; 648 status = "okay"; 649}; 650 651&spdif { 652 653 spdif_p0: port { 654 spdif_p0_0: endpoint { 655 remote-endpoint = <&dit_p0_0>; 656 }; 657 }; 658}; 659 660&tcphy0 { 661 status = "okay"; 662}; 663 664&tcphy1 { 665 status = "okay"; 666}; 667 668&tsadc { 669 status = "okay"; 670 671 /* tshut mode 0:CRU 1:GPIO */ 672 rockchip,hw-tshut-mode = <1>; 673 /* tshut polarity 0:LOW 1:HIGH */ 674 rockchip,hw-tshut-polarity = <1>; 675}; 676 677&u2phy0 { 678 status = "okay"; 679 680 u2phy0_otg: otg-port { 681 status = "okay"; 682 }; 683 684 u2phy0_host: host-port { 685 phy-supply = <&vcc5v0_host>; 686 status = "okay"; 687 }; 688}; 689 690&u2phy1 { 691 status = "okay"; 692 693 u2phy1_otg: otg-port { 694 status = "okay"; 695 }; 696 697 u2phy1_host: host-port { 698 phy-supply = <&vcc5v0_host>; 699 status = "okay"; 700 }; 701}; 702 703&uart0 { 704 pinctrl-names = "default"; 705 pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 706}; 707 708&uart2 { 709 status = "okay"; 710}; 711 712&usb_host0_ehci { 713 status = "okay"; 714}; 715 716&usb_host0_ohci { 717 status = "okay"; 718}; 719 720&usb_host1_ehci { 721 status = "okay"; 722}; 723 724&usb_host1_ohci { 725 status = "okay"; 726}; 727 728&usbdrd3_0 { 729 status = "okay"; 730}; 731 732&usbdrd_dwc3_0 { 733 status = "okay"; 734 dr_mode = "host"; 735}; 736 737&usbdrd3_1 { 738 status = "okay"; 739}; 740 741&usbdrd_dwc3_1 { 742 status = "okay"; 743 dr_mode = "host"; 744}; 745 746&vopb { 747 status = "okay"; 748}; 749 750&vopb_mmu { 751 status = "okay"; 752}; 753 754&vopl { 755 status = "okay"; 756}; 757 758&vopl_mmu { 759 status = "okay"; 760}; 761