1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* Copyright (C) 2019 Cadence Design Systems Inc. */ 3 4 #ifndef _ASM_XTENSA_CORE_H 5 #define _ASM_XTENSA_CORE_H 6 7 #include <variant/core.h> 8 9 #ifndef XCHAL_HAVE_DIV32 10 #define XCHAL_HAVE_DIV32 0 11 #endif 12 13 #ifndef XCHAL_HAVE_EXCLUSIVE 14 #define XCHAL_HAVE_EXCLUSIVE 0 15 #endif 16 17 #ifndef XCHAL_HAVE_EXTERN_REGS 18 #define XCHAL_HAVE_EXTERN_REGS 0 19 #endif 20 21 #ifndef XCHAL_HAVE_MPU 22 #define XCHAL_HAVE_MPU 0 23 #endif 24 25 #ifndef XCHAL_HAVE_VECBASE 26 #define XCHAL_HAVE_VECBASE 0 27 #endif 28 29 #ifndef XCHAL_SPANNING_WAY 30 #define XCHAL_SPANNING_WAY 0 31 #endif 32 33 #ifndef XCHAL_HW_MIN_VERSION 34 #if defined(XCHAL_HW_MIN_VERSION_MAJOR) && defined(XCHAL_HW_MIN_VERSION_MINOR) 35 #define XCHAL_HW_MIN_VERSION (XCHAL_HW_MIN_VERSION_MAJOR * 100 + \ 36 XCHAL_HW_MIN_VERSION_MINOR) 37 #else 38 #define XCHAL_HW_MIN_VERSION 0 39 #endif 40 #endif 41 42 #endif 43